1*1b191cb5SApple OSS Distributions /*
2*1b191cb5SApple OSS Distributions * Copyright (c) 2017-2018 Apple Inc. All rights reserved.
3*1b191cb5SApple OSS Distributions *
4*1b191cb5SApple OSS Distributions * Disassemblers for ARM64 (AArch64)
5*1b191cb5SApple OSS Distributions */
6*1b191cb5SApple OSS Distributions
7*1b191cb5SApple OSS Distributions #include <sys/fasttrap_isa.h>
8*1b191cb5SApple OSS Distributions
9*1b191cb5SApple OSS Distributions uint8_t dtrace_decode_arm64(uint32_t instr);
10*1b191cb5SApple OSS Distributions
11*1b191cb5SApple OSS Distributions struct arm64_decode_entry {
12*1b191cb5SApple OSS Distributions uint32_t mask;
13*1b191cb5SApple OSS Distributions uint32_t value;
14*1b191cb5SApple OSS Distributions uint8_t type;
15*1b191cb5SApple OSS Distributions };
16*1b191cb5SApple OSS Distributions
17*1b191cb5SApple OSS Distributions struct arm64_decode_entry arm64_decode_table[] = {
18*1b191cb5SApple OSS Distributions { .mask = 0xFFFFFFFF, .value = FASTTRAP_ARM64_OP_VALUE_FUNC_ENTRY, .type = FASTTRAP_T_ARM64_STANDARD_FUNCTION_ENTRY },
19*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LDR_S_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LDR_S_PC_REL, .type = FASTTRAP_T_ARM64_LDR_S_PC_REL },
20*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LDR_W_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LDR_W_PC_REL, .type = FASTTRAP_T_ARM64_LDR_W_PC_REL },
21*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LDR_D_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LDR_D_PC_REL, .type = FASTTRAP_T_ARM64_LDR_D_PC_REL },
22*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LDR_X_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LDR_X_PC_REL, .type = FASTTRAP_T_ARM64_LDR_X_PC_REL },
23*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LDR_Q_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LDR_Q_PC_REL, .type = FASTTRAP_T_ARM64_LDR_Q_PC_REL },
24*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_LRDSW_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_LRDSW_PC_REL, .type = FASTTRAP_T_ARM64_LDRSW_PC_REL },
25*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_B_COND_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_B_COND_PC_REL, .type = FASTTRAP_T_ARM64_B_COND },
26*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_CBNZ_W_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_CBNZ_W_PC_REL, .type = FASTTRAP_T_ARM64_CBNZ_W },
27*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_CBNZ_X_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_CBNZ_X_PC_REL, .type = FASTTRAP_T_ARM64_CBNZ_X },
28*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_CBZ_W_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_CBZ_W_PC_REL, .type = FASTTRAP_T_ARM64_CBZ_W },
29*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_CBZ_X_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_CBZ_X_PC_REL, .type = FASTTRAP_T_ARM64_CBZ_X },
30*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_TBNZ_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_TBNZ_PC_REL, .type = FASTTRAP_T_ARM64_TBNZ },
31*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_TBZ_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_TBZ_PC_REL, .type = FASTTRAP_T_ARM64_TBZ },
32*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_B_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_B_PC_REL, .type = FASTTRAP_T_ARM64_B },
33*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_BL_PC_REL, .value = FASTTRAP_ARM64_OP_VALUE_BL_PC_REL, .type = FASTTRAP_T_ARM64_BL },
34*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_BLR, .value = FASTTRAP_ARM64_OP_VALUE_BLR, .type = FASTTRAP_T_ARM64_BLR },
35*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_BR, .value = FASTTRAP_ARM64_OP_VALUE_BR, .type = FASTTRAP_T_ARM64_BR },
36*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_RET, .value = FASTTRAP_ARM64_OP_VALUE_RET, .type = FASTTRAP_T_ARM64_RET },
37*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_ADRP, .value = FASTTRAP_ARM64_OP_VALUE_ADRP, .type = FASTTRAP_T_ARM64_ADRP },
38*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_ADR, .value = FASTTRAP_ARM64_OP_VALUE_ADR, .type = FASTTRAP_T_ARM64_ADR },
39*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_PRFM, .value = FASTTRAP_ARM64_OP_VALUE_PRFM, .type = FASTTRAP_T_ARM64_PRFM },
40*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_EXCL_MEM, .value = FASTTRAP_ARM64_OP_VALUE_EXCL_MEM, .type = FASTTRAP_T_ARM64_EXCLUSIVE_MEM },
41*1b191cb5SApple OSS Distributions { .mask = FASTTRAP_ARM64_OP_MASK_RETAB, .value = FASTTRAP_ARM64_OP_VALUE_RETAB, .type = FASTTRAP_T_ARM64_RETAB }
42*1b191cb5SApple OSS Distributions };
43*1b191cb5SApple OSS Distributions
44*1b191cb5SApple OSS Distributions #define NUM_DECODE_ENTRIES (sizeof(arm64_decode_table) / sizeof(struct arm64_decode_entry))
45*1b191cb5SApple OSS Distributions
46*1b191cb5SApple OSS Distributions uint8_t
dtrace_decode_arm64(uint32_t instr)47*1b191cb5SApple OSS Distributions dtrace_decode_arm64(uint32_t instr)
48*1b191cb5SApple OSS Distributions {
49*1b191cb5SApple OSS Distributions unsigned i;
50*1b191cb5SApple OSS Distributions
51*1b191cb5SApple OSS Distributions for (i = 0; i < NUM_DECODE_ENTRIES; i++) {
52*1b191cb5SApple OSS Distributions if ((instr & arm64_decode_table[i].mask) == arm64_decode_table[i].value) {
53*1b191cb5SApple OSS Distributions return arm64_decode_table[i].type;
54*1b191cb5SApple OSS Distributions }
55*1b191cb5SApple OSS Distributions }
56*1b191cb5SApple OSS Distributions
57*1b191cb5SApple OSS Distributions return FASTTRAP_T_COMMON;
58*1b191cb5SApple OSS Distributions }
59