xref: /xnu-8796.121.2/tools/lldbmacros/apic.py (revision c54f35ca767986246321eb901baf8f5ff7923f6a)
1*c54f35caSApple OSS Distributionsfrom __future__ import absolute_import, print_function
2*c54f35caSApple OSS Distributions
3*c54f35caSApple OSS Distributionsfrom builtins import range
4*c54f35caSApple OSS Distributions
5*c54f35caSApple OSS Distributionsfrom xnu import *
6*c54f35caSApple OSS Distributionsfrom misc import DoReadMsr64, DoWriteMsr64
7*c54f35caSApple OSS Distributions
8*c54f35caSApple OSS Distributions######################################
9*c54f35caSApple OSS Distributions# Globals
10*c54f35caSApple OSS Distributions######################################
11*c54f35caSApple OSS Distributionslapic_base_addr = 0xfee00000
12*c54f35caSApple OSS Distributionsioapic_base_addr = 0xfec00000
13*c54f35caSApple OSS Distributionsioapic_index_off = 0x0
14*c54f35caSApple OSS Distributionsioapic_data_off = 0x10
15*c54f35caSApple OSS Distributions
16*c54f35caSApple OSS Distributions
17*c54f35caSApple OSS Distributions######################################
18*c54f35caSApple OSS Distributions# LAPIC Helper functions
19*c54f35caSApple OSS Distributions######################################
20*c54f35caSApple OSS Distributionsdef IsArchX86_64():
21*c54f35caSApple OSS Distributions    """ Determines if target machine is x86_64
22*c54f35caSApple OSS Distributions        Returns:
23*c54f35caSApple OSS Distributions            True if running on x86_64, False otherwise
24*c54f35caSApple OSS Distributions    """
25*c54f35caSApple OSS Distributions    return kern.arch == "x86_64"
26*c54f35caSApple OSS Distributions
27*c54f35caSApple OSS Distributions
28*c54f35caSApple OSS Distributions@static_var('x2apic_enabled', -1)
29*c54f35caSApple OSS Distributionsdef IsX2ApicEnabled():
30*c54f35caSApple OSS Distributions    """ Reads the APIC configuration MSR to determine if APIC is operating
31*c54f35caSApple OSS Distributions        in x2APIC mode. The MSR is read the first time this function is
32*c54f35caSApple OSS Distributions        called, and the answer is remembered for all subsequent calls.
33*c54f35caSApple OSS Distributions        Returns:
34*c54f35caSApple OSS Distributions            True if APIC is x2APIC mode
35*c54f35caSApple OSS Distributions            False if not
36*c54f35caSApple OSS Distributions    """
37*c54f35caSApple OSS Distributions    apic_cfg_msr = 0x1b
38*c54f35caSApple OSS Distributions    apic_cfg_msr_x2en_mask = 0xc00
39*c54f35caSApple OSS Distributions    if IsX2ApicEnabled.x2apic_enabled < 0:
40*c54f35caSApple OSS Distributions        if (int(DoReadMsr64(apic_cfg_msr, xnudefines.lcpu_self)) & apic_cfg_msr_x2en_mask ==
41*c54f35caSApple OSS Distributions            apic_cfg_msr_x2en_mask):
42*c54f35caSApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 1
43*c54f35caSApple OSS Distributions        else:
44*c54f35caSApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 0
45*c54f35caSApple OSS Distributions    return IsX2ApicEnabled.x2apic_enabled == 1
46*c54f35caSApple OSS Distributions
47*c54f35caSApple OSS Distributionsdef DoLapicRead32(offset, cpu):
48*c54f35caSApple OSS Distributions    """ Read the specified 32-bit LAPIC register
49*c54f35caSApple OSS Distributions        Params:
50*c54f35caSApple OSS Distributions            offset: int - index of LAPIC register to read
51*c54f35caSApple OSS Distributions            cpu: int - cpu ID
52*c54f35caSApple OSS Distributions        Returns:
53*c54f35caSApple OSS Distributions            The 32-bit LAPIC register value
54*c54f35caSApple OSS Distributions    """
55*c54f35caSApple OSS Distributions    if IsX2ApicEnabled():
56*c54f35caSApple OSS Distributions        return DoReadMsr64(offset >> 4, cpu)
57*c54f35caSApple OSS Distributions    else:
58*c54f35caSApple OSS Distributions        return ReadPhysInt(lapic_base_addr + offset, 32, cpu)
59*c54f35caSApple OSS Distributions
60*c54f35caSApple OSS Distributionsdef DoLapicWrite32(offset, val, cpu):
61*c54f35caSApple OSS Distributions    """ Write the specified 32-bit LAPIC register
62*c54f35caSApple OSS Distributions        Params:
63*c54f35caSApple OSS Distributions            offset: int - index of LAPIC register to write
64*c54f35caSApple OSS Distributions            val: int - write value
65*c54f35caSApple OSS Distributions            cpu: int - cpu ID
66*c54f35caSApple OSS Distributions        Returns:
67*c54f35caSApple OSS Distributions            True if success, False if error
68*c54f35caSApple OSS Distributions    """
69*c54f35caSApple OSS Distributions    if IsX2ApicEnabled():
70*c54f35caSApple OSS Distributions        return DoWriteMsr64(offset >> 4, cpu, val)
71*c54f35caSApple OSS Distributions    else:
72*c54f35caSApple OSS Distributions        return WritePhysInt(lapic_base_addr + offset, val, 32)
73*c54f35caSApple OSS Distributions
74*c54f35caSApple OSS Distributions######################################
75*c54f35caSApple OSS Distributions# LAPIC Register Print functions
76*c54f35caSApple OSS Distributions######################################
77*c54f35caSApple OSS Distributionsdef GetLapicVersionFields(reg_val):
78*c54f35caSApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
79*c54f35caSApple OSS Distributions        version register.
80*c54f35caSApple OSS Distributions        Params:
81*c54f35caSApple OSS Distributions            reg_val: int - the value of the version register to print
82*c54f35caSApple OSS Distributions        Returns:
83*c54f35caSApple OSS Distributions            string showing the fields
84*c54f35caSApple OSS Distributions    """
85*c54f35caSApple OSS Distributions    lvt_num = (reg_val >> 16) + 1
86*c54f35caSApple OSS Distributions    version = reg_val & 0xff
87*c54f35caSApple OSS Distributions    return "[VERSION={:d} MaxLVT={:d}]".format(lvt_num, version)
88*c54f35caSApple OSS Distributions
89*c54f35caSApple OSS Distributionsdef GetLapicSpuriousVectorFields(reg_val):
90*c54f35caSApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
91*c54f35caSApple OSS Distributions        spurious vector register.
92*c54f35caSApple OSS Distributions        Params:
93*c54f35caSApple OSS Distributions            reg_val: int - the value of the spurious vector registre to print
94*c54f35caSApple OSS Distributions        Returns:
95*c54f35caSApple OSS Distributions            string showing the fields
96*c54f35caSApple OSS Distributions    """
97*c54f35caSApple OSS Distributions    vector = reg_val & 0xff
98*c54f35caSApple OSS Distributions    enabled = (reg_val & 0x100) >> 8
99*c54f35caSApple OSS Distributions    return "[VEC={:3d} ENABLED={:d}]".format(vector, enabled)
100*c54f35caSApple OSS Distributions
101*c54f35caSApple OSS Distributionsdef GetLapicIcrHiFields(reg_val):
102*c54f35caSApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
103*c54f35caSApple OSS Distributions        upper 32-bits of the Interrupt Control Register (ICR).
104*c54f35caSApple OSS Distributions        Params:
105*c54f35caSApple OSS Distributions            reg_val: int - the value of the ICR to show
106*c54f35caSApple OSS Distributions        Returns:
107*c54f35caSApple OSS Distributions            string showing the fields
108*c54f35caSApple OSS Distributions    """
109*c54f35caSApple OSS Distributions    dest = reg_val >> 24
110*c54f35caSApple OSS Distributions    return "[DEST={:d}]".format(dest)
111*c54f35caSApple OSS Distributions
112*c54f35caSApple OSS Distributionsdef GetLapicTimerDivideFields(reg_val):
113*c54f35caSApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
114*c54f35caSApple OSS Distributions        timer divide register.
115*c54f35caSApple OSS Distributions        Params:
116*c54f35caSApple OSS Distributions            reg_val: int - the value of the timer divide register
117*c54f35caSApple OSS Distributions        Returns:
118*c54f35caSApple OSS Distributions            string showing the fields
119*c54f35caSApple OSS Distributions    """
120*c54f35caSApple OSS Distributions    divide_val = ((reg_val & 0x8) >> 1) | (reg_val & 0x3)
121*c54f35caSApple OSS Distributions    if divide_val == 0x7:
122*c54f35caSApple OSS Distributions        divide_by = 1
123*c54f35caSApple OSS Distributions    else:
124*c54f35caSApple OSS Distributions        divide_by = 2 << divide_val
125*c54f35caSApple OSS Distributions    return "[Divide by {:d}]".format(divide_by)
126*c54f35caSApple OSS Distributions
127*c54f35caSApple OSS Distributionsdef GetApicFields(reg_val):
128*c54f35caSApple OSS Distributions    """ Helper function for DoLapicDump and DoIoapicDump that prints the
129*c54f35caSApple OSS Distributions        fields of the APIC register.
130*c54f35caSApple OSS Distributions        Params:
131*c54f35caSApple OSS Distributions            reg_val: int - the value of the APIC register to print
132*c54f35caSApple OSS Distributions        Returns:
133*c54f35caSApple OSS Distributions            string showing the fields
134*c54f35caSApple OSS Distributions    """
135*c54f35caSApple OSS Distributions    vector = reg_val & 0xff
136*c54f35caSApple OSS Distributions    tsc_deadline = reg_val & 0x40000
137*c54f35caSApple OSS Distributions    periodic = reg_val & 0x20000
138*c54f35caSApple OSS Distributions    masked = reg_val & 0x10000
139*c54f35caSApple OSS Distributions    trigger = reg_val & 0x8000
140*c54f35caSApple OSS Distributions    polarity = reg_val & 0x2000
141*c54f35caSApple OSS Distributions    pending = reg_val & 0x1000
142*c54f35caSApple OSS Distributions
143*c54f35caSApple OSS Distributions    ret_str = "[VEC={:3d} MASK={:3s} TRIG={:5s} POL={:4s} PEND={:3s}".format(
144*c54f35caSApple OSS Distributions        vector,
145*c54f35caSApple OSS Distributions        "no" if masked == 0 else "yes",
146*c54f35caSApple OSS Distributions        "edge" if trigger == 0 else "level",
147*c54f35caSApple OSS Distributions        "low" if polarity == 0 else "high",
148*c54f35caSApple OSS Distributions        "no" if pending == 0 else "yes")
149*c54f35caSApple OSS Distributions    if not periodic == 0:
150*c54f35caSApple OSS Distributions        ret_str += " PERIODIC"
151*c54f35caSApple OSS Distributions    if not tsc_deadline == 0:
152*c54f35caSApple OSS Distributions        ret_str += " TSC_DEADLINE"
153*c54f35caSApple OSS Distributions    ret_str += "]"
154*c54f35caSApple OSS Distributions    return ret_str
155*c54f35caSApple OSS Distributions
156*c54f35caSApple OSS Distributionsdef DoLapicDump():
157*c54f35caSApple OSS Distributions    """ Prints all LAPIC registers
158*c54f35caSApple OSS Distributions    """
159*c54f35caSApple OSS Distributions    print("LAPIC operating mode: {:s}".format(
160*c54f35caSApple OSS Distributions        "x2APIC" if IsX2ApicEnabled() else "xAPIC"))
161*c54f35caSApple OSS Distributions    # LAPIC register offset, register name, field formatting function
162*c54f35caSApple OSS Distributions    lapic_dump_table = [
163*c54f35caSApple OSS Distributions        (0x020, "ID", None),
164*c54f35caSApple OSS Distributions        (0x030, "VERSION", GetLapicVersionFields),
165*c54f35caSApple OSS Distributions        (0x080, "TASK PRIORITY", None),
166*c54f35caSApple OSS Distributions        (0x0A0, "PROCESSOR PRIORITY", None),
167*c54f35caSApple OSS Distributions        (0x0D0, "LOGICAL DEST", None),
168*c54f35caSApple OSS Distributions        (0x0E0, "DEST FORMAT", None),
169*c54f35caSApple OSS Distributions        (0x0F0, "SPURIOUS VECTOR", GetLapicSpuriousVectorFields),
170*c54f35caSApple OSS Distributions        (0x100, "ISR[031:000]", None),
171*c54f35caSApple OSS Distributions        (0x110, "ISR[063:032]", None),
172*c54f35caSApple OSS Distributions        (0x120, "ISR[095:064]", None),
173*c54f35caSApple OSS Distributions        (0x130, "ISR[127:096]", None),
174*c54f35caSApple OSS Distributions        (0x140, "ISR[159:128]", None),
175*c54f35caSApple OSS Distributions        (0x150, "ISR[191:160]", None),
176*c54f35caSApple OSS Distributions        (0x160, "ISR[223:192]", None),
177*c54f35caSApple OSS Distributions        (0x170, "ISR[225:224]", None),
178*c54f35caSApple OSS Distributions        (0x180, "TMR[031:000]", None),
179*c54f35caSApple OSS Distributions        (0x190, "TMR[063:032]", None),
180*c54f35caSApple OSS Distributions        (0x1A0, "TMR[095:064]", None),
181*c54f35caSApple OSS Distributions        (0x1B0, "TMR[127:096]", None),
182*c54f35caSApple OSS Distributions        (0x1C0, "TMR[159:128]", None),
183*c54f35caSApple OSS Distributions        (0x1D0, "TMR[191:160]", None),
184*c54f35caSApple OSS Distributions        (0x1E0, "TMR[223:192]", None),
185*c54f35caSApple OSS Distributions        (0x1F0, "TMR[225:224]", None),
186*c54f35caSApple OSS Distributions        (0x200, "IRR[031:000]", None),
187*c54f35caSApple OSS Distributions        (0x210, "IRR[063:032]", None),
188*c54f35caSApple OSS Distributions        (0x220, "IRR[095:064]", None),
189*c54f35caSApple OSS Distributions        (0x230, "IRR[127:096]", None),
190*c54f35caSApple OSS Distributions        (0x240, "IRR[159:128]", None),
191*c54f35caSApple OSS Distributions        (0x250, "IRR[191:160]", None),
192*c54f35caSApple OSS Distributions        (0x260, "IRR[223:192]", None),
193*c54f35caSApple OSS Distributions        (0x270, "IRR[225:224]", None),
194*c54f35caSApple OSS Distributions        (0x280, "ERROR STATUS", None),
195*c54f35caSApple OSS Distributions        (0x300, "Interrupt Command LO", GetApicFields),
196*c54f35caSApple OSS Distributions        (0x310, "Interrupt Command HI", GetLapicIcrHiFields),
197*c54f35caSApple OSS Distributions        (0x320, "LVT Timer", GetApicFields),
198*c54f35caSApple OSS Distributions        (0x350, "LVT LINT0", GetApicFields),
199*c54f35caSApple OSS Distributions        (0x360, "LVT LINT1", GetApicFields),
200*c54f35caSApple OSS Distributions        (0x370, "LVT Error", GetApicFields),
201*c54f35caSApple OSS Distributions        (0x340, "LVT PerfMon", GetApicFields),
202*c54f35caSApple OSS Distributions        (0x330, "LVT Thermal", GetApicFields),
203*c54f35caSApple OSS Distributions        (0x3e0, "Timer Divide", GetLapicTimerDivideFields),
204*c54f35caSApple OSS Distributions        (0x380, "Timer Init Count", None),
205*c54f35caSApple OSS Distributions        (0x390, "Timer Cur Count", None)]
206*c54f35caSApple OSS Distributions    for reg in lapic_dump_table:
207*c54f35caSApple OSS Distributions        reg_val = DoLapicRead32(reg[0], xnudefines.lcpu_self)
208*c54f35caSApple OSS Distributions        if reg[2] == None:
209*c54f35caSApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x}".format(reg[0], reg[1], reg_val))
210*c54f35caSApple OSS Distributions        else:
211*c54f35caSApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x} {:s}".format(reg[0], reg[1],
212*c54f35caSApple OSS Distributions                reg_val, reg[2](reg_val)))
213*c54f35caSApple OSS Distributions
214*c54f35caSApple OSS Distributions######################################
215*c54f35caSApple OSS Distributions# IOAPIC Helper functions
216*c54f35caSApple OSS Distributions######################################
217*c54f35caSApple OSS Distributionsdef DoIoApicRead(offset):
218*c54f35caSApple OSS Distributions    """ Read the specified IOAPIC register
219*c54f35caSApple OSS Distributions        Params:
220*c54f35caSApple OSS Distributions            offset: int - index of IOAPIC register to read
221*c54f35caSApple OSS Distributions        Returns:
222*c54f35caSApple OSS Distributions            int 32-bit read value
223*c54f35caSApple OSS Distributions    """
224*c54f35caSApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
225*c54f35caSApple OSS Distributions    return ReadPhysInt(ioapic_base_addr + ioapic_data_off, 32)
226*c54f35caSApple OSS Distributions
227*c54f35caSApple OSS Distributionsdef DoIoApicWrite(offset, val):
228*c54f35caSApple OSS Distributions    """ Write the specified IOAPIC register
229*c54f35caSApple OSS Distributions        Params:
230*c54f35caSApple OSS Distributions            offset: int - index of IOAPIC register to write
231*c54f35caSApple OSS Distributions        Returns:
232*c54f35caSApple OSS Distributions            True if success, False if error
233*c54f35caSApple OSS Distributions    """
234*c54f35caSApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
235*c54f35caSApple OSS Distributions    return WritePhysInt(ioapic_base_addr + ioapic_data_off, val, 32)
236*c54f35caSApple OSS Distributions
237*c54f35caSApple OSS Distributionsdef DoIoApicDump():
238*c54f35caSApple OSS Distributions    """ Prints all IOAPIC registers
239*c54f35caSApple OSS Distributions    """
240*c54f35caSApple OSS Distributions    # Show IOAPIC ID register
241*c54f35caSApple OSS Distributions    ioapic_id = DoIoApicRead(0)
242*c54f35caSApple OSS Distributions    print("IOAPIC[0x00] {:9s}: {:#010x}".format("ID", ioapic_id))
243*c54f35caSApple OSS Distributions    # Show IOAPIC Version register
244*c54f35caSApple OSS Distributions    ioapic_ver = DoIoApicRead(1)
245*c54f35caSApple OSS Distributions    maxredir = ((ioapic_ver >> 16) & 0xff) + 1
246*c54f35caSApple OSS Distributions    print("IOAPIC[0x01] {:9s}: {:#010x}".format("VERSION", ioapic_ver) +\
247*c54f35caSApple OSS Distributions        "       [MAXREDIR={:02d} PRQ={:d} VERSION={:#04x}]".format(
248*c54f35caSApple OSS Distributions            maxredir,
249*c54f35caSApple OSS Distributions            ioapic_ver >> 15 & 0x1,
250*c54f35caSApple OSS Distributions            ioapic_ver & 0xff))
251*c54f35caSApple OSS Distributions    # Show IOAPIC redirect regsiters
252*c54f35caSApple OSS Distributions    for redir in range(maxredir):
253*c54f35caSApple OSS Distributions        redir_val_lo = DoIoApicRead(0x10 + redir * 2)
254*c54f35caSApple OSS Distributions        redir_val_hi = DoIoApicRead(0x10 + (redir * 2) + 1)
255*c54f35caSApple OSS Distributions        print("IOAPIC[{:#04x}] IOREDIR{:02d}: {:#08x}{:08x} {:s}".format(
256*c54f35caSApple OSS Distributions            0x10 + (redir * 2),
257*c54f35caSApple OSS Distributions            redir,
258*c54f35caSApple OSS Distributions            redir_val_hi,
259*c54f35caSApple OSS Distributions            redir_val_lo,
260*c54f35caSApple OSS Distributions            GetApicFields(redir_val_lo)))
261*c54f35caSApple OSS Distributions
262*c54f35caSApple OSS Distributions######################################
263*c54f35caSApple OSS Distributions# LLDB commands
264*c54f35caSApple OSS Distributions######################################
265*c54f35caSApple OSS Distributions@lldb_command('lapic_read32')
266*c54f35caSApple OSS Distributionsdef LapicRead32(cmd_args=None):
267*c54f35caSApple OSS Distributions    """ Read the LAPIC register at the specified offset. The CPU can
268*c54f35caSApple OSS Distributions        be optionally specified
269*c54f35caSApple OSS Distributions        Syntax: lapic_read32 <offset> [lcpu]
270*c54f35caSApple OSS Distributions    """
271*c54f35caSApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
272*c54f35caSApple OSS Distributions        print(LapicRead32.__doc__)
273*c54f35caSApple OSS Distributions        return
274*c54f35caSApple OSS Distributions    if not IsArchX86_64():
275*c54f35caSApple OSS Distributions        print("lapic_read32 not supported on this architecture.")
276*c54f35caSApple OSS Distributions        return
277*c54f35caSApple OSS Distributions
278*c54f35caSApple OSS Distributions    lcpu = xnudefines.lcpu_self
279*c54f35caSApple OSS Distributions    if len(cmd_args) > 1:
280*c54f35caSApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[1])
281*c54f35caSApple OSS Distributions
282*c54f35caSApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
283*c54f35caSApple OSS Distributions    read_val = DoLapicRead32(offset, lcpu)
284*c54f35caSApple OSS Distributions    print("LAPIC[{:#05x}]: {:#010x}".format(offset, read_val))
285*c54f35caSApple OSS Distributions
286*c54f35caSApple OSS Distributions@lldb_command('lapic_write32')
287*c54f35caSApple OSS Distributionsdef LapicWrite32(cmd_args=None):
288*c54f35caSApple OSS Distributions    """ Write the LAPIC register at the specified offset. The CPU can
289*c54f35caSApple OSS Distributions        be optionally specified. Prints an error message if there was a
290*c54f35caSApple OSS Distributions        failure. Prints nothing upon success.
291*c54f35caSApple OSS Distributions        Syntax: lapic_write32 <offset> <val> [lcpu]
292*c54f35caSApple OSS Distributions    """
293*c54f35caSApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
294*c54f35caSApple OSS Distributions        print(LapicWrite32.__doc__)
295*c54f35caSApple OSS Distributions        return
296*c54f35caSApple OSS Distributions    if not IsArchX86_64():
297*c54f35caSApple OSS Distributions        print("lapic_write32 not supported on this architecture.")
298*c54f35caSApple OSS Distributions        return
299*c54f35caSApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
300*c54f35caSApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
301*c54f35caSApple OSS Distributions    lcpu = xnudefines.lcpu_self
302*c54f35caSApple OSS Distributions    if len(cmd_args) > 2:
303*c54f35caSApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[2])
304*c54f35caSApple OSS Distributions    if not DoLapicWrite32(offset, write_val, lcpu):
305*c54f35caSApple OSS Distributions        print("lapic_write32 FAILED")
306*c54f35caSApple OSS Distributions
307*c54f35caSApple OSS Distributions@lldb_command('lapic_dump')
308*c54f35caSApple OSS Distributionsdef LapicDump(cmd_args=None):
309*c54f35caSApple OSS Distributions    """ Prints all LAPIC entries
310*c54f35caSApple OSS Distributions    """
311*c54f35caSApple OSS Distributions    if not IsArchX86_64():
312*c54f35caSApple OSS Distributions        print("lapic_dump not supported on this architecture.")
313*c54f35caSApple OSS Distributions        return
314*c54f35caSApple OSS Distributions    DoLapicDump()
315*c54f35caSApple OSS Distributions
316*c54f35caSApple OSS Distributions@lldb_command('ioapic_read32')
317*c54f35caSApple OSS Distributionsdef IoApicRead32(cmd_args=None):
318*c54f35caSApple OSS Distributions    """ Read the IOAPIC register at the specified offset.
319*c54f35caSApple OSS Distributions        Syntax: ioapic_read32 <offset>
320*c54f35caSApple OSS Distributions    """
321*c54f35caSApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
322*c54f35caSApple OSS Distributions        print(IoApicRead32.__doc__)
323*c54f35caSApple OSS Distributions        return
324*c54f35caSApple OSS Distributions    if not IsArchX86_64():
325*c54f35caSApple OSS Distributions        print("ioapic_read32 not supported on this architecture.")
326*c54f35caSApple OSS Distributions        return
327*c54f35caSApple OSS Distributions
328*c54f35caSApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
329*c54f35caSApple OSS Distributions    read_val = DoIoApicRead(offset)
330*c54f35caSApple OSS Distributions    print("IOAPIC[{:#04x}]: {:#010x}".format(offset, read_val))
331*c54f35caSApple OSS Distributions
332*c54f35caSApple OSS Distributions@lldb_command('ioapic_write32')
333*c54f35caSApple OSS Distributionsdef IoApicWrite32(cmd_args=None):
334*c54f35caSApple OSS Distributions    """ Write the IOAPIC register at the specified offset.
335*c54f35caSApple OSS Distributions        Syntax: ioapic_write32 <offset> <val>
336*c54f35caSApple OSS Distributions    """
337*c54f35caSApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
338*c54f35caSApple OSS Distributions        print(IoApicWrite32.__doc__)
339*c54f35caSApple OSS Distributions        return
340*c54f35caSApple OSS Distributions    if not IsArchX86_64():
341*c54f35caSApple OSS Distributions        print("ioapic_write32 not supported on this architecture.")
342*c54f35caSApple OSS Distributions        return
343*c54f35caSApple OSS Distributions
344*c54f35caSApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
345*c54f35caSApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
346*c54f35caSApple OSS Distributions    if not DoIoApicWrite(offset, write_val):
347*c54f35caSApple OSS Distributions        print("ioapic_write32 FAILED")
348*c54f35caSApple OSS Distributions    return
349*c54f35caSApple OSS Distributions
350*c54f35caSApple OSS Distributions@lldb_command('ioapic_dump')
351*c54f35caSApple OSS Distributionsdef IoApicDump(cmd_args=None):
352*c54f35caSApple OSS Distributions    """ Prints all IOAPIC entries
353*c54f35caSApple OSS Distributions    """
354*c54f35caSApple OSS Distributions    if not IsArchX86_64():
355*c54f35caSApple OSS Distributions        print("ioapic_dump not supported on this architecture.")
356*c54f35caSApple OSS Distributions        return
357*c54f35caSApple OSS Distributions    DoIoApicDump()
358*c54f35caSApple OSS Distributions
359