xref: /xnu-8796.101.5/osfmk/corecrypto/cc_runtime_config.h (revision aca3beaa3dfbd42498b42c5e5ce20a938e6554e5)
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35 
36 #ifndef CORECRYPTO_CC_RUNTIME_CONFIG_H_
37 #define CORECRYPTO_CC_RUNTIME_CONFIG_H_
38 
39 #include <corecrypto/cc_config.h>
40 
41 #if defined(__x86_64__) || defined(__i386__)
42 
43 #if CC_KERNEL
44     #include <i386/cpuid.h>
45     #define CC_HAS_RDRAND() ((cpuid_features() & CPUID_FEATURE_RDRAND) != 0)
46     #define CC_HAS_AESNI() ((cpuid_features() & CPUID_FEATURE_AES) != 0)
47     #define CC_HAS_SupplementalSSE3() ((cpuid_features() & CPUID_FEATURE_SSSE3) != 0)
48     #define CC_HAS_AVX1() ((cpuid_features() & CPUID_FEATURE_AVX1_0) != 0)
49     #define CC_HAS_AVX2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX2) != 0)
50     #define CC_HAS_AVX512_AND_IN_KERNEL()    ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX512F) !=0)
51     #define CC_HAS_BMI2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_BMI2) != 0)
52     #define CC_HAS_ADX() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_ADX) != 0)
53 
54 #elif CC_DARWIN && CC_INTERNAL_SDK
55     #include <System/i386/cpu_capabilities.h>
56     #define CC_HAS_RDRAND() (_get_cpu_capabilities() & kHasRDRAND)
57     #define CC_HAS_AESNI() (_get_cpu_capabilities() & kHasAES)
58     #define CC_HAS_SupplementalSSE3() (_get_cpu_capabilities() & kHasSupplementalSSE3)
59     #define CC_HAS_AVX1() (_get_cpu_capabilities() & kHasAVX1_0)
60     #define CC_HAS_AVX2() (_get_cpu_capabilities() & kHasAVX2_0)
61     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
62     #define CC_HAS_BMI2() (_get_cpu_capabilities() & kHasBMI2)
63     #define CC_HAS_ADX() (_get_cpu_capabilities() & kHasADX)
64 
65 #elif CC_SGX
66     #include <cpuid.h>
67     #include <stdbool.h>
68     #include <stdint.h>
69 
70     #define CPUID_REG_RAX 0
71     #define CPUID_REG_RBX 1
72     #define CPUID_REG_RCX 2
73     #define CPUID_REG_RDX 3
74 
75     #define CPUID_FEATURE_AES 25
76     #define CPUID_FEATURE_SSE3 0
77     #define CPUID_FEATURE_AVX1 28
78     #define CPUID_FEATURE_LEAF7_AVX2 5
79     #define CPUID_FEATURE_LEAF7_BMI2 8
80     #define CPUID_FEATURE_RDRAND 30
81     #define CPUID_FEATURE_LEAF7_ADX 19
82 
83 CC_INLINE bool
_cpu_supports(uint64_t leaf,uint64_t subleaf,uint8_t cpuid_register,uint8_t bit)84 _cpu_supports(uint64_t leaf, uint64_t subleaf, uint8_t cpuid_register, uint8_t bit)
85 {
86 	uint64_t registers[4] = {0};
87 	registers[CPUID_REG_RAX] = leaf;
88 	registers[CPUID_REG_RCX] = subleaf;
89 	if (oe_emulate_cpuid(&registers[CPUID_REG_RAX], &registers[CPUID_REG_RBX], &registers[CPUID_REG_RCX], &registers[CPUID_REG_RDX])) {
90 		return false;
91 	}
92 	return (registers[cpuid_register] >> bit) & 1;
93 }
94 
95 
96     #define CC_HAS_AESNI() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AES)
97     #define CC_HAS_SupplementalSSE3() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_SSE3)
98     #define CC_HAS_AVX1() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AVX1)
99     #define CC_HAS_AVX2() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_AVX2)
100     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
101     #define CC_HAS_BMI2() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_BMI2)
102     #define CC_HAS_RDRAND() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_RDRAND)
103     #define CC_HAS_ADX() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_ADX)
104 #else
105     #define CC_HAS_AESNI() __builtin_cpu_supports("aes")
106     #define CC_HAS_SupplementalSSE3() __builtin_cpu_supports("ssse3")
107     #define CC_HAS_AVX1() __builtin_cpu_supports("avx")
108     #define CC_HAS_AVX2() __builtin_cpu_supports("avx2")
109     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
110     #define CC_HAS_BMI2() __builtin_cpu_supports("bmi2")
111 #if CC_LINUX || !CC_INTERNAL_SDK
112     #include <cpuid.h>
113     #include <stdbool.h>
114 
115 CC_INLINE bool
_cpu_supports_rdrand()116 _cpu_supports_rdrand()
117 {
118 	unsigned int eax, ebx, ecx, edx;
119 	__cpuid(1, eax, ebx, ecx, edx);
120 	return ecx & bit_RDRND;
121 }
122 
123 CC_INLINE bool
_cpu_supports_adx()124 _cpu_supports_adx()
125 {
126 	unsigned int eax, ebx, ecx, edx;
127 	__cpuid_count(7, 0, eax, ebx, ecx, edx);
128 	return ebx & bit_ADX;
129 }
130 
131     #define CC_HAS_RDRAND() _cpu_supports_rdrand()
132     #define CC_HAS_ADX() _cpu_supports_adx()
133 #else
134     #define CC_HAS_RDRAND() 0
135     #define CC_HAS_ADX() 0
136 #endif
137 
138 #endif
139 
140 #endif  // defined(__x86_64__) || defined(__i386__)
141 
142 #if defined(__arm64__)
143 
144 #if CC_DARWIN && CC_INTERNAL_SDK
145     #include <System/arm/cpu_capabilities.h>
146     #define CC_HAS_SHA512() (_get_cpu_capabilities() & kHasARMv82SHA512)
147     #define CC_HAS_SHA3() (_get_cpu_capabilities() & kHasARMv82SHA3)
148 #else
149     #define CC_HAS_SHA512() (0)
150     #define CC_HAS_SHA3() (0)
151 #endif
152 
153 #endif // defined(__arm64__)
154 
155 #endif /* CORECRYPTO_CC_RUNTIME_CONFIG_H_ */
156