xref: /xnu-8792.81.2/tools/lldbmacros/apic.py (revision 19c3b8c28c31cb8130e034cfb5df6bf9ba342d90)
1*19c3b8c2SApple OSS Distributionsfrom __future__ import absolute_import, print_function
2*19c3b8c2SApple OSS Distributions
3*19c3b8c2SApple OSS Distributionsfrom builtins import range
4*19c3b8c2SApple OSS Distributions
5*19c3b8c2SApple OSS Distributionsfrom xnu import *
6*19c3b8c2SApple OSS Distributionsfrom misc import DoReadMsr64, DoWriteMsr64
7*19c3b8c2SApple OSS Distributions
8*19c3b8c2SApple OSS Distributions######################################
9*19c3b8c2SApple OSS Distributions# Globals
10*19c3b8c2SApple OSS Distributions######################################
11*19c3b8c2SApple OSS Distributionslapic_base_addr = 0xfee00000
12*19c3b8c2SApple OSS Distributionsioapic_base_addr = 0xfec00000
13*19c3b8c2SApple OSS Distributionsioapic_index_off = 0x0
14*19c3b8c2SApple OSS Distributionsioapic_data_off = 0x10
15*19c3b8c2SApple OSS Distributions
16*19c3b8c2SApple OSS Distributions
17*19c3b8c2SApple OSS Distributions######################################
18*19c3b8c2SApple OSS Distributions# LAPIC Helper functions
19*19c3b8c2SApple OSS Distributions######################################
20*19c3b8c2SApple OSS Distributionsdef IsArchX86_64():
21*19c3b8c2SApple OSS Distributions    """ Determines if target machine is x86_64
22*19c3b8c2SApple OSS Distributions        Returns:
23*19c3b8c2SApple OSS Distributions            True if running on x86_64, False otherwise
24*19c3b8c2SApple OSS Distributions    """
25*19c3b8c2SApple OSS Distributions    return kern.arch == "x86_64"
26*19c3b8c2SApple OSS Distributions
27*19c3b8c2SApple OSS Distributions
28*19c3b8c2SApple OSS Distributions@static_var('x2apic_enabled', -1)
29*19c3b8c2SApple OSS Distributionsdef IsX2ApicEnabled():
30*19c3b8c2SApple OSS Distributions    """ Reads the APIC configuration MSR to determine if APIC is operating
31*19c3b8c2SApple OSS Distributions        in x2APIC mode. The MSR is read the first time this function is
32*19c3b8c2SApple OSS Distributions        called, and the answer is remembered for all subsequent calls.
33*19c3b8c2SApple OSS Distributions        Returns:
34*19c3b8c2SApple OSS Distributions            True if APIC is x2APIC mode
35*19c3b8c2SApple OSS Distributions            False if not
36*19c3b8c2SApple OSS Distributions    """
37*19c3b8c2SApple OSS Distributions    apic_cfg_msr = 0x1b
38*19c3b8c2SApple OSS Distributions    apic_cfg_msr_x2en_mask = 0xc00
39*19c3b8c2SApple OSS Distributions    if IsX2ApicEnabled.x2apic_enabled < 0:
40*19c3b8c2SApple OSS Distributions        if (int(DoReadMsr64(apic_cfg_msr, xnudefines.lcpu_self)) & apic_cfg_msr_x2en_mask ==
41*19c3b8c2SApple OSS Distributions            apic_cfg_msr_x2en_mask):
42*19c3b8c2SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 1
43*19c3b8c2SApple OSS Distributions        else:
44*19c3b8c2SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 0
45*19c3b8c2SApple OSS Distributions    return IsX2ApicEnabled.x2apic_enabled == 1
46*19c3b8c2SApple OSS Distributions
47*19c3b8c2SApple OSS Distributionsdef DoLapicRead32(offset, cpu):
48*19c3b8c2SApple OSS Distributions    """ Read the specified 32-bit LAPIC register
49*19c3b8c2SApple OSS Distributions        Params:
50*19c3b8c2SApple OSS Distributions            offset: int - index of LAPIC register to read
51*19c3b8c2SApple OSS Distributions            cpu: int - cpu ID
52*19c3b8c2SApple OSS Distributions        Returns:
53*19c3b8c2SApple OSS Distributions            The 32-bit LAPIC register value
54*19c3b8c2SApple OSS Distributions    """
55*19c3b8c2SApple OSS Distributions    if IsX2ApicEnabled():
56*19c3b8c2SApple OSS Distributions        return DoReadMsr64(offset >> 4, cpu)
57*19c3b8c2SApple OSS Distributions    else:
58*19c3b8c2SApple OSS Distributions        return ReadPhysInt(lapic_base_addr + offset, 32, cpu)
59*19c3b8c2SApple OSS Distributions
60*19c3b8c2SApple OSS Distributionsdef DoLapicWrite32(offset, val, cpu):
61*19c3b8c2SApple OSS Distributions    """ Write the specified 32-bit LAPIC register
62*19c3b8c2SApple OSS Distributions        Params:
63*19c3b8c2SApple OSS Distributions            offset: int - index of LAPIC register to write
64*19c3b8c2SApple OSS Distributions            val: int - write value
65*19c3b8c2SApple OSS Distributions            cpu: int - cpu ID
66*19c3b8c2SApple OSS Distributions        Returns:
67*19c3b8c2SApple OSS Distributions            True if success, False if error
68*19c3b8c2SApple OSS Distributions    """
69*19c3b8c2SApple OSS Distributions    if IsX2ApicEnabled():
70*19c3b8c2SApple OSS Distributions        return DoWriteMsr64(offset >> 4, cpu, val)
71*19c3b8c2SApple OSS Distributions    else:
72*19c3b8c2SApple OSS Distributions        return WritePhysInt(lapic_base_addr + offset, val, 32)
73*19c3b8c2SApple OSS Distributions
74*19c3b8c2SApple OSS Distributions######################################
75*19c3b8c2SApple OSS Distributions# LAPIC Register Print functions
76*19c3b8c2SApple OSS Distributions######################################
77*19c3b8c2SApple OSS Distributionsdef GetLapicVersionFields(reg_val):
78*19c3b8c2SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
79*19c3b8c2SApple OSS Distributions        version register.
80*19c3b8c2SApple OSS Distributions        Params:
81*19c3b8c2SApple OSS Distributions            reg_val: int - the value of the version register to print
82*19c3b8c2SApple OSS Distributions        Returns:
83*19c3b8c2SApple OSS Distributions            string showing the fields
84*19c3b8c2SApple OSS Distributions    """
85*19c3b8c2SApple OSS Distributions    lvt_num = (reg_val >> 16) + 1
86*19c3b8c2SApple OSS Distributions    version = reg_val & 0xff
87*19c3b8c2SApple OSS Distributions    return "[VERSION={:d} MaxLVT={:d}]".format(lvt_num, version)
88*19c3b8c2SApple OSS Distributions
89*19c3b8c2SApple OSS Distributionsdef GetLapicSpuriousVectorFields(reg_val):
90*19c3b8c2SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
91*19c3b8c2SApple OSS Distributions        spurious vector register.
92*19c3b8c2SApple OSS Distributions        Params:
93*19c3b8c2SApple OSS Distributions            reg_val: int - the value of the spurious vector registre to print
94*19c3b8c2SApple OSS Distributions        Returns:
95*19c3b8c2SApple OSS Distributions            string showing the fields
96*19c3b8c2SApple OSS Distributions    """
97*19c3b8c2SApple OSS Distributions    vector = reg_val & 0xff
98*19c3b8c2SApple OSS Distributions    enabled = (reg_val & 0x100) >> 8
99*19c3b8c2SApple OSS Distributions    return "[VEC={:3d} ENABLED={:d}]".format(vector, enabled)
100*19c3b8c2SApple OSS Distributions
101*19c3b8c2SApple OSS Distributionsdef GetLapicIcrHiFields(reg_val):
102*19c3b8c2SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
103*19c3b8c2SApple OSS Distributions        upper 32-bits of the Interrupt Control Register (ICR).
104*19c3b8c2SApple OSS Distributions        Params:
105*19c3b8c2SApple OSS Distributions            reg_val: int - the value of the ICR to show
106*19c3b8c2SApple OSS Distributions        Returns:
107*19c3b8c2SApple OSS Distributions            string showing the fields
108*19c3b8c2SApple OSS Distributions    """
109*19c3b8c2SApple OSS Distributions    dest = reg_val >> 24
110*19c3b8c2SApple OSS Distributions    return "[DEST={:d}]".format(dest)
111*19c3b8c2SApple OSS Distributions
112*19c3b8c2SApple OSS Distributionsdef GetLapicTimerDivideFields(reg_val):
113*19c3b8c2SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
114*19c3b8c2SApple OSS Distributions        timer divide register.
115*19c3b8c2SApple OSS Distributions        Params:
116*19c3b8c2SApple OSS Distributions            reg_val: int - the value of the timer divide register
117*19c3b8c2SApple OSS Distributions        Returns:
118*19c3b8c2SApple OSS Distributions            string showing the fields
119*19c3b8c2SApple OSS Distributions    """
120*19c3b8c2SApple OSS Distributions    divide_val = ((reg_val & 0x8) >> 1) | (reg_val & 0x3)
121*19c3b8c2SApple OSS Distributions    if divide_val == 0x7:
122*19c3b8c2SApple OSS Distributions        divide_by = 1
123*19c3b8c2SApple OSS Distributions    else:
124*19c3b8c2SApple OSS Distributions        divide_by = 2 << divide_val
125*19c3b8c2SApple OSS Distributions    return "[Divide by {:d}]".format(divide_by)
126*19c3b8c2SApple OSS Distributions
127*19c3b8c2SApple OSS Distributionsdef GetApicFields(reg_val):
128*19c3b8c2SApple OSS Distributions    """ Helper function for DoLapicDump and DoIoapicDump that prints the
129*19c3b8c2SApple OSS Distributions        fields of the APIC register.
130*19c3b8c2SApple OSS Distributions        Params:
131*19c3b8c2SApple OSS Distributions            reg_val: int - the value of the APIC register to print
132*19c3b8c2SApple OSS Distributions        Returns:
133*19c3b8c2SApple OSS Distributions            string showing the fields
134*19c3b8c2SApple OSS Distributions    """
135*19c3b8c2SApple OSS Distributions    vector = reg_val & 0xff
136*19c3b8c2SApple OSS Distributions    tsc_deadline = reg_val & 0x40000
137*19c3b8c2SApple OSS Distributions    periodic = reg_val & 0x20000
138*19c3b8c2SApple OSS Distributions    masked = reg_val & 0x10000
139*19c3b8c2SApple OSS Distributions    trigger = reg_val & 0x8000
140*19c3b8c2SApple OSS Distributions    polarity = reg_val & 0x2000
141*19c3b8c2SApple OSS Distributions    pending = reg_val & 0x1000
142*19c3b8c2SApple OSS Distributions
143*19c3b8c2SApple OSS Distributions    ret_str = "[VEC={:3d} MASK={:3s} TRIG={:5s} POL={:4s} PEND={:3s}".format(
144*19c3b8c2SApple OSS Distributions        vector,
145*19c3b8c2SApple OSS Distributions        "no" if masked == 0 else "yes",
146*19c3b8c2SApple OSS Distributions        "edge" if trigger == 0 else "level",
147*19c3b8c2SApple OSS Distributions        "low" if polarity == 0 else "high",
148*19c3b8c2SApple OSS Distributions        "no" if pending == 0 else "yes")
149*19c3b8c2SApple OSS Distributions    if not periodic == 0:
150*19c3b8c2SApple OSS Distributions        ret_str += " PERIODIC"
151*19c3b8c2SApple OSS Distributions    if not tsc_deadline == 0:
152*19c3b8c2SApple OSS Distributions        ret_str += " TSC_DEADLINE"
153*19c3b8c2SApple OSS Distributions    ret_str += "]"
154*19c3b8c2SApple OSS Distributions    return ret_str
155*19c3b8c2SApple OSS Distributions
156*19c3b8c2SApple OSS Distributionsdef DoLapicDump():
157*19c3b8c2SApple OSS Distributions    """ Prints all LAPIC registers
158*19c3b8c2SApple OSS Distributions    """
159*19c3b8c2SApple OSS Distributions    print("LAPIC operating mode: {:s}".format(
160*19c3b8c2SApple OSS Distributions        "x2APIC" if IsX2ApicEnabled() else "xAPIC"))
161*19c3b8c2SApple OSS Distributions    # LAPIC register offset, register name, field formatting function
162*19c3b8c2SApple OSS Distributions    lapic_dump_table = [
163*19c3b8c2SApple OSS Distributions        (0x020, "ID", None),
164*19c3b8c2SApple OSS Distributions        (0x030, "VERSION", GetLapicVersionFields),
165*19c3b8c2SApple OSS Distributions        (0x080, "TASK PRIORITY", None),
166*19c3b8c2SApple OSS Distributions        (0x0A0, "PROCESSOR PRIORITY", None),
167*19c3b8c2SApple OSS Distributions        (0x0D0, "LOGICAL DEST", None),
168*19c3b8c2SApple OSS Distributions        (0x0E0, "DEST FORMAT", None),
169*19c3b8c2SApple OSS Distributions        (0x0F0, "SPURIOUS VECTOR", GetLapicSpuriousVectorFields),
170*19c3b8c2SApple OSS Distributions        (0x100, "ISR[031:000]", None),
171*19c3b8c2SApple OSS Distributions        (0x110, "ISR[063:032]", None),
172*19c3b8c2SApple OSS Distributions        (0x120, "ISR[095:064]", None),
173*19c3b8c2SApple OSS Distributions        (0x130, "ISR[127:096]", None),
174*19c3b8c2SApple OSS Distributions        (0x140, "ISR[159:128]", None),
175*19c3b8c2SApple OSS Distributions        (0x150, "ISR[191:160]", None),
176*19c3b8c2SApple OSS Distributions        (0x160, "ISR[223:192]", None),
177*19c3b8c2SApple OSS Distributions        (0x170, "ISR[225:224]", None),
178*19c3b8c2SApple OSS Distributions        (0x180, "TMR[031:000]", None),
179*19c3b8c2SApple OSS Distributions        (0x190, "TMR[063:032]", None),
180*19c3b8c2SApple OSS Distributions        (0x1A0, "TMR[095:064]", None),
181*19c3b8c2SApple OSS Distributions        (0x1B0, "TMR[127:096]", None),
182*19c3b8c2SApple OSS Distributions        (0x1C0, "TMR[159:128]", None),
183*19c3b8c2SApple OSS Distributions        (0x1D0, "TMR[191:160]", None),
184*19c3b8c2SApple OSS Distributions        (0x1E0, "TMR[223:192]", None),
185*19c3b8c2SApple OSS Distributions        (0x1F0, "TMR[225:224]", None),
186*19c3b8c2SApple OSS Distributions        (0x200, "IRR[031:000]", None),
187*19c3b8c2SApple OSS Distributions        (0x210, "IRR[063:032]", None),
188*19c3b8c2SApple OSS Distributions        (0x220, "IRR[095:064]", None),
189*19c3b8c2SApple OSS Distributions        (0x230, "IRR[127:096]", None),
190*19c3b8c2SApple OSS Distributions        (0x240, "IRR[159:128]", None),
191*19c3b8c2SApple OSS Distributions        (0x250, "IRR[191:160]", None),
192*19c3b8c2SApple OSS Distributions        (0x260, "IRR[223:192]", None),
193*19c3b8c2SApple OSS Distributions        (0x270, "IRR[225:224]", None),
194*19c3b8c2SApple OSS Distributions        (0x280, "ERROR STATUS", None),
195*19c3b8c2SApple OSS Distributions        (0x300, "Interrupt Command LO", GetApicFields),
196*19c3b8c2SApple OSS Distributions        (0x310, "Interrupt Command HI", GetLapicIcrHiFields),
197*19c3b8c2SApple OSS Distributions        (0x320, "LVT Timer", GetApicFields),
198*19c3b8c2SApple OSS Distributions        (0x350, "LVT LINT0", GetApicFields),
199*19c3b8c2SApple OSS Distributions        (0x360, "LVT LINT1", GetApicFields),
200*19c3b8c2SApple OSS Distributions        (0x370, "LVT Error", GetApicFields),
201*19c3b8c2SApple OSS Distributions        (0x340, "LVT PerfMon", GetApicFields),
202*19c3b8c2SApple OSS Distributions        (0x330, "LVT Thermal", GetApicFields),
203*19c3b8c2SApple OSS Distributions        (0x3e0, "Timer Divide", GetLapicTimerDivideFields),
204*19c3b8c2SApple OSS Distributions        (0x380, "Timer Init Count", None),
205*19c3b8c2SApple OSS Distributions        (0x390, "Timer Cur Count", None)]
206*19c3b8c2SApple OSS Distributions    for reg in lapic_dump_table:
207*19c3b8c2SApple OSS Distributions        reg_val = DoLapicRead32(reg[0], xnudefines.lcpu_self)
208*19c3b8c2SApple OSS Distributions        if reg[2] == None:
209*19c3b8c2SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x}".format(reg[0], reg[1], reg_val))
210*19c3b8c2SApple OSS Distributions        else:
211*19c3b8c2SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x} {:s}".format(reg[0], reg[1],
212*19c3b8c2SApple OSS Distributions                reg_val, reg[2](reg_val)))
213*19c3b8c2SApple OSS Distributions
214*19c3b8c2SApple OSS Distributions######################################
215*19c3b8c2SApple OSS Distributions# IOAPIC Helper functions
216*19c3b8c2SApple OSS Distributions######################################
217*19c3b8c2SApple OSS Distributionsdef DoIoApicRead(offset):
218*19c3b8c2SApple OSS Distributions    """ Read the specified IOAPIC register
219*19c3b8c2SApple OSS Distributions        Params:
220*19c3b8c2SApple OSS Distributions            offset: int - index of IOAPIC register to read
221*19c3b8c2SApple OSS Distributions        Returns:
222*19c3b8c2SApple OSS Distributions            int 32-bit read value
223*19c3b8c2SApple OSS Distributions    """
224*19c3b8c2SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
225*19c3b8c2SApple OSS Distributions    return ReadPhysInt(ioapic_base_addr + ioapic_data_off, 32)
226*19c3b8c2SApple OSS Distributions
227*19c3b8c2SApple OSS Distributionsdef DoIoApicWrite(offset, val):
228*19c3b8c2SApple OSS Distributions    """ Write the specified IOAPIC register
229*19c3b8c2SApple OSS Distributions        Params:
230*19c3b8c2SApple OSS Distributions            offset: int - index of IOAPIC register to write
231*19c3b8c2SApple OSS Distributions        Returns:
232*19c3b8c2SApple OSS Distributions            True if success, False if error
233*19c3b8c2SApple OSS Distributions    """
234*19c3b8c2SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
235*19c3b8c2SApple OSS Distributions    return WritePhysInt(ioapic_base_addr + ioapic_data_off, val, 32)
236*19c3b8c2SApple OSS Distributions
237*19c3b8c2SApple OSS Distributionsdef DoIoApicDump():
238*19c3b8c2SApple OSS Distributions    """ Prints all IOAPIC registers
239*19c3b8c2SApple OSS Distributions    """
240*19c3b8c2SApple OSS Distributions    # Show IOAPIC ID register
241*19c3b8c2SApple OSS Distributions    ioapic_id = DoIoApicRead(0)
242*19c3b8c2SApple OSS Distributions    print("IOAPIC[0x00] {:9s}: {:#010x}".format("ID", ioapic_id))
243*19c3b8c2SApple OSS Distributions    # Show IOAPIC Version register
244*19c3b8c2SApple OSS Distributions    ioapic_ver = DoIoApicRead(1)
245*19c3b8c2SApple OSS Distributions    maxredir = ((ioapic_ver >> 16) & 0xff) + 1
246*19c3b8c2SApple OSS Distributions    print("IOAPIC[0x01] {:9s}: {:#010x}".format("VERSION", ioapic_ver) +\
247*19c3b8c2SApple OSS Distributions        "       [MAXREDIR={:02d} PRQ={:d} VERSION={:#04x}]".format(
248*19c3b8c2SApple OSS Distributions            maxredir,
249*19c3b8c2SApple OSS Distributions            ioapic_ver >> 15 & 0x1,
250*19c3b8c2SApple OSS Distributions            ioapic_ver & 0xff))
251*19c3b8c2SApple OSS Distributions    # Show IOAPIC redirect regsiters
252*19c3b8c2SApple OSS Distributions    for redir in range(maxredir):
253*19c3b8c2SApple OSS Distributions        redir_val_lo = DoIoApicRead(0x10 + redir * 2)
254*19c3b8c2SApple OSS Distributions        redir_val_hi = DoIoApicRead(0x10 + (redir * 2) + 1)
255*19c3b8c2SApple OSS Distributions        print("IOAPIC[{:#04x}] IOREDIR{:02d}: {:#08x}{:08x} {:s}".format(
256*19c3b8c2SApple OSS Distributions            0x10 + (redir * 2),
257*19c3b8c2SApple OSS Distributions            redir,
258*19c3b8c2SApple OSS Distributions            redir_val_hi,
259*19c3b8c2SApple OSS Distributions            redir_val_lo,
260*19c3b8c2SApple OSS Distributions            GetApicFields(redir_val_lo)))
261*19c3b8c2SApple OSS Distributions
262*19c3b8c2SApple OSS Distributions######################################
263*19c3b8c2SApple OSS Distributions# LLDB commands
264*19c3b8c2SApple OSS Distributions######################################
265*19c3b8c2SApple OSS Distributions@lldb_command('lapic_read32')
266*19c3b8c2SApple OSS Distributionsdef LapicRead32(cmd_args=None):
267*19c3b8c2SApple OSS Distributions    """ Read the LAPIC register at the specified offset. The CPU can
268*19c3b8c2SApple OSS Distributions        be optionally specified
269*19c3b8c2SApple OSS Distributions        Syntax: lapic_read32 <offset> [lcpu]
270*19c3b8c2SApple OSS Distributions    """
271*19c3b8c2SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
272*19c3b8c2SApple OSS Distributions        print(LapicRead32.__doc__)
273*19c3b8c2SApple OSS Distributions        return
274*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
275*19c3b8c2SApple OSS Distributions        print("lapic_read32 not supported on this architecture.")
276*19c3b8c2SApple OSS Distributions        return
277*19c3b8c2SApple OSS Distributions
278*19c3b8c2SApple OSS Distributions    lcpu = xnudefines.lcpu_self
279*19c3b8c2SApple OSS Distributions    if len(cmd_args) > 1:
280*19c3b8c2SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[1])
281*19c3b8c2SApple OSS Distributions
282*19c3b8c2SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
283*19c3b8c2SApple OSS Distributions    read_val = DoLapicRead32(offset, lcpu)
284*19c3b8c2SApple OSS Distributions    print("LAPIC[{:#05x}]: {:#010x}".format(offset, read_val))
285*19c3b8c2SApple OSS Distributions
286*19c3b8c2SApple OSS Distributions@lldb_command('lapic_write32')
287*19c3b8c2SApple OSS Distributionsdef LapicWrite32(cmd_args=None):
288*19c3b8c2SApple OSS Distributions    """ Write the LAPIC register at the specified offset. The CPU can
289*19c3b8c2SApple OSS Distributions        be optionally specified. Prints an error message if there was a
290*19c3b8c2SApple OSS Distributions        failure. Prints nothing upon success.
291*19c3b8c2SApple OSS Distributions        Syntax: lapic_write32 <offset> <val> [lcpu]
292*19c3b8c2SApple OSS Distributions    """
293*19c3b8c2SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
294*19c3b8c2SApple OSS Distributions        print(LapicWrite32.__doc__)
295*19c3b8c2SApple OSS Distributions        return
296*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
297*19c3b8c2SApple OSS Distributions        print("lapic_write32 not supported on this architecture.")
298*19c3b8c2SApple OSS Distributions        return
299*19c3b8c2SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
300*19c3b8c2SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
301*19c3b8c2SApple OSS Distributions    lcpu = xnudefines.lcpu_self
302*19c3b8c2SApple OSS Distributions    if len(cmd_args) > 2:
303*19c3b8c2SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[2])
304*19c3b8c2SApple OSS Distributions    if not DoLapicWrite32(offset, write_val, lcpu):
305*19c3b8c2SApple OSS Distributions        print("lapic_write32 FAILED")
306*19c3b8c2SApple OSS Distributions
307*19c3b8c2SApple OSS Distributions@lldb_command('lapic_dump')
308*19c3b8c2SApple OSS Distributionsdef LapicDump(cmd_args=None):
309*19c3b8c2SApple OSS Distributions    """ Prints all LAPIC entries
310*19c3b8c2SApple OSS Distributions    """
311*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
312*19c3b8c2SApple OSS Distributions        print("lapic_dump not supported on this architecture.")
313*19c3b8c2SApple OSS Distributions        return
314*19c3b8c2SApple OSS Distributions    DoLapicDump()
315*19c3b8c2SApple OSS Distributions
316*19c3b8c2SApple OSS Distributions@lldb_command('ioapic_read32')
317*19c3b8c2SApple OSS Distributionsdef IoApicRead32(cmd_args=None):
318*19c3b8c2SApple OSS Distributions    """ Read the IOAPIC register at the specified offset.
319*19c3b8c2SApple OSS Distributions        Syntax: ioapic_read32 <offset>
320*19c3b8c2SApple OSS Distributions    """
321*19c3b8c2SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
322*19c3b8c2SApple OSS Distributions        print(IoApicRead32.__doc__)
323*19c3b8c2SApple OSS Distributions        return
324*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
325*19c3b8c2SApple OSS Distributions        print("ioapic_read32 not supported on this architecture.")
326*19c3b8c2SApple OSS Distributions        return
327*19c3b8c2SApple OSS Distributions
328*19c3b8c2SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
329*19c3b8c2SApple OSS Distributions    read_val = DoIoApicRead(offset)
330*19c3b8c2SApple OSS Distributions    print("IOAPIC[{:#04x}]: {:#010x}".format(offset, read_val))
331*19c3b8c2SApple OSS Distributions
332*19c3b8c2SApple OSS Distributions@lldb_command('ioapic_write32')
333*19c3b8c2SApple OSS Distributionsdef IoApicWrite32(cmd_args=None):
334*19c3b8c2SApple OSS Distributions    """ Write the IOAPIC register at the specified offset.
335*19c3b8c2SApple OSS Distributions        Syntax: ioapic_write32 <offset> <val>
336*19c3b8c2SApple OSS Distributions    """
337*19c3b8c2SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
338*19c3b8c2SApple OSS Distributions        print(IoApicWrite32.__doc__)
339*19c3b8c2SApple OSS Distributions        return
340*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
341*19c3b8c2SApple OSS Distributions        print("ioapic_write32 not supported on this architecture.")
342*19c3b8c2SApple OSS Distributions        return
343*19c3b8c2SApple OSS Distributions
344*19c3b8c2SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
345*19c3b8c2SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
346*19c3b8c2SApple OSS Distributions    if not DoIoApicWrite(offset, write_val):
347*19c3b8c2SApple OSS Distributions        print("ioapic_write32 FAILED")
348*19c3b8c2SApple OSS Distributions    return
349*19c3b8c2SApple OSS Distributions
350*19c3b8c2SApple OSS Distributions@lldb_command('ioapic_dump')
351*19c3b8c2SApple OSS Distributionsdef IoApicDump(cmd_args=None):
352*19c3b8c2SApple OSS Distributions    """ Prints all IOAPIC entries
353*19c3b8c2SApple OSS Distributions    """
354*19c3b8c2SApple OSS Distributions    if not IsArchX86_64():
355*19c3b8c2SApple OSS Distributions        print("ioapic_dump not supported on this architecture.")
356*19c3b8c2SApple OSS Distributions        return
357*19c3b8c2SApple OSS Distributions    DoIoApicDump()
358*19c3b8c2SApple OSS Distributions
359