1*27b03b36SApple OSS Distributions#include <machine/asm.h> 2*27b03b36SApple OSS Distributions 3*27b03b36SApple OSS Distributions .text 4*27b03b36SApple OSS Distributions 5*27b03b36SApple OSS Distributions .balign 0x1000 6*27b03b36SApple OSS Distributions 7*27b03b36SApple OSS Distributions .global _hvtest_begin 8*27b03b36SApple OSS Distributions_hvtest_begin: 9*27b03b36SApple OSS Distributions 10*27b03b36SApple OSS Distributions /* 11*27b03b36SApple OSS Distributions * Everything between _hvtest_begin and _hvtest_end will be copied for 12*27b03b36SApple OSS Distributions * tests that don't use the page faulting of the test harness. 13*27b03b36SApple OSS Distributions * You can put constants here. 14*27b03b36SApple OSS Distributions */ 15*27b03b36SApple OSS Distributions 16*27b03b36SApple OSS Distributions.code64 17*27b03b36SApple OSS Distributions 18*27b03b36SApple OSS Distributions .balign 16 19*27b03b36SApple OSS Distributions 20*27b03b36SApple OSS Distributions .global _save_restore_regs_entry 21*27b03b36SApple OSS Distributions_save_restore_regs_entry: 22*27b03b36SApple OSS Distributions 23*27b03b36SApple OSS Distributions pushq %rax 24*27b03b36SApple OSS Distributions pushq %rcx 25*27b03b36SApple OSS Distributions 26*27b03b36SApple OSS Distributions xor %rcx, %rcx 27*27b03b36SApple OSS Distributions 28*27b03b36SApple OSS Distributions pushq %rbx 29*27b03b36SApple OSS Distributions 30*27b03b36SApple OSS Distributions 31*27b03b36SApple OSS Distributions /* 32*27b03b36SApple OSS Distributions * For all registers to test, each of these blocks: 33*27b03b36SApple OSS Distributions * 1. increments rcx (to keep track in case of test failure), 34*27b03b36SApple OSS Distributions * 2. checks the register's value against a (constant) template 35*27b03b36SApple OSS Distributions * 3. flips all bits for the VMM to later verify that the changes value is available. 36*27b03b36SApple OSS Distributions * 37*27b03b36SApple OSS Distributions * For a second pass, bits are all flipped back to their original state after 38*27b03b36SApple OSS Distributions * the vmcall. 39*27b03b36SApple OSS Distributions */ 40*27b03b36SApple OSS Distributions 41*27b03b36SApple OSS Distributions 42*27b03b36SApple OSS Distributions // segment registers (pass 1) 43*27b03b36SApple OSS Distributions 44*27b03b36SApple OSS Distributions incq %rcx 45*27b03b36SApple OSS Distributions movq $0x1010, %rax 46*27b03b36SApple OSS Distributions movq %ds, %rbx 47*27b03b36SApple OSS Distributions cmpq %rbx, %rax 48*27b03b36SApple OSS Distributions jne .foul 49*27b03b36SApple OSS Distributions movq $1, %rbx 50*27b03b36SApple OSS Distributions movq %rbx, %ds 51*27b03b36SApple OSS Distributions 52*27b03b36SApple OSS Distributions incq %rcx 53*27b03b36SApple OSS Distributions movq $0x2020, %rax 54*27b03b36SApple OSS Distributions movq %es, %rbx 55*27b03b36SApple OSS Distributions cmpq %rbx, %rax 56*27b03b36SApple OSS Distributions jne .foul 57*27b03b36SApple OSS Distributions movq $2, %rbx 58*27b03b36SApple OSS Distributions movq %rbx, %es 59*27b03b36SApple OSS Distributions 60*27b03b36SApple OSS Distributions incq %rcx 61*27b03b36SApple OSS Distributions movq $0x3030, %rax 62*27b03b36SApple OSS Distributions movq %fs, %rbx 63*27b03b36SApple OSS Distributions cmpq %rbx, %rax 64*27b03b36SApple OSS Distributions jne .foul 65*27b03b36SApple OSS Distributions movq $3, %rbx 66*27b03b36SApple OSS Distributions movq %rbx, %fs 67*27b03b36SApple OSS Distributions 68*27b03b36SApple OSS Distributions incq %rcx 69*27b03b36SApple OSS Distributions movq $0x4040, %rax 70*27b03b36SApple OSS Distributions movq %gs, %rbx 71*27b03b36SApple OSS Distributions cmpq %rbx, %rax 72*27b03b36SApple OSS Distributions jne .foul 73*27b03b36SApple OSS Distributions movq $1, %rbx 74*27b03b36SApple OSS Distributions movq %rbx, %gs 75*27b03b36SApple OSS Distributions 76*27b03b36SApple OSS Distributions popq %rbx 77*27b03b36SApple OSS Distributions 78*27b03b36SApple OSS Distributions jmp .pass 79*27b03b36SApple OSS Distributions 80*27b03b36SApple OSS Distributions.pass2: 81*27b03b36SApple OSS Distributions pushq %rax 82*27b03b36SApple OSS Distributions pushq %rcx 83*27b03b36SApple OSS Distributions 84*27b03b36SApple OSS Distributions xor %rcx, %rcx 85*27b03b36SApple OSS Distributions 86*27b03b36SApple OSS Distributions pushq %rbx 87*27b03b36SApple OSS Distributions 88*27b03b36SApple OSS Distributions // segment registers (pass 2) 89*27b03b36SApple OSS Distributions 90*27b03b36SApple OSS Distributions incq %rcx 91*27b03b36SApple OSS Distributions movq $0x1, %rax 92*27b03b36SApple OSS Distributions movq %ds, %rbx 93*27b03b36SApple OSS Distributions cmpq %rbx, %rax 94*27b03b36SApple OSS Distributions jne .foul 95*27b03b36SApple OSS Distributions movq $1, %rbx 96*27b03b36SApple OSS Distributions movq %rbx, %ds 97*27b03b36SApple OSS Distributions 98*27b03b36SApple OSS Distributions incq %rcx 99*27b03b36SApple OSS Distributions movq $0x2, %rax 100*27b03b36SApple OSS Distributions movq %es, %rbx 101*27b03b36SApple OSS Distributions cmpq %rbx, %rax 102*27b03b36SApple OSS Distributions jne .foul 103*27b03b36SApple OSS Distributions movq $2, %rbx 104*27b03b36SApple OSS Distributions movq %rbx, %es 105*27b03b36SApple OSS Distributions 106*27b03b36SApple OSS Distributions incq %rcx 107*27b03b36SApple OSS Distributions movq $0x3, %rax 108*27b03b36SApple OSS Distributions movq %fs, %rbx 109*27b03b36SApple OSS Distributions cmpq %rbx, %rax 110*27b03b36SApple OSS Distributions jne .foul 111*27b03b36SApple OSS Distributions movq $3, %rbx 112*27b03b36SApple OSS Distributions movq %rbx, %fs 113*27b03b36SApple OSS Distributions 114*27b03b36SApple OSS Distributions incq %rcx 115*27b03b36SApple OSS Distributions movq $0x1, %rax 116*27b03b36SApple OSS Distributions movq %gs, %rbx 117*27b03b36SApple OSS Distributions cmpq %rbx, %rax 118*27b03b36SApple OSS Distributions jne .foul 119*27b03b36SApple OSS Distributions movq $1, %rbx 120*27b03b36SApple OSS Distributions movq %rbx, %gs 121*27b03b36SApple OSS Distributions 122*27b03b36SApple OSS Distributions popq %rbx 123*27b03b36SApple OSS Distributions 124*27b03b36SApple OSS Distributions.pass: 125*27b03b36SApple OSS Distributions // general purpose registers 126*27b03b36SApple OSS Distributions 127*27b03b36SApple OSS Distributions incq %rcx 128*27b03b36SApple OSS Distributions movq $0x0101010101010101, %rax 129*27b03b36SApple OSS Distributions cmpq 8(%rsp), %rax // %rax on stack 130*27b03b36SApple OSS Distributions jne .foul 131*27b03b36SApple OSS Distributions notq 8(%rsp) 132*27b03b36SApple OSS Distributions 133*27b03b36SApple OSS Distributions incq %rcx 134*27b03b36SApple OSS Distributions movq $0x0202020202020202, %rax 135*27b03b36SApple OSS Distributions cmpq %rbx, %rax 136*27b03b36SApple OSS Distributions jne .foul 137*27b03b36SApple OSS Distributions notq %rbx 138*27b03b36SApple OSS Distributions 139*27b03b36SApple OSS Distributions incq %rcx 140*27b03b36SApple OSS Distributions movq $0x0303030303030303, %rax 141*27b03b36SApple OSS Distributions cmpq (%rsp), %rax // %rcx on stack 142*27b03b36SApple OSS Distributions jne .foul 143*27b03b36SApple OSS Distributions notq (%rsp) 144*27b03b36SApple OSS Distributions 145*27b03b36SApple OSS Distributions incq %rcx 146*27b03b36SApple OSS Distributions movq $0x0404040404040404, %rax 147*27b03b36SApple OSS Distributions cmpq %rdx, %rax 148*27b03b36SApple OSS Distributions jne .foul 149*27b03b36SApple OSS Distributions notq %rdx 150*27b03b36SApple OSS Distributions 151*27b03b36SApple OSS Distributions incq %rcx 152*27b03b36SApple OSS Distributions movq $0x0505050505050505, %rax 153*27b03b36SApple OSS Distributions cmpq %rsi, %rax 154*27b03b36SApple OSS Distributions jne .foul 155*27b03b36SApple OSS Distributions notq %rsi 156*27b03b36SApple OSS Distributions 157*27b03b36SApple OSS Distributions incq %rcx 158*27b03b36SApple OSS Distributions movq $0x0606060606060606, %rax 159*27b03b36SApple OSS Distributions cmpq %rdi, %rax 160*27b03b36SApple OSS Distributions jne .foul 161*27b03b36SApple OSS Distributions notq %rdi 162*27b03b36SApple OSS Distributions 163*27b03b36SApple OSS Distributions incq %rcx 164*27b03b36SApple OSS Distributions movq $0x0707070707070707, %rax 165*27b03b36SApple OSS Distributions cmpq %rbp, %rax 166*27b03b36SApple OSS Distributions jne .foul 167*27b03b36SApple OSS Distributions notq %rbp 168*27b03b36SApple OSS Distributions 169*27b03b36SApple OSS Distributions incq %rcx 170*27b03b36SApple OSS Distributions movq $0x0808080808080808, %rax 171*27b03b36SApple OSS Distributions cmpq %r8, %rax 172*27b03b36SApple OSS Distributions jne .foul 173*27b03b36SApple OSS Distributions notq %r8 174*27b03b36SApple OSS Distributions 175*27b03b36SApple OSS Distributions incq %rcx 176*27b03b36SApple OSS Distributions movq $0x0909090909090909, %rax 177*27b03b36SApple OSS Distributions cmpq %r9, %rax 178*27b03b36SApple OSS Distributions jne .foul 179*27b03b36SApple OSS Distributions notq %r9 180*27b03b36SApple OSS Distributions 181*27b03b36SApple OSS Distributions incq %rcx 182*27b03b36SApple OSS Distributions movq $0x0a0a0a0a0a0a0a0a, %rax 183*27b03b36SApple OSS Distributions cmpq %r10, %rax 184*27b03b36SApple OSS Distributions jne .foul 185*27b03b36SApple OSS Distributions notq %r10 186*27b03b36SApple OSS Distributions 187*27b03b36SApple OSS Distributions incq %rcx 188*27b03b36SApple OSS Distributions movq $0x0b0b0b0b0b0b0b0b, %rax 189*27b03b36SApple OSS Distributions cmpq %r11, %rax 190*27b03b36SApple OSS Distributions jne .foul 191*27b03b36SApple OSS Distributions notq %r11 192*27b03b36SApple OSS Distributions 193*27b03b36SApple OSS Distributions incq %rcx 194*27b03b36SApple OSS Distributions movq $0x0c0c0c0c0c0c0c0c, %rax 195*27b03b36SApple OSS Distributions cmpq %r12, %rax 196*27b03b36SApple OSS Distributions jne .foul 197*27b03b36SApple OSS Distributions notq %r12 198*27b03b36SApple OSS Distributions 199*27b03b36SApple OSS Distributions incq %rcx 200*27b03b36SApple OSS Distributions movq $0x0d0d0d0d0d0d0d0d, %rax 201*27b03b36SApple OSS Distributions cmpq %r13, %rax 202*27b03b36SApple OSS Distributions jne .foul 203*27b03b36SApple OSS Distributions notq %r13 204*27b03b36SApple OSS Distributions 205*27b03b36SApple OSS Distributions incq %rcx 206*27b03b36SApple OSS Distributions movq $0x0e0e0e0e0e0e0e0e, %rax 207*27b03b36SApple OSS Distributions cmpq %r14, %rax 208*27b03b36SApple OSS Distributions jne .foul 209*27b03b36SApple OSS Distributions notq %r14 210*27b03b36SApple OSS Distributions 211*27b03b36SApple OSS Distributions incq %rcx 212*27b03b36SApple OSS Distributions movq $0x0f0f0f0f0f0f0f0f, %rax 213*27b03b36SApple OSS Distributions cmpq %r15, %rax 214*27b03b36SApple OSS Distributions jne .foul 215*27b03b36SApple OSS Distributions notq %r15 216*27b03b36SApple OSS Distributions 217*27b03b36SApple OSS Distributions popq %rcx 218*27b03b36SApple OSS Distributions movq (%rsp), %rax 219*27b03b36SApple OSS Distributions vmcall 220*27b03b36SApple OSS Distributions 221*27b03b36SApple OSS Distributions notq %rax 222*27b03b36SApple OSS Distributions notq %rbx 223*27b03b36SApple OSS Distributions notq %rcx 224*27b03b36SApple OSS Distributions notq %rdx 225*27b03b36SApple OSS Distributions notq %rsi 226*27b03b36SApple OSS Distributions notq %rdi 227*27b03b36SApple OSS Distributions notq %rbp 228*27b03b36SApple OSS Distributions notq %r8 229*27b03b36SApple OSS Distributions notq %r9 230*27b03b36SApple OSS Distributions notq %r10 231*27b03b36SApple OSS Distributions notq %r11 232*27b03b36SApple OSS Distributions notq %r12 233*27b03b36SApple OSS Distributions notq %r13 234*27b03b36SApple OSS Distributions notq %r14 235*27b03b36SApple OSS Distributions notq %r15 236*27b03b36SApple OSS Distributions 237*27b03b36SApple OSS Distributions jmp .pass2 238*27b03b36SApple OSS Distributions 239*27b03b36SApple OSS Distributions.foul: 240*27b03b36SApple OSS Distributions movq %rcx, %rax 241*27b03b36SApple OSS Distributions vmcall 242*27b03b36SApple OSS Distributions 243*27b03b36SApple OSS Distributions .global _save_restore_debug_regs_entry 244*27b03b36SApple OSS Distributions_save_restore_debug_regs_entry: 245*27b03b36SApple OSS Distributions 246*27b03b36SApple OSS Distributions pushq %rax 247*27b03b36SApple OSS Distributions xor %rcx, %rcx 248*27b03b36SApple OSS Distributions 249*27b03b36SApple OSS Distributions /* 250*27b03b36SApple OSS Distributions * For all registers to test, each of these blocks: 251*27b03b36SApple OSS Distributions * 1. increments rcx (to keep track in case of test failure), 252*27b03b36SApple OSS Distributions * 2. checks the register's value against a (constant) template 253*27b03b36SApple OSS Distributions * 3. flips all bits for the VMM to later verify that the changes value is available. 254*27b03b36SApple OSS Distributions * 255*27b03b36SApple OSS Distributions * For a second pass, bits are all flipped back to their original state after 256*27b03b36SApple OSS Distributions * the vmcall. 257*27b03b36SApple OSS Distributions */ 258*27b03b36SApple OSS Distributions 259*27b03b36SApple OSS Distributions incq %rcx 260*27b03b36SApple OSS Distributions movq $0x1111111111111111, %rbx 261*27b03b36SApple OSS Distributions movq %dr0, %rax 262*27b03b36SApple OSS Distributions cmpq %rbx, %rax 263*27b03b36SApple OSS Distributions jne .foul 264*27b03b36SApple OSS Distributions notq %rbx 265*27b03b36SApple OSS Distributions movq %rbx, %dr0 266*27b03b36SApple OSS Distributions 267*27b03b36SApple OSS Distributions movq $0xEEEEEEEEEEEEEEEE, %rbx 268*27b03b36SApple OSS Distributions movq %dr0, %rax 269*27b03b36SApple OSS Distributions cmpq %rbx, %rax 270*27b03b36SApple OSS Distributions jne .foul 271*27b03b36SApple OSS Distributions 272*27b03b36SApple OSS Distributions incq %rcx 273*27b03b36SApple OSS Distributions movq $0x2222222222222222, %rbx 274*27b03b36SApple OSS Distributions movq %dr1, %rax 275*27b03b36SApple OSS Distributions cmpq %rbx, %rax 276*27b03b36SApple OSS Distributions jne .foul 277*27b03b36SApple OSS Distributions notq %rbx 278*27b03b36SApple OSS Distributions movq %rbx, %dr1 279*27b03b36SApple OSS Distributions 280*27b03b36SApple OSS Distributions incq %rcx 281*27b03b36SApple OSS Distributions movq $0x3333333333333333, %rbx 282*27b03b36SApple OSS Distributions movq %dr2, %rax 283*27b03b36SApple OSS Distributions cmpq %rbx, %rax 284*27b03b36SApple OSS Distributions jne .foul 285*27b03b36SApple OSS Distributions notq %rbx 286*27b03b36SApple OSS Distributions movq %rbx, %dr2 287*27b03b36SApple OSS Distributions 288*27b03b36SApple OSS Distributions incq %rcx 289*27b03b36SApple OSS Distributions movq $0x4444444444444444, %rbx 290*27b03b36SApple OSS Distributions movq %dr3, %rax 291*27b03b36SApple OSS Distributions cmpq %rbx, %rax 292*27b03b36SApple OSS Distributions jne .foul 293*27b03b36SApple OSS Distributions notq %rbx 294*27b03b36SApple OSS Distributions movq %rbx, %dr3 295*27b03b36SApple OSS Distributions 296*27b03b36SApple OSS Distributions /* 297*27b03b36SApple OSS Distributions * flip only defined bits for debug status and control registers 298*27b03b36SApple OSS Distributions * (and also don't flip General Detect Enable, as the next access 299*27b03b36SApple OSS Distributions * to any debug register would generate an exception) 300*27b03b36SApple OSS Distributions */ 301*27b03b36SApple OSS Distributions 302*27b03b36SApple OSS Distributions incq %rcx 303*27b03b36SApple OSS Distributions movq $0x5555555555555555, %rbx 304*27b03b36SApple OSS Distributions mov $0xffff0ff0, %rax 305*27b03b36SApple OSS Distributions orq %rax, %rbx 306*27b03b36SApple OSS Distributions movq $0xffffefff, %rax 307*27b03b36SApple OSS Distributions andq %rax, %rbx 308*27b03b36SApple OSS Distributions movq %dr6, %rax 309*27b03b36SApple OSS Distributions cmpq %rbx, %rax 310*27b03b36SApple OSS Distributions jne .foul 311*27b03b36SApple OSS Distributions notq %rbx 312*27b03b36SApple OSS Distributions mov $0xffff0ff0, %rax 313*27b03b36SApple OSS Distributions orq %rax, %rbx 314*27b03b36SApple OSS Distributions movq $0xffffefff, %rax 315*27b03b36SApple OSS Distributions andq %rax, %rbx 316*27b03b36SApple OSS Distributions movq %rbx, %dr6 317*27b03b36SApple OSS Distributions 318*27b03b36SApple OSS Distributions incq %rcx 319*27b03b36SApple OSS Distributions movq $0x5555555555555555, %rbx 320*27b03b36SApple OSS Distributions orq $0x400, %rbx 321*27b03b36SApple OSS Distributions movq $0xffff0fff, %rax 322*27b03b36SApple OSS Distributions andq %rax, %rbx 323*27b03b36SApple OSS Distributions movq %dr7, %rax 324*27b03b36SApple OSS Distributions cmpq %rbx, %rax 325*27b03b36SApple OSS Distributions jne .foul 326*27b03b36SApple OSS Distributions notq %rbx 327*27b03b36SApple OSS Distributions orq $0x400, %rbx 328*27b03b36SApple OSS Distributions movq $0xffff0fff, %rax 329*27b03b36SApple OSS Distributions andq %rax, %rbx 330*27b03b36SApple OSS Distributions movq %rbx, %dr7 331*27b03b36SApple OSS Distributions 332*27b03b36SApple OSS Distributions popq %rax 333*27b03b36SApple OSS Distributions notq %rax 334*27b03b36SApple OSS Distributions vmcall 335*27b03b36SApple OSS Distributions 336*27b03b36SApple OSS Distributions pushq %rax 337*27b03b36SApple OSS Distributions 338*27b03b36SApple OSS Distributions inc %rcx 339*27b03b36SApple OSS Distributions movq $0xEEEEEEEEEEEEEEEE, %rbx 340*27b03b36SApple OSS Distributions movq %dr0, %rax 341*27b03b36SApple OSS Distributions cmpq %rbx, %rax 342*27b03b36SApple OSS Distributions jne .foul 343*27b03b36SApple OSS Distributions 344*27b03b36SApple OSS Distributions movq %dr0, %rbx 345*27b03b36SApple OSS Distributions notq %rbx 346*27b03b36SApple OSS Distributions movq %rbx, %dr0 347*27b03b36SApple OSS Distributions 348*27b03b36SApple OSS Distributions movq %dr1, %rbx 349*27b03b36SApple OSS Distributions notq %rbx 350*27b03b36SApple OSS Distributions movq %rbx, %dr1 351*27b03b36SApple OSS Distributions 352*27b03b36SApple OSS Distributions movq %dr2, %rbx 353*27b03b36SApple OSS Distributions notq %rbx 354*27b03b36SApple OSS Distributions movq %rbx, %dr2 355*27b03b36SApple OSS Distributions 356*27b03b36SApple OSS Distributions movq %dr3, %rbx 357*27b03b36SApple OSS Distributions notq %rbx 358*27b03b36SApple OSS Distributions movq %rbx, %dr3 359*27b03b36SApple OSS Distributions 360*27b03b36SApple OSS Distributions movq %dr6, %rbx 361*27b03b36SApple OSS Distributions notq %rbx 362*27b03b36SApple OSS Distributions mov $0xffff0ff0, %rax 363*27b03b36SApple OSS Distributions orq %rax, %rbx 364*27b03b36SApple OSS Distributions movq $0xffffefff, %rax 365*27b03b36SApple OSS Distributions andq %rax, %rbx 366*27b03b36SApple OSS Distributions movq %rbx, %dr6 367*27b03b36SApple OSS Distributions 368*27b03b36SApple OSS Distributions movq %dr7, %rbx 369*27b03b36SApple OSS Distributions notq %rbx 370*27b03b36SApple OSS Distributions orq $0x400, %rbx 371*27b03b36SApple OSS Distributions movq $0xffff0fff, %rax 372*27b03b36SApple OSS Distributions andq %rax, %rbx 373*27b03b36SApple OSS Distributions movq %rbx, %dr7 374*27b03b36SApple OSS Distributions 375*27b03b36SApple OSS Distributions popq %rax 376*27b03b36SApple OSS Distributions 377*27b03b36SApple OSS Distributions jmp _save_restore_debug_regs_entry // 2nd pass 378*27b03b36SApple OSS Distributions 379*27b03b36SApple OSS Distributions.code32 380*27b03b36SApple OSS Distributions 381*27b03b36SApple OSS Distributions .global _simple_protected_mode_vcpu_entry 382*27b03b36SApple OSS Distributions_simple_protected_mode_vcpu_entry: 383*27b03b36SApple OSS Distributions 384*27b03b36SApple OSS Distributions movl $0x23456, %eax 385*27b03b36SApple OSS Distributions vmcall 386*27b03b36SApple OSS Distributions 387*27b03b36SApple OSS Distributions.code16 388*27b03b36SApple OSS Distributions 389*27b03b36SApple OSS Distributions .global _simple_real_mode_vcpu_entry 390*27b03b36SApple OSS Distributions_simple_real_mode_vcpu_entry: 391*27b03b36SApple OSS Distributions 392*27b03b36SApple OSS Distributions movl $0x23456, %eax 393*27b03b36SApple OSS Distributions vmcall 394*27b03b36SApple OSS Distributions 395*27b03b36SApple OSS Distributions.code32 396*27b03b36SApple OSS Distributions 397*27b03b36SApple OSS Distributions .global _radar61961809_entry 398*27b03b36SApple OSS Distributions_radar61961809_entry: 399*27b03b36SApple OSS Distributions 400*27b03b36SApple OSS Distributions mov $0x99999999, %ebx // sentinel address, see _radar61961809_loop64 401*27b03b36SApple OSS Distributions 402*27b03b36SApple OSS Distributions mov $0xc0000080,%ecx // IA32_EFER 403*27b03b36SApple OSS Distributions rdmsr 404*27b03b36SApple OSS Distributions or $0x100,%eax // .LME 405*27b03b36SApple OSS Distributions wrmsr 406*27b03b36SApple OSS Distributions 407*27b03b36SApple OSS Distributions vmcall 408*27b03b36SApple OSS Distributions 409*27b03b36SApple OSS Distributions mov %cr0,%ecx 410*27b03b36SApple OSS Distributions or $0x80000000,%ecx // CR0.PG 411*27b03b36SApple OSS Distributions mov %ecx,%cr0 412*27b03b36SApple OSS Distributions 413*27b03b36SApple OSS Distributions // first (%edi) 6 bytes are _radar61961809_prepare far ptr 414*27b03b36SApple OSS Distributions ljmp *(%edi) 415*27b03b36SApple OSS Distributions 416*27b03b36SApple OSS Distributions.code32 417*27b03b36SApple OSS Distributions 418*27b03b36SApple OSS Distributions .global _radar61961809_prepare 419*27b03b36SApple OSS Distributions_radar61961809_prepare: 420*27b03b36SApple OSS Distributions 421*27b03b36SApple OSS Distributions /* 422*27b03b36SApple OSS Distributions * We switched into long mode, now immediately out, and the test 423*27b03b36SApple OSS Distributions * will switch back in. 424*27b03b36SApple OSS Distributions * 425*27b03b36SApple OSS Distributions * This is done to suppress (legitimate) EPT and Page Fault exits. 426*27b03b36SApple OSS Distributions * Until CR0.PG is enabled (which is what effectively activates 427*27b03b36SApple OSS Distributions * long mode), the page tables are never looked at. Right after 428*27b03b36SApple OSS Distributions * setting PG, that changes immediately, effecting transparently 429*27b03b36SApple OSS Distributions * handled EPT violations. Additionally, the far jump that 430*27b03b36SApple OSS Distributions * would be necessary to switch into a 64bit code segment would 431*27b03b36SApple OSS Distributions * also cause EPT violations and PFs when fetching the segment 432*27b03b36SApple OSS Distributions * descriptor from the GDT. 433*27b03b36SApple OSS Distributions * 434*27b03b36SApple OSS Distributions * By first jumping into a 32bit code segment after enabling PG 435*27b03b36SApple OSS Distributions * once, we "warm up" both EPT and (harness managed) page tables, 436*27b03b36SApple OSS Distributions * so the next exit after the far jump will most likely be an 437*27b03b36SApple OSS Distributions * IRQ exit, most faithfully reproducing the problem. 438*27b03b36SApple OSS Distributions */ 439*27b03b36SApple OSS Distributions 440*27b03b36SApple OSS Distributions mov %cr0,%ecx 441*27b03b36SApple OSS Distributions and $~0x80000000,%ecx 442*27b03b36SApple OSS Distributions mov %ecx,%cr0 443*27b03b36SApple OSS Distributions 444*27b03b36SApple OSS Distributions mov $0x1111, %eax 445*27b03b36SApple OSS Distributions vmcall 446*27b03b36SApple OSS Distributions 447*27b03b36SApple OSS Distributions // This is where the actual test really starts. 448*27b03b36SApple OSS Distributions mov %cr0,%ecx 449*27b03b36SApple OSS Distributions or $0x80000000,%ecx 450*27b03b36SApple OSS Distributions mov %ecx,%cr0 // enable PG => long mode 451*27b03b36SApple OSS Distributions 452*27b03b36SApple OSS Distributions xor %ecx, %ecx 453*27b03b36SApple OSS Distributions 454*27b03b36SApple OSS Distributions add $8,%edi 455*27b03b36SApple OSS Distributions ljmp *(%edi) // _radar61961809_loop64 456*27b03b36SApple OSS Distributions 457*27b03b36SApple OSS Distributions.code64 458*27b03b36SApple OSS Distributions 459*27b03b36SApple OSS Distributions .global _radar61961809_loop64 460*27b03b36SApple OSS Distributions_radar61961809_loop64: 461*27b03b36SApple OSS Distributions1: 462*27b03b36SApple OSS Distributions // as 16bit code, this instruction will be: 463*27b03b36SApple OSS Distributions // add %al,(%bx,%si) 464*27b03b36SApple OSS Distributions // and cause an obvious EPT violation (%bx is 0x9999) 465*27b03b36SApple OSS Distributions mov $0x1,%ebp 466*27b03b36SApple OSS Distributions 467*27b03b36SApple OSS Distributions // loop long enough for a good chance to an IRQ exit 468*27b03b36SApple OSS Distributions dec %ecx 469*27b03b36SApple OSS Distributions jnz 1b 470*27b03b36SApple OSS Distributions 471*27b03b36SApple OSS Distributions // if we reach here, we stayed in long mode. 472*27b03b36SApple OSS Distributions mov $0x2222, %eax 473*27b03b36SApple OSS Distributions vmcall 474*27b03b36SApple OSS Distributions 475*27b03b36SApple OSS Distributions .global _radar60691363_entry 476*27b03b36SApple OSS Distributions_radar60691363_entry: 477*27b03b36SApple OSS Distributions movq $0x800, %rsi // VMCS_GUEST_ES 478*27b03b36SApple OSS Distributions vmreadq %rsi, %rax 479*27b03b36SApple OSS Distributions vmcall 480*27b03b36SApple OSS Distributions movq $0x6400, %rsi // VMCS_RO_EXIT_QUALIFIC 481*27b03b36SApple OSS Distributions vmreadq %rsi, %rax 482*27b03b36SApple OSS Distributions vmcall 483*27b03b36SApple OSS Distributions movq $0x6402, %rsi // VMCS_RO_IO_RCX 484*27b03b36SApple OSS Distributions vmreadq %rsi, %rax 485*27b03b36SApple OSS Distributions vmcall 486*27b03b36SApple OSS Distributions 487*27b03b36SApple OSS Distributions movq $0x800, %rsi // VMCS_GUEST_ES 488*27b03b36SApple OSS Distributions movq $0x9191, %rax 489*27b03b36SApple OSS Distributions vmwriteq %rax, %rsi 490*27b03b36SApple OSS Distributions movq $0x6400, %rsi // VMCS_RO_EXIT_QUALIFIC 491*27b03b36SApple OSS Distributions movq $0x9898, %rax 492*27b03b36SApple OSS Distributions vmwriteq %rax, %rsi 493*27b03b36SApple OSS Distributions movq $0x6402, %rsi // VMCS_RO_IO_RCX 494*27b03b36SApple OSS Distributions movq $0x7979, %rax 495*27b03b36SApple OSS Distributions vmwriteq %rax, %rsi 496*27b03b36SApple OSS Distributions 497*27b03b36SApple OSS Distributions movq $0x4567, %rax 498*27b03b36SApple OSS Distributions 499*27b03b36SApple OSS Distributions vmcall 500*27b03b36SApple OSS Distributions 501*27b03b36SApple OSS Distributions.code16 502*27b03b36SApple OSS Distributions 503*27b03b36SApple OSS Distributions // Perform a fixed number of port I/Os with various arguments. 504*27b03b36SApple OSS Distributions .global _pio_entry 505*27b03b36SApple OSS Distributions_pio_entry: 506*27b03b36SApple OSS Distributions 507*27b03b36SApple OSS Distributions movl $0xaa, %eax 508*27b03b36SApple OSS Distributions 509*27b03b36SApple OSS Distributions outl %eax, $0xab 510*27b03b36SApple OSS Distributions 511*27b03b36SApple OSS Distributions movl $3, %ecx 512*27b03b36SApple OSS Distributions1: outb %al, $0xab 513*27b03b36SApple OSS Distributions loop 1b 514*27b03b36SApple OSS Distributions 515*27b03b36SApple OSS Distributions movl $10, %ecx 516*27b03b36SApple OSS Distributions1: outb %al, $0xcd 517*27b03b36SApple OSS Distributions loop 1b 518*27b03b36SApple OSS Distributions 519*27b03b36SApple OSS Distributions movl $10, %ecx 520*27b03b36SApple OSS Distributions1: outb %al, $0xef 521*27b03b36SApple OSS Distributions loop 1b 522*27b03b36SApple OSS Distributions 523*27b03b36SApple OSS Distributions movl $0x23456, %eax 524*27b03b36SApple OSS Distributions vmcall 525*27b03b36SApple OSS Distributions 526*27b03b36SApple OSS Distributions.code16 527*27b03b36SApple OSS Distributions // Perform 10 port I/Os on 0xef. 528*27b03b36SApple OSS Distributions .global _pio_entry_basic 529*27b03b36SApple OSS Distributions_pio_entry_basic: 530*27b03b36SApple OSS Distributions 531*27b03b36SApple OSS Distributions movl $10, %ecx 532*27b03b36SApple OSS Distributions1: outb %al, $0xef 533*27b03b36SApple OSS Distributions loop 1b 534*27b03b36SApple OSS Distributions 535*27b03b36SApple OSS Distributions movl $0x23456, %eax 536*27b03b36SApple OSS Distributions vmcall 537*27b03b36SApple OSS Distributions 538*27b03b36SApple OSS Distributions .global _hvtest_end 539*27b03b36SApple OSS Distributions_hvtest_end: 540