xref: /xnu-8020.140.41/osfmk/mach/arm/thread_status.h (revision 27b03b360a988dfd3dfdf34262bb0042026747cc)
1 /*
2  * Copyright (c) 2007 Apple Inc. All rights reserved.
3  *
4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5  *
6  * This file contains Original Code and/or Modifications of Original Code
7  * as defined in and that are subject to the Apple Public Source License
8  * Version 2.0 (the 'License'). You may not use this file except in
9  * compliance with the License. The rights granted to you under the License
10  * may not be used to create, or enable the creation or redistribution of,
11  * unlawful or unlicensed copies of an Apple operating system, or to
12  * circumvent, violate, or enable the circumvention or violation of, any
13  * terms of an Apple operating system software license agreement.
14  *
15  * Please obtain a copy of the License at
16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
17  *
18  * The Original Code and all software distributed under the License are
19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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23  * Please see the License for the specific language governing rights and
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26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27  */
28 /*
29  * FILE_ID: thread_status.h
30  */
31 
32 
33 #ifndef _ARM_THREAD_STATUS_H_
34 #define _ARM_THREAD_STATUS_H_
35 
36 #if defined (__arm__) || defined (__arm64__)
37 
38 #include <mach/machine/_structs.h>
39 #include <mach/machine/thread_state.h>
40 #include <mach/message.h>
41 #include <mach/vm_types.h>
42 
43 #ifdef XNU_KERNEL_PRIVATE
44 #include <os/refcnt.h>
45 #endif
46 
47 /*
48  *    Support for determining the state of a thread
49  */
50 
51 
52 /*
53  *  Flavors
54  */
55 
56 #define ARM_THREAD_STATE         1
57 #define ARM_UNIFIED_THREAD_STATE ARM_THREAD_STATE
58 #define ARM_VFP_STATE            2
59 #define ARM_EXCEPTION_STATE      3
60 #define ARM_DEBUG_STATE          4 /* pre-armv8 */
61 #define THREAD_STATE_NONE        5
62 #define ARM_THREAD_STATE64       6
63 #define ARM_EXCEPTION_STATE64    7
64 //      ARM_THREAD_STATE_LAST    8 /* legacy */
65 #define ARM_THREAD_STATE32       9
66 
67 #ifdef XNU_KERNEL_PRIVATE
68 #define X86_THREAD_STATE_NONE    13 /* i386/thread_status.h THREAD_STATE_NONE */
69 #endif /* XNU_KERNEL_PRIVATE */
70 
71 /* API */
72 #define ARM_DEBUG_STATE32        14
73 #define ARM_DEBUG_STATE64        15
74 #define ARM_NEON_STATE           16
75 #define ARM_NEON_STATE64         17
76 #define ARM_CPMU_STATE64         18
77 
78 #ifdef XNU_KERNEL_PRIVATE
79 /* For kernel use */
80 #define ARM_SAVED_STATE32        20
81 #define ARM_SAVED_STATE64        21
82 #define ARM_NEON_SAVED_STATE32   22
83 #define ARM_NEON_SAVED_STATE64   23
84 #endif /* XNU_KERNEL_PRIVATE */
85 
86 #define ARM_PAGEIN_STATE         27
87 
88 #ifndef ARM_STATE_FLAVOR_IS_OTHER_VALID
89 #define ARM_STATE_FLAVOR_IS_OTHER_VALID(_flavor_) 0
90 #endif
91 
92 #define VALID_THREAD_STATE_FLAVOR(x) \
93 	((x == ARM_THREAD_STATE) ||           \
94 	 (x == ARM_VFP_STATE) ||              \
95 	 (x == ARM_EXCEPTION_STATE) ||        \
96 	 (x == ARM_DEBUG_STATE) ||            \
97 	 (x == THREAD_STATE_NONE) ||          \
98 	 (x == ARM_THREAD_STATE32) ||         \
99 	 (x == ARM_THREAD_STATE64) ||         \
100 	 (x == ARM_EXCEPTION_STATE64) ||      \
101 	 (x == ARM_NEON_STATE) ||             \
102 	 (x == ARM_NEON_STATE64) ||           \
103 	 (x == ARM_DEBUG_STATE32) ||          \
104 	 (x == ARM_DEBUG_STATE64) ||          \
105 	 (x == ARM_PAGEIN_STATE) ||           \
106 	 (ARM_STATE_FLAVOR_IS_OTHER_VALID(x)))
107 
108 struct arm_state_hdr {
109 	uint32_t flavor;
110 	uint32_t count;
111 };
112 typedef struct arm_state_hdr arm_state_hdr_t;
113 
114 typedef _STRUCT_ARM_THREAD_STATE   arm_thread_state_t;
115 typedef _STRUCT_ARM_THREAD_STATE   arm_thread_state32_t;
116 typedef _STRUCT_ARM_THREAD_STATE64 arm_thread_state64_t;
117 
118 #if !defined(KERNEL)
119 #if __DARWIN_C_LEVEL >= __DARWIN_C_FULL && defined(__arm64__)
120 
121 /* Accessor macros for arm_thread_state64_t pointer fields */
122 
123 /* Return pc field of arm_thread_state64_t as a data pointer value */
124 #define arm_thread_state64_get_pc(ts) \
125 	        __darwin_arm_thread_state64_get_pc(ts)
126 /* Return pc field of arm_thread_state64_t as a function pointer. May return
127  * NULL if a valid function pointer cannot be constructed, the caller should
128  * fall back to the arm_thread_state64_get_pc() macro in that case. */
129 #define arm_thread_state64_get_pc_fptr(ts) \
130 	        __darwin_arm_thread_state64_get_pc_fptr(ts)
131 /* Set pc field of arm_thread_state64_t to a function pointer */
132 #define arm_thread_state64_set_pc_fptr(ts, fptr) \
133 	        __darwin_arm_thread_state64_set_pc_fptr(ts, fptr)
134 /* Return lr field of arm_thread_state64_t as a data pointer value */
135 #define arm_thread_state64_get_lr(ts) \
136 	        __darwin_arm_thread_state64_get_lr(ts)
137 /* Return lr field of arm_thread_state64_t as a function pointer. May return
138  * NULL if a valid function pointer cannot be constructed, the caller should
139  * fall back to the arm_thread_state64_get_lr() macro in that case. */
140 #define arm_thread_state64_get_lr_fptr(ts) \
141 	        __darwin_arm_thread_state64_get_lr_fptr(ts)
142 /* Set lr field of arm_thread_state64_t to a function pointer */
143 #define arm_thread_state64_set_lr_fptr(ts, fptr) \
144 	        __darwin_arm_thread_state64_set_lr_fptr(ts, fptr)
145 /* Return sp field of arm_thread_state64_t as a data pointer value */
146 #define arm_thread_state64_get_sp(ts) \
147 	        __darwin_arm_thread_state64_get_sp(ts)
148 /* Set sp field of arm_thread_state64_t to a data pointer value */
149 #define arm_thread_state64_set_sp(ts, ptr) \
150 	        __darwin_arm_thread_state64_set_sp(ts, ptr)
151 /* Return fp field of arm_thread_state64_t as a data pointer value */
152 #define arm_thread_state64_get_fp(ts) \
153 	        __darwin_arm_thread_state64_get_fp(ts)
154 /* Set fp field of arm_thread_state64_t to a data pointer value */
155 #define arm_thread_state64_set_fp(ts, ptr) \
156 	        __darwin_arm_thread_state64_set_fp(ts, ptr)
157 /* Strip ptr auth bits from pc, lr, sp and fp field of arm_thread_state64_t */
158 #define arm_thread_state64_ptrauth_strip(ts) \
159 	        __darwin_arm_thread_state64_ptrauth_strip(ts)
160 
161 #endif /* __DARWIN_C_LEVEL >= __DARWIN_C_FULL && defined(__arm64__) */
162 #endif /* !defined(KERNEL) */
163 
164 struct arm_unified_thread_state {
165 	arm_state_hdr_t ash;
166 	union {
167 		arm_thread_state32_t ts_32;
168 		arm_thread_state64_t ts_64;
169 	} uts;
170 };
171 #define ts_32 uts.ts_32
172 #define ts_64 uts.ts_64
173 typedef struct arm_unified_thread_state arm_unified_thread_state_t;
174 
175 #define ARM_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
176 	(sizeof (arm_thread_state_t)/sizeof(uint32_t)))
177 #define ARM_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
178 	(sizeof (arm_thread_state32_t)/sizeof(uint32_t)))
179 #define ARM_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
180 	(sizeof (arm_thread_state64_t)/sizeof(uint32_t)))
181 #define ARM_UNIFIED_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
182 	(sizeof (arm_unified_thread_state_t)/sizeof(uint32_t)))
183 
184 
185 typedef _STRUCT_ARM_VFP_STATE         arm_vfp_state_t;
186 typedef _STRUCT_ARM_NEON_STATE        arm_neon_state_t;
187 typedef _STRUCT_ARM_NEON_STATE        arm_neon_state32_t;
188 typedef _STRUCT_ARM_NEON_STATE64      arm_neon_state64_t;
189 
190 
191 typedef _STRUCT_ARM_EXCEPTION_STATE   arm_exception_state_t;
192 typedef _STRUCT_ARM_EXCEPTION_STATE   arm_exception_state32_t;
193 typedef _STRUCT_ARM_EXCEPTION_STATE64 arm_exception_state64_t;
194 
195 typedef _STRUCT_ARM_DEBUG_STATE32     arm_debug_state32_t;
196 typedef _STRUCT_ARM_DEBUG_STATE64     arm_debug_state64_t;
197 
198 typedef _STRUCT_ARM_PAGEIN_STATE      arm_pagein_state_t;
199 
200 #if defined(XNU_KERNEL_PRIVATE) && defined(__arm64__)
201 /* See below for ARM64 kernel structure definition for arm_debug_state. */
202 #else /* defined(XNU_KERNEL_PRIVATE) && defined(__arm64__) */
203 /*
204  * Otherwise not ARM64 kernel and we must preserve legacy ARM definitions of
205  * arm_debug_state for binary compatability of userland consumers of this file.
206  */
207 #if defined(__arm__)
208 typedef _STRUCT_ARM_DEBUG_STATE        arm_debug_state_t;
209 #elif defined(__arm64__)
210 typedef _STRUCT_ARM_LEGACY_DEBUG_STATE arm_debug_state_t;
211 #else /* defined(__arm__) */
212 #error Undefined architecture
213 #endif /* defined(__arm__) */
214 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(__arm64__) */
215 
216 #define ARM_VFP_STATE_COUNT ((mach_msg_type_number_t) \
217 	(sizeof (arm_vfp_state_t)/sizeof(uint32_t)))
218 
219 #define ARM_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
220 	(sizeof (arm_exception_state_t)/sizeof(uint32_t)))
221 
222 #define ARM_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
223 	(sizeof (arm_exception_state64_t)/sizeof(uint32_t)))
224 
225 #define ARM_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
226 	(sizeof (arm_debug_state_t)/sizeof(uint32_t)))
227 
228 #define ARM_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
229 	(sizeof (arm_debug_state32_t)/sizeof(uint32_t)))
230 
231 #define ARM_PAGEIN_STATE_COUNT ((mach_msg_type_number_t) \
232 	(sizeof (arm_pagein_state_t)/sizeof(uint32_t)))
233 
234 #define ARM_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
235 	(sizeof (arm_debug_state64_t)/sizeof(uint32_t)))
236 
237 #define ARM_NEON_STATE_COUNT ((mach_msg_type_number_t) \
238 	(sizeof (arm_neon_state_t)/sizeof(uint32_t)))
239 
240 #define ARM_NEON_STATE64_COUNT ((mach_msg_type_number_t) \
241 	(sizeof (arm_neon_state64_t)/sizeof(uint32_t)))
242 
243 #define MACHINE_THREAD_STATE       ARM_THREAD_STATE
244 #define MACHINE_THREAD_STATE_COUNT ARM_UNIFIED_THREAD_STATE_COUNT
245 
246 
247 /*
248  * Largest state on this machine:
249  */
250 #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
251 
252 #ifdef XNU_KERNEL_PRIVATE
253 
254 static inline boolean_t
is_thread_state32(const arm_unified_thread_state_t * its)255 is_thread_state32(const arm_unified_thread_state_t *its)
256 {
257 	return its->ash.flavor == ARM_THREAD_STATE32;
258 }
259 
260 static inline boolean_t
is_thread_state64(const arm_unified_thread_state_t * its)261 is_thread_state64(const arm_unified_thread_state_t *its)
262 {
263 	return its->ash.flavor == ARM_THREAD_STATE64;
264 }
265 
266 static inline arm_thread_state32_t*
thread_state32(arm_unified_thread_state_t * its)267 thread_state32(arm_unified_thread_state_t *its)
268 {
269 	return &its->ts_32;
270 }
271 
272 static inline arm_thread_state64_t*
thread_state64(arm_unified_thread_state_t * its)273 thread_state64(arm_unified_thread_state_t *its)
274 {
275 	return &its->ts_64;
276 }
277 
278 static inline const arm_thread_state32_t*
const_thread_state32(const arm_unified_thread_state_t * its)279 const_thread_state32(const arm_unified_thread_state_t *its)
280 {
281 	return &its->ts_32;
282 }
283 
284 static inline const arm_thread_state64_t*
const_thread_state64(const arm_unified_thread_state_t * its)285 const_thread_state64(const arm_unified_thread_state_t *its)
286 {
287 	return &its->ts_64;
288 }
289 
290 #if defined(__arm__)
291 #include <arm/proc_reg.h>
292 
293 #define ARM_SAVED_STATE (THREAD_STATE_NONE + 1)
294 
295 #if __ARM_VFP__
296 #define VFPSAVE_ALIGN  16
297 #define VFPSAVE_ATTRIB __attribute__((aligned (VFPSAVE_ALIGN)))
298 #define THREAD_ALIGN   VFPSAVE_ALIGN
299 
300 /*
301  * vector floating point saved state
302  */
303 struct arm_vfpsaved_state {
304 	uint32_t r[64];
305 	uint32_t fpscr;
306 	uint32_t fpexc;
307 };
308 #endif
309 
310 struct arm_saved_state {
311 	uint32_t r[13];     /* General purpose register r0-r12 */
312 	uint32_t sp;        /* Stack pointer r13 */
313 	uint32_t lr;        /* Link register r14 */
314 	uint32_t pc;        /* Program counter r15 */
315 	uint32_t cpsr;      /* Current program status register */
316 	uint32_t fsr;       /* Fault status */
317 	uint32_t far;       /* Virtual Fault Address */
318 	uint32_t exception; /* exception number */
319 
320 #if __ARM_VFP__
321 	/* VFP state */
322 	struct arm_vfpsaved_state VFPdata VFPSAVE_ATTRIB;
323 	// for packing reasons chtread_self and DebugData
324 	// are inside the the PcbData when __ARM_VFP__ is set
325 	arm_debug_state_t        *VFPpadding_DebugData;
326 	vm_address_t              VFPpadding_cthread_self;
327 #endif
328 };
329 typedef struct arm_saved_state arm_saved_state_t;
330 
331 /*
332  * Just for coexistence with AArch64 code.
333  */
334 typedef struct arm_saved_state arm_saved_state32_t;
335 
336 static inline void
copy_signed_thread_state(arm_saved_state_t * dst,const arm_saved_state_t * src)337 copy_signed_thread_state(arm_saved_state_t *dst, const arm_saved_state_t *src)
338 {
339 	*dst = *src;
340 }
341 
342 static inline arm_saved_state32_t*
saved_state32(arm_saved_state_t * iss)343 saved_state32(arm_saved_state_t *iss)
344 {
345 	return iss;
346 }
347 
348 static inline boolean_t
is_saved_state32(const arm_saved_state_t * iss __unused)349 is_saved_state32(const arm_saved_state_t *iss __unused)
350 {
351 	return TRUE;
352 }
353 
354 
355 struct arm_saved_state_tagged {
356 	uint32_t               tag;
357 	struct arm_saved_state state;
358 };
359 typedef struct arm_saved_state_tagged arm_saved_state_tagged_t;
360 
361 #define ARM_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
362 	(sizeof (arm_saved_state_t)/sizeof(unsigned int)))
363 
364 
365 static inline register_t
get_saved_state_pc(const arm_saved_state_t * iss)366 get_saved_state_pc(const arm_saved_state_t *iss)
367 {
368 	return iss->pc;
369 }
370 
371 static inline void
add_saved_state_pc(arm_saved_state_t * iss,int diff)372 add_saved_state_pc(arm_saved_state_t *iss, int diff)
373 {
374 	iss->pc += (unsigned int)diff;
375 }
376 
377 static inline void
set_saved_state_pc(arm_saved_state_t * iss,register_t pc)378 set_saved_state_pc(arm_saved_state_t *iss, register_t pc)
379 {
380 	iss->pc = (typeof(iss->pc))pc;
381 }
382 
383 static inline register_t
get_saved_state_sp(const arm_saved_state_t * iss)384 get_saved_state_sp(const arm_saved_state_t *iss)
385 {
386 	return iss->sp;
387 }
388 
389 static inline void
set_saved_state_sp(arm_saved_state_t * iss,register_t sp)390 set_saved_state_sp(arm_saved_state_t *iss, register_t sp)
391 {
392 	iss->sp = sp;
393 }
394 
395 static inline register_t
get_saved_state_fp(const arm_saved_state_t * iss)396 get_saved_state_fp(const arm_saved_state_t *iss)
397 {
398 	return iss->r[7];
399 }
400 
401 static inline void
set_saved_state_fp(arm_saved_state_t * iss,register_t fp)402 set_saved_state_fp(arm_saved_state_t *iss, register_t fp)
403 {
404 	iss->r[7] = fp;
405 }
406 
407 static inline register_t
get_saved_state_lr(const arm_saved_state_t * iss)408 get_saved_state_lr(const arm_saved_state_t *iss)
409 {
410 	return (register_t)iss->lr;
411 }
412 
413 static inline void
set_saved_state_lr(arm_saved_state_t * iss,register_t lr)414 set_saved_state_lr(arm_saved_state_t *iss, register_t lr)
415 {
416 	iss->lr = lr;
417 }
418 
419 static inline register_t
get_saved_state_cpsr(const arm_saved_state_t * iss)420 get_saved_state_cpsr(const arm_saved_state_t *iss)
421 {
422 	return iss->cpsr;
423 }
424 
425 static inline void
mask_saved_state_cpsr(arm_saved_state_t * iss,uint32_t set_bits,uint32_t clear_bits)426 mask_saved_state_cpsr(arm_saved_state_t *iss, uint32_t set_bits, uint32_t clear_bits)
427 {
428 	iss->cpsr |= set_bits;
429 	iss->cpsr &= ~clear_bits;
430 }
431 
432 static inline void
set_saved_state_cpsr(arm_saved_state_t * iss,register_t cpsr)433 set_saved_state_cpsr(arm_saved_state_t *iss, register_t cpsr)
434 {
435 	iss->cpsr = cpsr;
436 }
437 
438 static inline register_t
get_saved_state_reg(const arm_saved_state_t * iss,unsigned regno)439 get_saved_state_reg(const arm_saved_state_t *iss, unsigned regno)
440 {
441 	return iss->r[regno];
442 }
443 
444 static inline void
set_saved_state_reg(arm_saved_state_t * iss,unsigned regno,register_t val)445 set_saved_state_reg(arm_saved_state_t *iss, unsigned regno, register_t val)
446 {
447 	iss->r[regno] = val;
448 }
449 
450 #elif defined(__arm64__)
451 
452 #include <kern/assert.h>
453 #include <arm64/proc_reg.h>
454 #define CAST_ASSERT_SAFE(type, val) (assert((val) == ((type)(val))), (type)(val))
455 
456 /*
457  * GPR context
458  */
459 
460 struct arm_saved_state32 {
461 	uint32_t r[13];     /* General purpose register r0-r12 */
462 	uint32_t sp;        /* Stack pointer r13 */
463 	uint32_t lr;        /* Link register r14 */
464 	uint32_t pc;        /* Program counter r15 */
465 	uint32_t cpsr;      /* Current program status register */
466 	uint32_t far;       /* Virtual fault address */
467 	uint32_t esr;       /* Exception syndrome register */
468 	uint32_t exception; /* Exception number */
469 };
470 typedef struct arm_saved_state32 arm_saved_state32_t;
471 
472 struct arm_saved_state32_tagged {
473 	uint32_t                 tag;
474 	struct arm_saved_state32 state;
475 };
476 typedef struct arm_saved_state32_tagged arm_saved_state32_tagged_t;
477 
478 #define ARM_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
479 	        (sizeof(arm_saved_state32_t)/sizeof(unsigned int)))
480 
481 struct arm_saved_state64 {
482 	uint64_t x[29];     /* General purpose registers x0-x28 */
483 	uint64_t fp;        /* Frame pointer x29 */
484 	uint64_t lr;        /* Link register x30 */
485 	uint64_t sp;        /* Stack pointer x31 */
486 	uint64_t pc;        /* Program counter */
487 	uint32_t cpsr;      /* Current program status register */
488 	uint32_t reserved;  /* Reserved padding */
489 	uint64_t far;       /* Virtual fault address */
490 	uint32_t esr;       /* Exception syndrome register */
491 	uint32_t exception; /* Exception number */
492 #if defined(HAS_APPLE_PAC)
493 	uint64_t jophash;
494 #endif /* defined(HAS_APPLE_PAC) */
495 };
496 typedef struct arm_saved_state64 arm_saved_state64_t;
497 
498 #define ARM_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
499 	(sizeof(arm_saved_state64_t)/sizeof(unsigned int)))
500 
501 struct arm_saved_state64_tagged {
502 	uint32_t                 tag;
503 	struct arm_saved_state64 state;
504 };
505 typedef struct arm_saved_state64_tagged arm_saved_state64_tagged_t;
506 
507 struct arm_saved_state {
508 	arm_state_hdr_t ash;
509 	union {
510 		struct arm_saved_state32 ss_32;
511 		struct arm_saved_state64 ss_64;
512 	} uss;
513 } __attribute__((aligned(16)));
514 #define ss_32 uss.ss_32
515 #define ss_64 uss.ss_64
516 
517 typedef struct arm_saved_state arm_saved_state_t;
518 
519 struct arm_kernel_saved_state {
520 	uint64_t x[10];     /* General purpose registers x19-x28 */
521 	uint64_t fp;        /* Frame pointer x29 */
522 	uint64_t lr;        /* Link register x30 */
523 	uint64_t sp;        /* Stack pointer x31 */
524 	uint64_t pc;        /* Program counter */
525 } __attribute__((aligned(16)));
526 
527 typedef struct arm_kernel_saved_state arm_kernel_saved_state_t;
528 
529 #if defined(XNU_KERNEL_PRIVATE)
530 #if defined(HAS_APPLE_PAC)
531 
532 #include <sys/cdefs.h>
533 
534 /*
535  * Used by MANIPULATE_SIGNED_THREAD_STATE(), potentially from C++ (IOKit) code.
536  * Open-coded to prevent a circular dependency between mach/arm/thread_status.h
537  * and osfmk/arm/machine_routines.h.
538  */
539 __BEGIN_DECLS
540 extern uint64_t ml_pac_safe_interrupts_disable(void);
541 extern void ml_pac_safe_interrupts_restore(uint64_t);
542 __END_DECLS
543 
544 /*
545  * Methods used to sign and check thread state to detect corruptions of saved
546  * thread state across exceptions and context switches.
547  */
548 extern void ml_sign_thread_state(arm_saved_state_t *, uint64_t, uint32_t, uint64_t, uint64_t, uint64_t);
549 
550 extern void ml_check_signed_state(const arm_saved_state_t *, uint64_t, uint32_t, uint64_t, uint64_t, uint64_t);
551 
552 /* XXX: including stddef.f here breaks ctfmerge on some builds, so use __builtin_offsetof() instead of offsetof() */
553 #define ss64_offsetof(x) __builtin_offsetof(struct arm_saved_state, ss_64.x)
554 
555 /**
556  * Verify the signed thread state in _iss, execute the assembly instructions
557  * _instr, and re-sign the modified thread state.  Varargs specify additional
558  * inputs.
559  *
560  * _instr may read or modify the thread state in the following registers:
561  *
562  * x0: _iss
563  * x1: authed _iss->ss_64.pc
564  * w2: authed _iss->ss_64.cpsr
565  * x3: authed _iss->ss_64.lr
566  * x4: authed _iss->ss_64.x16
567  * x5: authed _iss->ss_64.x17
568  * x6: scratch register
569  * x7: scratch register
570  */
571 #define MANIPULATE_SIGNED_THREAD_STATE(_iss, _instr, ...)                       \
572 	do {                                                                    \
573 	        uint64_t _intr = ml_pac_safe_interrupts_disable();              \
574 	        asm volatile (                                                  \
575 	                "mov	x8, lr"				"\n"            \
576 	                "mov	x0, %[iss]"			"\n"            \
577 	                "msr	SPSel, #1"			"\n"            \
578 	                "ldp	x4, x5, [x0, %[SS64_X16]]"	"\n"            \
579 	                "ldr	x6, [x0, %[SS64_PC]]"		"\n"            \
580 	                "ldr	w7, [x0, %[SS64_CPSR]]"		"\n"            \
581 	                "ldr	x3, [x0, %[SS64_LR]]"		"\n"            \
582 	                "mov	x1, x6"				"\n"            \
583 	                "mov	w2, w7"				"\n"            \
584 	                "bl	_ml_check_signed_state"		"\n"            \
585 	                "mov	x1, x6"				"\n"            \
586 	                "mov	w2, w7"				"\n"            \
587 	                _instr					"\n"            \
588 	                "bl	_ml_sign_thread_state"		"\n"            \
589 	                "msr	SPSel, #0"			"\n"            \
590 	                "mov	lr, x8"				"\n"            \
591 	                :                                                       \
592 	                : [iss]         "r"(_iss),                              \
593 	                  [SS64_X16]	"i"(ss64_offsetof(x[16])),              \
594 	                  [SS64_PC]	"i"(ss64_offsetof(pc)),                 \
595 	                  [SS64_CPSR]	"i"(ss64_offsetof(cpsr)),               \
596 	                  [SS64_LR]	"i"(ss64_offsetof(lr)),##__VA_ARGS__    \
597 	                : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8"  \
598 	        );                                                              \
599 	        ml_pac_safe_interrupts_restore(_intr);                          \
600 	} while (0)
601 
602 static inline void
check_and_sign_copied_thread_state(arm_saved_state_t * dst,const arm_saved_state_t * src)603 check_and_sign_copied_thread_state(arm_saved_state_t *dst, const arm_saved_state_t *src)
604 {
605 	MANIPULATE_SIGNED_THREAD_STATE(src,
606 	    "mov	x0, %[dst]",
607 	    [dst] "r"(dst)
608 	    );
609 }
610 #endif /* defined(HAS_APPLE_PAC) */
611 
612 static inline void
copy_signed_thread_state(arm_saved_state_t * dst,const arm_saved_state_t * src)613 copy_signed_thread_state(arm_saved_state_t *dst, const arm_saved_state_t *src)
614 {
615 	*dst = *src;
616 #if defined(HAS_APPLE_PAC)
617 	check_and_sign_copied_thread_state(dst, src);
618 #endif
619 }
620 
621 #endif /* defined(XNU_KERNEL_PRIVATE) */
622 
623 static inline boolean_t
is_saved_state32(const arm_saved_state_t * iss)624 is_saved_state32(const arm_saved_state_t *iss)
625 {
626 	return iss->ash.flavor == ARM_SAVED_STATE32;
627 }
628 
629 static inline boolean_t
is_saved_state64(const arm_saved_state_t * iss)630 is_saved_state64(const arm_saved_state_t *iss)
631 {
632 	return iss->ash.flavor == ARM_SAVED_STATE64;
633 }
634 
635 static inline arm_saved_state32_t*
saved_state32(arm_saved_state_t * iss)636 saved_state32(arm_saved_state_t *iss)
637 {
638 	return &iss->ss_32;
639 }
640 
641 static inline const arm_saved_state32_t*
const_saved_state32(const arm_saved_state_t * iss)642 const_saved_state32(const arm_saved_state_t *iss)
643 {
644 	return &iss->ss_32;
645 }
646 
647 static inline arm_saved_state64_t*
saved_state64(arm_saved_state_t * iss)648 saved_state64(arm_saved_state_t *iss)
649 {
650 	return &iss->ss_64;
651 }
652 
653 static inline const arm_saved_state64_t*
const_saved_state64(const arm_saved_state_t * iss)654 const_saved_state64(const arm_saved_state_t *iss)
655 {
656 	return &iss->ss_64;
657 }
658 
659 static inline register_t
get_saved_state_pc(const arm_saved_state_t * iss)660 get_saved_state_pc(const arm_saved_state_t *iss)
661 {
662 	return (register_t)(is_saved_state32(iss) ? const_saved_state32(iss)->pc : const_saved_state64(iss)->pc);
663 }
664 
665 static inline void
add_saved_state_pc(arm_saved_state_t * iss,int diff)666 add_saved_state_pc(arm_saved_state_t *iss, int diff)
667 {
668 	if (is_saved_state32(iss)) {
669 		uint64_t pc = saved_state32(iss)->pc + (uint32_t)diff;
670 		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
671 	} else {
672 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
673 		MANIPULATE_SIGNED_THREAD_STATE(iss,
674 		    "mov	w6, %w[diff]		\n"
675 		    "add	x1, x1, w6, sxtw	\n"
676 		    "str	x1, [x0, %[SS64_PC]]	\n",
677 		    [diff] "r"(diff)
678 		    );
679 #else
680 		saved_state64(iss)->pc += (unsigned long)diff;
681 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC) */
682 	}
683 }
684 
685 static inline void
set_saved_state_pc(arm_saved_state_t * iss,register_t pc)686 set_saved_state_pc(arm_saved_state_t *iss, register_t pc)
687 {
688 	if (is_saved_state32(iss)) {
689 		saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc);
690 	} else {
691 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
692 		MANIPULATE_SIGNED_THREAD_STATE(iss,
693 		    "mov	x1, %[pc]		\n"
694 		    "str	x1, [x0, %[SS64_PC]]	\n",
695 		    [pc] "r"(pc)
696 		    );
697 #else
698 		saved_state64(iss)->pc = (unsigned long)pc;
699 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC) */
700 	}
701 }
702 
703 static inline register_t
get_saved_state_sp(const arm_saved_state_t * iss)704 get_saved_state_sp(const arm_saved_state_t *iss)
705 {
706 	return (register_t)(is_saved_state32(iss) ? const_saved_state32(iss)->sp : const_saved_state64(iss)->sp);
707 }
708 
709 static inline void
set_saved_state_sp(arm_saved_state_t * iss,register_t sp)710 set_saved_state_sp(arm_saved_state_t *iss, register_t sp)
711 {
712 	if (is_saved_state32(iss)) {
713 		saved_state32(iss)->sp = CAST_ASSERT_SAFE(uint32_t, sp);
714 	} else {
715 		saved_state64(iss)->sp = (uint64_t)sp;
716 	}
717 }
718 
719 static inline register_t
get_saved_state_lr(const arm_saved_state_t * iss)720 get_saved_state_lr(const arm_saved_state_t *iss)
721 {
722 	return (register_t)(is_saved_state32(iss) ? const_saved_state32(iss)->lr : const_saved_state64(iss)->lr);
723 }
724 
725 static inline void
set_saved_state_lr(arm_saved_state_t * iss,register_t lr)726 set_saved_state_lr(arm_saved_state_t *iss, register_t lr)
727 {
728 	if (is_saved_state32(iss)) {
729 		saved_state32(iss)->lr = CAST_ASSERT_SAFE(uint32_t, lr);
730 	} else {
731 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
732 		MANIPULATE_SIGNED_THREAD_STATE(iss,
733 		    "mov	x3, %[lr]		\n"
734 		    "str	x3, [x0, %[SS64_LR]]	\n",
735 		    [lr] "r"(lr)
736 		    );
737 #else
738 		saved_state64(iss)->lr = (unsigned long)lr;
739 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC) */
740 	}
741 }
742 
743 static inline register_t
get_saved_state_fp(const arm_saved_state_t * iss)744 get_saved_state_fp(const arm_saved_state_t *iss)
745 {
746 	return (register_t)(is_saved_state32(iss) ? const_saved_state32(iss)->r[7] : const_saved_state64(iss)->fp);
747 }
748 
749 static inline void
set_saved_state_fp(arm_saved_state_t * iss,register_t fp)750 set_saved_state_fp(arm_saved_state_t *iss, register_t fp)
751 {
752 	if (is_saved_state32(iss)) {
753 		saved_state32(iss)->r[7] = CAST_ASSERT_SAFE(uint32_t, fp);
754 	} else {
755 		saved_state64(iss)->fp = (uint64_t)fp;
756 	}
757 }
758 
759 static inline int
check_saved_state_reglimit(const arm_saved_state_t * iss,unsigned reg)760 check_saved_state_reglimit(const arm_saved_state_t *iss, unsigned reg)
761 {
762 	return is_saved_state32(iss) ? (reg < ARM_SAVED_STATE32_COUNT) : (reg < ARM_SAVED_STATE64_COUNT);
763 }
764 
765 static inline register_t
get_saved_state_reg(const arm_saved_state_t * iss,unsigned reg)766 get_saved_state_reg(const arm_saved_state_t *iss, unsigned reg)
767 {
768 	if (!check_saved_state_reglimit(iss, reg)) {
769 		return 0;
770 	}
771 
772 	return (register_t)(is_saved_state32(iss) ? (const_saved_state32(iss)->r[reg]) : (const_saved_state64(iss)->x[reg]));
773 }
774 
775 static inline void
set_saved_state_reg(arm_saved_state_t * iss,unsigned reg,register_t value)776 set_saved_state_reg(arm_saved_state_t *iss, unsigned reg, register_t value)
777 {
778 	if (!check_saved_state_reglimit(iss, reg)) {
779 		return;
780 	}
781 
782 	if (is_saved_state32(iss)) {
783 		saved_state32(iss)->r[reg] = CAST_ASSERT_SAFE(uint32_t, value);
784 	} else {
785 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
786 		/* x16 and x17 are part of the jophash */
787 		if (reg == 16) {
788 			MANIPULATE_SIGNED_THREAD_STATE(iss,
789 			    "mov	x4, %[value]		\n"
790 			    "str	x4, [x0, %[SS64_X16]]	\n",
791 			    [value] "r"(value)
792 			    );
793 			return;
794 		} else if (reg == 17) {
795 			MANIPULATE_SIGNED_THREAD_STATE(iss,
796 			    "mov	x5, %[value]		\n"
797 			    "str	x5, [x0, %[SS64_X17]]	\n",
798 			    [value] "r"(value),
799 			    [SS64_X17] "i"(ss64_offsetof(x[17]))
800 			    );
801 			return;
802 		}
803 #endif
804 		saved_state64(iss)->x[reg] = (uint64_t)value;
805 	}
806 }
807 
808 
809 static inline uint32_t
get_saved_state_cpsr(const arm_saved_state_t * iss)810 get_saved_state_cpsr(const arm_saved_state_t *iss)
811 {
812 	return is_saved_state32(iss) ? const_saved_state32(iss)->cpsr : const_saved_state64(iss)->cpsr;
813 }
814 
815 static inline void
mask_saved_state_cpsr(arm_saved_state_t * iss,uint32_t set_bits,uint32_t clear_bits)816 mask_saved_state_cpsr(arm_saved_state_t *iss, uint32_t set_bits, uint32_t clear_bits)
817 {
818 	if (is_saved_state32(iss)) {
819 		saved_state32(iss)->cpsr |= set_bits;
820 		saved_state32(iss)->cpsr &= ~clear_bits;
821 	} else {
822 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
823 		MANIPULATE_SIGNED_THREAD_STATE(iss,
824 		    "mov	w6, %w[set_bits]	\n"
825 		    "orr	w2, w2, w6, lsl #0	\n"
826 		    "mov	w6, %w[clear_bits]	\n"
827 		    "bic	w2, w2, w6, lsl #0	\n"
828 		    "str	w2, [x0, %[SS64_CPSR]]	\n",
829 		    [set_bits] "r"(set_bits),
830 		    [clear_bits] "r"(clear_bits)
831 		    );
832 #else
833 		saved_state64(iss)->cpsr |= set_bits;
834 		saved_state64(iss)->cpsr &= ~clear_bits;
835 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC) */
836 	}
837 }
838 
839 static inline void
set_saved_state_cpsr(arm_saved_state_t * iss,uint32_t cpsr)840 set_saved_state_cpsr(arm_saved_state_t *iss, uint32_t cpsr)
841 {
842 	if (is_saved_state32(iss)) {
843 		saved_state32(iss)->cpsr = cpsr;
844 	} else {
845 #if defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC)
846 		MANIPULATE_SIGNED_THREAD_STATE(iss,
847 		    "mov	w2, %w[cpsr]		\n"
848 		    "str	w2, [x0, %[SS64_CPSR]]	\n",
849 		    [cpsr] "r"(cpsr)
850 		    );
851 #else
852 		saved_state64(iss)->cpsr = cpsr;
853 #endif /* defined(XNU_KERNEL_PRIVATE) && defined(HAS_APPLE_PAC) */
854 	}
855 }
856 
857 static inline register_t
get_saved_state_far(const arm_saved_state_t * iss)858 get_saved_state_far(const arm_saved_state_t *iss)
859 {
860 	return (register_t)(is_saved_state32(iss) ? const_saved_state32(iss)->far : const_saved_state64(iss)->far);
861 }
862 
863 static inline void
set_saved_state_far(arm_saved_state_t * iss,register_t far)864 set_saved_state_far(arm_saved_state_t *iss, register_t far)
865 {
866 	if (is_saved_state32(iss)) {
867 		saved_state32(iss)->far = CAST_ASSERT_SAFE(uint32_t, far);
868 	} else {
869 		saved_state64(iss)->far = (uint64_t)far;
870 	}
871 }
872 
873 static inline uint32_t
get_saved_state_esr(const arm_saved_state_t * iss)874 get_saved_state_esr(const arm_saved_state_t *iss)
875 {
876 	return is_saved_state32(iss) ? const_saved_state32(iss)->esr : const_saved_state64(iss)->esr;
877 }
878 
879 static inline void
set_saved_state_esr(arm_saved_state_t * iss,uint32_t esr)880 set_saved_state_esr(arm_saved_state_t *iss, uint32_t esr)
881 {
882 	if (is_saved_state32(iss)) {
883 		saved_state32(iss)->esr = esr;
884 	} else {
885 		saved_state64(iss)->esr = esr;
886 	}
887 }
888 
889 static inline uint32_t
get_saved_state_exc(const arm_saved_state_t * iss)890 get_saved_state_exc(const arm_saved_state_t *iss)
891 {
892 	return is_saved_state32(iss) ? const_saved_state32(iss)->exception : const_saved_state64(iss)->exception;
893 }
894 
895 static inline void
set_saved_state_exc(arm_saved_state_t * iss,uint32_t exc)896 set_saved_state_exc(arm_saved_state_t *iss, uint32_t exc)
897 {
898 	if (is_saved_state32(iss)) {
899 		saved_state32(iss)->exception = exc;
900 	} else {
901 		saved_state64(iss)->exception = exc;
902 	}
903 }
904 
905 extern void panic_unimplemented(void);
906 
907 /**
908  * Extracts the SVC (Supervisor Call) number from the appropriate GPR (General
909  * Purpose Register).
910  *
911  * @param[in] iss the 32-bit or 64-bit ARM saved state (i.e. trap frame).
912  *
913  * @return The SVC number.
914  */
915 static inline int
get_saved_state_svc_number(const arm_saved_state_t * iss)916 get_saved_state_svc_number(const arm_saved_state_t *iss)
917 {
918 	return is_saved_state32(iss) ? (int)const_saved_state32(iss)->r[12] : (int)const_saved_state64(iss)->x[ARM64_SYSCALL_CODE_REG_NUM]; /* Only first word counts here */
919 }
920 
921 typedef _STRUCT_ARM_LEGACY_DEBUG_STATE arm_legacy_debug_state_t;
922 
923 struct arm_debug_aggregate_state {
924 	arm_state_hdr_t dsh;
925 	union {
926 		arm_debug_state32_t ds32;
927 		arm_debug_state64_t ds64;
928 	} uds;
929 	os_refcnt_t     ref;
930 } __attribute__((aligned(16)));
931 
932 typedef struct arm_debug_aggregate_state arm_debug_state_t;
933 
934 #define ARM_LEGACY_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
935 	(sizeof (arm_legacy_debug_state_t)/sizeof(uint32_t)))
936 
937 /*
938  * NEON context
939  */
940 typedef __uint128_t uint128_t;
941 typedef uint64_t uint64x2_t __attribute__((ext_vector_type(2)));
942 typedef uint32_t uint32x4_t __attribute__((ext_vector_type(4)));
943 
944 struct arm_neon_saved_state32 {
945 	union {
946 		uint128_t q[16];
947 		uint64_t  d[32];
948 		uint32_t  s[32];
949 	} v;
950 	uint32_t fpsr;
951 	uint32_t fpcr;
952 };
953 typedef struct arm_neon_saved_state32 arm_neon_saved_state32_t;
954 
955 #define ARM_NEON_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \
956 	(sizeof (arm_neon_saved_state32_t)/sizeof(unsigned int)))
957 
958 struct arm_neon_saved_state64 {
959 	union {
960 		uint128_t  q[32];
961 		uint64x2_t d[32];
962 		uint32x4_t s[32];
963 	} v;
964 	uint32_t fpsr;
965 	uint32_t fpcr;
966 };
967 typedef struct arm_neon_saved_state64 arm_neon_saved_state64_t;
968 
969 #define ARM_NEON_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \
970 	(sizeof (arm_neon_saved_state64_t)/sizeof(unsigned int)))
971 
972 struct arm_neon_saved_state {
973 	arm_state_hdr_t nsh;
974 	union {
975 		struct arm_neon_saved_state32 ns_32;
976 		struct arm_neon_saved_state64 ns_64;
977 	} uns;
978 };
979 typedef struct arm_neon_saved_state arm_neon_saved_state_t;
980 #define ns_32 uns.ns_32
981 #define ns_64 uns.ns_64
982 
983 struct arm_kernel_neon_saved_state {
984 	uint64_t d[8];
985 	uint32_t fpcr;
986 };
987 typedef struct arm_kernel_neon_saved_state arm_kernel_neon_saved_state_t;
988 
989 static inline boolean_t
is_neon_saved_state32(const arm_neon_saved_state_t * state)990 is_neon_saved_state32(const arm_neon_saved_state_t *state)
991 {
992 	return state->nsh.flavor == ARM_NEON_SAVED_STATE32;
993 }
994 
995 static inline boolean_t
is_neon_saved_state64(const arm_neon_saved_state_t * state)996 is_neon_saved_state64(const arm_neon_saved_state_t *state)
997 {
998 	return state->nsh.flavor == ARM_NEON_SAVED_STATE64;
999 }
1000 
1001 static inline arm_neon_saved_state32_t *
neon_state32(arm_neon_saved_state_t * state)1002 neon_state32(arm_neon_saved_state_t *state)
1003 {
1004 	return &state->ns_32;
1005 }
1006 
1007 static inline arm_neon_saved_state64_t *
neon_state64(arm_neon_saved_state_t * state)1008 neon_state64(arm_neon_saved_state_t *state)
1009 {
1010 	return &state->ns_64;
1011 }
1012 
1013 
1014 /*
1015  * Aggregated context
1016  */
1017 
1018 struct arm_context {
1019 	struct arm_saved_state ss;
1020 	struct arm_neon_saved_state ns;
1021 };
1022 typedef struct arm_context arm_context_t;
1023 
1024 struct arm_kernel_context {
1025 	struct arm_kernel_saved_state ss;
1026 	struct arm_kernel_neon_saved_state ns;
1027 };
1028 typedef struct arm_kernel_context arm_kernel_context_t;
1029 
1030 extern void saved_state_to_thread_state64(const arm_saved_state_t*, arm_thread_state64_t*);
1031 extern void thread_state64_to_saved_state(const arm_thread_state64_t*, arm_saved_state_t*);
1032 
1033 #else /* defined(__arm__) */
1034 #error Unknown arch
1035 #endif /* defined(__arm__) */
1036 
1037 extern void saved_state_to_thread_state32(const arm_saved_state_t*, arm_thread_state32_t*);
1038 extern void thread_state32_to_saved_state(const arm_thread_state32_t*, arm_saved_state_t*);
1039 
1040 #endif /* XNU_KERNEL_PRIVATE */
1041 
1042 #endif /* defined (__arm__) || defined (__arm64__) */
1043 
1044 #endif /* _ARM_THREAD_STATUS_H_ */
1045