xref: /xnu-8020.140.41/EXTERNAL_HEADERS/corecrypto/cc_runtime_config.h (revision 27b03b360a988dfd3dfdf34262bb0042026747cc)
1 /* Copyright (c) (2012,2014,2015,2016,2017,2018,2019,2020) Apple Inc. All rights reserved.
2  *
3  * corecrypto is licensed under Apple Inc.’s Internal Use License Agreement (which
4  * is contained in the License.txt file distributed with corecrypto) and only to
5  * people who accept that license. IMPORTANT:  Any license rights granted to you by
6  * Apple Inc. (if any) are limited to internal use within your organization only on
7  * devices and computers you own or control, for the sole purpose of verifying the
8  * security characteristics and correct functioning of the Apple Software.  You may
9  * not, directly or indirectly, redistribute the Apple Software or any portions thereof.
10  */
11 
12 #ifndef CORECRYPTO_CC_RUNTIME_CONFIG_H_
13 #define CORECRYPTO_CC_RUNTIME_CONFIG_H_
14 
15 #include <corecrypto/cc_config.h>
16 
17 /* Only intel systems have these runtime switches today. */
18 
19 #if defined(__x86_64__) || defined(__i386__)
20 
21 #if CC_KERNEL
22     #include <i386/cpuid.h>
23     #define CC_HAS_RDRAND() ((cpuid_features() & CPUID_FEATURE_RDRAND) != 0)
24     #define CC_HAS_AESNI() ((cpuid_features() & CPUID_FEATURE_AES) != 0)
25     #define CC_HAS_SupplementalSSE3() ((cpuid_features() & CPUID_FEATURE_SSSE3) != 0)
26     #define CC_HAS_AVX1() ((cpuid_features() & CPUID_FEATURE_AVX1_0) != 0)
27     #define CC_HAS_AVX2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX2) != 0)
28     #define CC_HAS_AVX512_AND_IN_KERNEL()    ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX512F) !=0)
29     #define CC_HAS_BMI2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_BMI2) != 0)
30     #define CC_HAS_ADX() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_ADX) != 0)
31 
32 #elif CC_XNU_KERNEL_AVAILABLE && CC_INTERNAL_SDK
33     #include <System/i386/cpu_capabilities.h>
34     #define CC_HAS_RDRAND() (_get_cpu_capabilities() & kHasRDRAND)
35     #define CC_HAS_AESNI() (_get_cpu_capabilities() & kHasAES)
36     #define CC_HAS_SupplementalSSE3() (_get_cpu_capabilities() & kHasSupplementalSSE3)
37     #define CC_HAS_AVX1() (_get_cpu_capabilities() & kHasAVX1_0)
38     #define CC_HAS_AVX2() (_get_cpu_capabilities() & kHasAVX2_0)
39     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
40     #define CC_HAS_BMI2() (_get_cpu_capabilities() & kHasBMI2)
41     #define CC_HAS_ADX() (_get_cpu_capabilities() & kHasADX)
42 
43 #elif CC_SGX
44 // SGX has no cpuid function, so these will fail
45     #define CC_HAS_AESNI() 0
46     #define CC_HAS_SupplementalSSE3() 0
47     #define CC_HAS_AVX1() 0
48     #define CC_HAS_AVX2() 0
49     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
50     #define CC_HAS_BMI2() 0
51     #define CC_HAS_RDRAND() 0
52     #define CC_HAS_ADX() 0
53 #else
54     #define CC_HAS_AESNI() __builtin_cpu_supports("aes")
55     #define CC_HAS_SupplementalSSE3() __builtin_cpu_supports("ssse3")
56     #define CC_HAS_AVX1() __builtin_cpu_supports("avx")
57     #define CC_HAS_AVX2() __builtin_cpu_supports("avx2")
58     #define CC_HAS_AVX512_AND_IN_KERNEL() 0
59     #define CC_HAS_BMI2() __builtin_cpu_supports("bmi2")
60 #if CC_LINUX || !CC_INTERNAL_SDK
61     #include <cpuid.h>
62     #include <stdbool.h>
63 
_cpu_supports_rdrand()64     CC_INLINE bool _cpu_supports_rdrand()
65     {
66         unsigned int eax, ebx, ecx, edx;
67         __cpuid(1, eax, ebx, ecx, edx);
68         return ecx & bit_RDRND;
69     }
70 
_cpu_supports_adx()71     CC_INLINE bool _cpu_supports_adx()
72     {
73         unsigned int eax, ebx, ecx, edx;
74         __cpuid_count(7, 0, eax, ebx, ecx, edx);
75         return ebx & bit_ADX;
76     }
77 
78     #define CC_HAS_RDRAND() _cpu_supports_rdrand()
79     #define CC_HAS_ADX() _cpu_supports_adx()
80 #else
81     #define CC_HAS_RDRAND() 0
82     #define CC_HAS_ADX() 0
83 #endif
84 
85 #endif
86 
87 #endif  // defined(__x86_64__) || defined(__i386__)
88 
89 #endif /* CORECRYPTO_CC_RUNTIME_CONFIG_H_ */
90