xref: /xnu-8019.80.24/tests/hvtest_x86_guest.c (revision a325d9c4a84054e40bbe985afedcb50ab80993ea)
1*a325d9c4SApple OSS Distributions // Do not include system headers in this file. Code in this file needs to be
2*a325d9c4SApple OSS Distributions // self-contained, as it runs in a VM.
3*a325d9c4SApple OSS Distributions #include "hvtest_x86_guest.h"
4*a325d9c4SApple OSS Distributions #include <stdbool.h>
5*a325d9c4SApple OSS Distributions #include <stdatomic.h>
6*a325d9c4SApple OSS Distributions 
7*a325d9c4SApple OSS Distributions #define VMCALL(x) __asm__("vmcall" : : "a" ((x)) :)
8*a325d9c4SApple OSS Distributions 
9*a325d9c4SApple OSS Distributions void
simple_long_mode_vcpu_entry(uint64_t arg)10*a325d9c4SApple OSS Distributions simple_long_mode_vcpu_entry(uint64_t arg)
11*a325d9c4SApple OSS Distributions {
12*a325d9c4SApple OSS Distributions 	VMCALL(arg + 0x23456);
13*a325d9c4SApple OSS Distributions 
14*a325d9c4SApple OSS Distributions 	while (true) {
15*a325d9c4SApple OSS Distributions 	}
16*a325d9c4SApple OSS Distributions }
17*a325d9c4SApple OSS Distributions 
18*a325d9c4SApple OSS Distributions void
smp_vcpu_entry(uint64_t arg)19*a325d9c4SApple OSS Distributions smp_vcpu_entry(uint64_t arg)
20*a325d9c4SApple OSS Distributions {
21*a325d9c4SApple OSS Distributions 	// Performing this atomic operation on the same memory on all VCPUs confirms
22*a325d9c4SApple OSS Distributions 	// that they are running in the same IPA space, and that the space is
23*a325d9c4SApple OSS Distributions 	// shareable.
24*a325d9c4SApple OSS Distributions 	atomic_uint *count = (atomic_uint *)arg;
25*a325d9c4SApple OSS Distributions 
26*a325d9c4SApple OSS Distributions 	VMCALL(atomic_fetch_add_explicit(count, 1,
27*a325d9c4SApple OSS Distributions 	    memory_order_relaxed));
28*a325d9c4SApple OSS Distributions 
29*a325d9c4SApple OSS Distributions 	while (true) {
30*a325d9c4SApple OSS Distributions 	}
31*a325d9c4SApple OSS Distributions }
32*a325d9c4SApple OSS Distributions 
33*a325d9c4SApple OSS Distributions __unused static inline uint64_t
rdmsr(uint64_t msr)34*a325d9c4SApple OSS Distributions rdmsr(uint64_t msr)
35*a325d9c4SApple OSS Distributions {
36*a325d9c4SApple OSS Distributions 	uint32_t idx = (uint32_t)msr;
37*a325d9c4SApple OSS Distributions 	uint32_t outhi, outlo;
38*a325d9c4SApple OSS Distributions 
39*a325d9c4SApple OSS Distributions 	__asm__("rdmsr" : "=d"(outhi), "=a"(outlo) : "c"(idx));
40*a325d9c4SApple OSS Distributions 
41*a325d9c4SApple OSS Distributions 	return ((uint64_t)outhi << 32) | outlo;
42*a325d9c4SApple OSS Distributions }
43*a325d9c4SApple OSS Distributions 
44*a325d9c4SApple OSS Distributions static inline void
wrmsr(uint64_t msr,uint64_t value)45*a325d9c4SApple OSS Distributions wrmsr(uint64_t msr, uint64_t value)
46*a325d9c4SApple OSS Distributions {
47*a325d9c4SApple OSS Distributions 	uint32_t idx = (uint32_t)msr;
48*a325d9c4SApple OSS Distributions 	uint32_t inhi = (uint32_t)((value & 0xffffffff00000000UL) >> 32);
49*a325d9c4SApple OSS Distributions 	uint32_t inlo = (uint32_t)(value & 0xffffffffUL);
50*a325d9c4SApple OSS Distributions 
51*a325d9c4SApple OSS Distributions 	__asm__("wrmsr" : : "d"(inhi),"a"(inlo),"c"(idx));
52*a325d9c4SApple OSS Distributions }
53*a325d9c4SApple OSS Distributions 
54*a325d9c4SApple OSS Distributions void
native_msr_vcpu_entry(uint64_t arg __unused)55*a325d9c4SApple OSS Distributions native_msr_vcpu_entry(uint64_t arg __unused)
56*a325d9c4SApple OSS Distributions {
57*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_STAR, 0x123456789abcdef0);
58*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_LSTAR, 0x123456789abc);
59*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_CSTAR, 0x123456789abc);
60*a325d9c4SApple OSS Distributions 
61*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_FMASK, 0x123456789abcdef0);
62*a325d9c4SApple OSS Distributions 
63*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_TSC_AUX, 0x123);
64*a325d9c4SApple OSS Distributions 
65*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_SYSENTER_CS, 0xffff);
66*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_SYSENTER_ESP, 0x123456789abc);
67*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_SYSENTER_EIP, 0x123456789abc);
68*a325d9c4SApple OSS Distributions 
69*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_FS_BASE, 0x123456789abc);
70*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_GS_BASE, 0x123456789abc);
71*a325d9c4SApple OSS Distributions 	wrmsr(MSR_IA32_KERNEL_GS_BASE, 0x123456789abc);
72*a325d9c4SApple OSS Distributions 
73*a325d9c4SApple OSS Distributions 	VMCALL(0x23456);
74*a325d9c4SApple OSS Distributions 
75*a325d9c4SApple OSS Distributions 	while (true) {
76*a325d9c4SApple OSS Distributions 	}
77*a325d9c4SApple OSS Distributions }
78