1*43a90889SApple OSS Distributionsfrom xnu import * 2*43a90889SApple OSS Distributionsfrom misc import DoReadMsr64, DoWriteMsr64 3*43a90889SApple OSS Distributions 4*43a90889SApple OSS Distributions###################################### 5*43a90889SApple OSS Distributions# Globals 6*43a90889SApple OSS Distributions###################################### 7*43a90889SApple OSS Distributionslapic_base_addr = 0xfee00000 8*43a90889SApple OSS Distributionsioapic_base_addr = 0xfec00000 9*43a90889SApple OSS Distributionsioapic_index_off = 0x0 10*43a90889SApple OSS Distributionsioapic_data_off = 0x10 11*43a90889SApple OSS Distributions 12*43a90889SApple OSS Distributions 13*43a90889SApple OSS Distributions###################################### 14*43a90889SApple OSS Distributions# LAPIC Helper functions 15*43a90889SApple OSS Distributions###################################### 16*43a90889SApple OSS Distributionsdef IsArchX86_64(): 17*43a90889SApple OSS Distributions """ Determines if target machine is x86_64 18*43a90889SApple OSS Distributions Returns: 19*43a90889SApple OSS Distributions True if running on x86_64, False otherwise 20*43a90889SApple OSS Distributions """ 21*43a90889SApple OSS Distributions return kern.arch == "x86_64" 22*43a90889SApple OSS Distributions 23*43a90889SApple OSS Distributions 24*43a90889SApple OSS Distributions@static_var('x2apic_enabled', -1) 25*43a90889SApple OSS Distributionsdef IsX2ApicEnabled(): 26*43a90889SApple OSS Distributions """ Reads the APIC configuration MSR to determine if APIC is operating 27*43a90889SApple OSS Distributions in x2APIC mode. The MSR is read the first time this function is 28*43a90889SApple OSS Distributions called, and the answer is remembered for all subsequent calls. 29*43a90889SApple OSS Distributions Returns: 30*43a90889SApple OSS Distributions True if APIC is x2APIC mode 31*43a90889SApple OSS Distributions False if not 32*43a90889SApple OSS Distributions """ 33*43a90889SApple OSS Distributions apic_cfg_msr = 0x1b 34*43a90889SApple OSS Distributions apic_cfg_msr_x2en_mask = 0xc00 35*43a90889SApple OSS Distributions if IsX2ApicEnabled.x2apic_enabled < 0: 36*43a90889SApple OSS Distributions if (int(DoReadMsr64(apic_cfg_msr, xnudefines.lcpu_self)) & apic_cfg_msr_x2en_mask == 37*43a90889SApple OSS Distributions apic_cfg_msr_x2en_mask): 38*43a90889SApple OSS Distributions IsX2ApicEnabled.x2apic_enabled = 1 39*43a90889SApple OSS Distributions else: 40*43a90889SApple OSS Distributions IsX2ApicEnabled.x2apic_enabled = 0 41*43a90889SApple OSS Distributions return IsX2ApicEnabled.x2apic_enabled == 1 42*43a90889SApple OSS Distributions 43*43a90889SApple OSS Distributionsdef DoLapicRead32(offset, cpu): 44*43a90889SApple OSS Distributions """ Read the specified 32-bit LAPIC register 45*43a90889SApple OSS Distributions Params: 46*43a90889SApple OSS Distributions offset: int - index of LAPIC register to read 47*43a90889SApple OSS Distributions cpu: int - cpu ID 48*43a90889SApple OSS Distributions Returns: 49*43a90889SApple OSS Distributions The 32-bit LAPIC register value 50*43a90889SApple OSS Distributions """ 51*43a90889SApple OSS Distributions if IsX2ApicEnabled(): 52*43a90889SApple OSS Distributions return DoReadMsr64(offset >> 4, cpu) 53*43a90889SApple OSS Distributions else: 54*43a90889SApple OSS Distributions return ReadPhysInt(lapic_base_addr + offset, 32, cpu) 55*43a90889SApple OSS Distributions 56*43a90889SApple OSS Distributionsdef DoLapicWrite32(offset, val, cpu): 57*43a90889SApple OSS Distributions """ Write the specified 32-bit LAPIC register 58*43a90889SApple OSS Distributions Params: 59*43a90889SApple OSS Distributions offset: int - index of LAPIC register to write 60*43a90889SApple OSS Distributions val: int - write value 61*43a90889SApple OSS Distributions cpu: int - cpu ID 62*43a90889SApple OSS Distributions Returns: 63*43a90889SApple OSS Distributions True if success, False if error 64*43a90889SApple OSS Distributions """ 65*43a90889SApple OSS Distributions if IsX2ApicEnabled(): 66*43a90889SApple OSS Distributions return DoWriteMsr64(offset >> 4, cpu, val) 67*43a90889SApple OSS Distributions else: 68*43a90889SApple OSS Distributions return WritePhysInt(lapic_base_addr + offset, val, 32) 69*43a90889SApple OSS Distributions 70*43a90889SApple OSS Distributions###################################### 71*43a90889SApple OSS Distributions# LAPIC Register Print functions 72*43a90889SApple OSS Distributions###################################### 73*43a90889SApple OSS Distributionsdef GetLapicVersionFields(reg_val): 74*43a90889SApple OSS Distributions """ Helper function for DoLapicDump that prints the fields of the 75*43a90889SApple OSS Distributions version register. 76*43a90889SApple OSS Distributions Params: 77*43a90889SApple OSS Distributions reg_val: int - the value of the version register to print 78*43a90889SApple OSS Distributions Returns: 79*43a90889SApple OSS Distributions string showing the fields 80*43a90889SApple OSS Distributions """ 81*43a90889SApple OSS Distributions lvt_num = (reg_val >> 16) + 1 82*43a90889SApple OSS Distributions version = reg_val & 0xff 83*43a90889SApple OSS Distributions return "[VERSION={:d} MaxLVT={:d}]".format(lvt_num, version) 84*43a90889SApple OSS Distributions 85*43a90889SApple OSS Distributionsdef GetLapicSpuriousVectorFields(reg_val): 86*43a90889SApple OSS Distributions """ Helper function for DoLapicDump that prints the fields of the 87*43a90889SApple OSS Distributions spurious vector register. 88*43a90889SApple OSS Distributions Params: 89*43a90889SApple OSS Distributions reg_val: int - the value of the spurious vector registre to print 90*43a90889SApple OSS Distributions Returns: 91*43a90889SApple OSS Distributions string showing the fields 92*43a90889SApple OSS Distributions """ 93*43a90889SApple OSS Distributions vector = reg_val & 0xff 94*43a90889SApple OSS Distributions enabled = (reg_val & 0x100) >> 8 95*43a90889SApple OSS Distributions return "[VEC={:3d} ENABLED={:d}]".format(vector, enabled) 96*43a90889SApple OSS Distributions 97*43a90889SApple OSS Distributionsdef GetLapicIcrHiFields(reg_val): 98*43a90889SApple OSS Distributions """ Helper function for DoLapicDump that prints the fields of the 99*43a90889SApple OSS Distributions upper 32-bits of the Interrupt Control Register (ICR). 100*43a90889SApple OSS Distributions Params: 101*43a90889SApple OSS Distributions reg_val: int - the value of the ICR to show 102*43a90889SApple OSS Distributions Returns: 103*43a90889SApple OSS Distributions string showing the fields 104*43a90889SApple OSS Distributions """ 105*43a90889SApple OSS Distributions dest = reg_val >> 24 106*43a90889SApple OSS Distributions return "[DEST={:d}]".format(dest) 107*43a90889SApple OSS Distributions 108*43a90889SApple OSS Distributionsdef GetLapicTimerDivideFields(reg_val): 109*43a90889SApple OSS Distributions """ Helper function for DoLapicDump that prints the fields of the 110*43a90889SApple OSS Distributions timer divide register. 111*43a90889SApple OSS Distributions Params: 112*43a90889SApple OSS Distributions reg_val: int - the value of the timer divide register 113*43a90889SApple OSS Distributions Returns: 114*43a90889SApple OSS Distributions string showing the fields 115*43a90889SApple OSS Distributions """ 116*43a90889SApple OSS Distributions divide_val = ((reg_val & 0x8) >> 1) | (reg_val & 0x3) 117*43a90889SApple OSS Distributions if divide_val == 0x7: 118*43a90889SApple OSS Distributions divide_by = 1 119*43a90889SApple OSS Distributions else: 120*43a90889SApple OSS Distributions divide_by = 2 << divide_val 121*43a90889SApple OSS Distributions return "[Divide by {:d}]".format(divide_by) 122*43a90889SApple OSS Distributions 123*43a90889SApple OSS Distributionsdef GetApicFields(reg_val): 124*43a90889SApple OSS Distributions """ Helper function for DoLapicDump and DoIoapicDump that prints the 125*43a90889SApple OSS Distributions fields of the APIC register. 126*43a90889SApple OSS Distributions Params: 127*43a90889SApple OSS Distributions reg_val: int - the value of the APIC register to print 128*43a90889SApple OSS Distributions Returns: 129*43a90889SApple OSS Distributions string showing the fields 130*43a90889SApple OSS Distributions """ 131*43a90889SApple OSS Distributions vector = reg_val & 0xff 132*43a90889SApple OSS Distributions tsc_deadline = reg_val & 0x40000 133*43a90889SApple OSS Distributions periodic = reg_val & 0x20000 134*43a90889SApple OSS Distributions masked = reg_val & 0x10000 135*43a90889SApple OSS Distributions trigger = reg_val & 0x8000 136*43a90889SApple OSS Distributions polarity = reg_val & 0x2000 137*43a90889SApple OSS Distributions pending = reg_val & 0x1000 138*43a90889SApple OSS Distributions 139*43a90889SApple OSS Distributions ret_str = "[VEC={:3d} MASK={:3s} TRIG={:5s} POL={:4s} PEND={:3s}".format( 140*43a90889SApple OSS Distributions vector, 141*43a90889SApple OSS Distributions "no" if masked == 0 else "yes", 142*43a90889SApple OSS Distributions "edge" if trigger == 0 else "level", 143*43a90889SApple OSS Distributions "low" if polarity == 0 else "high", 144*43a90889SApple OSS Distributions "no" if pending == 0 else "yes") 145*43a90889SApple OSS Distributions if not periodic == 0: 146*43a90889SApple OSS Distributions ret_str += " PERIODIC" 147*43a90889SApple OSS Distributions if not tsc_deadline == 0: 148*43a90889SApple OSS Distributions ret_str += " TSC_DEADLINE" 149*43a90889SApple OSS Distributions ret_str += "]" 150*43a90889SApple OSS Distributions return ret_str 151*43a90889SApple OSS Distributions 152*43a90889SApple OSS Distributionsdef DoLapicDump(): 153*43a90889SApple OSS Distributions """ Prints all LAPIC registers 154*43a90889SApple OSS Distributions """ 155*43a90889SApple OSS Distributions print("LAPIC operating mode: {:s}".format( 156*43a90889SApple OSS Distributions "x2APIC" if IsX2ApicEnabled() else "xAPIC")) 157*43a90889SApple OSS Distributions # LAPIC register offset, register name, field formatting function 158*43a90889SApple OSS Distributions lapic_dump_table = [ 159*43a90889SApple OSS Distributions (0x020, "ID", None), 160*43a90889SApple OSS Distributions (0x030, "VERSION", GetLapicVersionFields), 161*43a90889SApple OSS Distributions (0x080, "TASK PRIORITY", None), 162*43a90889SApple OSS Distributions (0x0A0, "PROCESSOR PRIORITY", None), 163*43a90889SApple OSS Distributions (0x0D0, "LOGICAL DEST", None), 164*43a90889SApple OSS Distributions (0x0E0, "DEST FORMAT", None), 165*43a90889SApple OSS Distributions (0x0F0, "SPURIOUS VECTOR", GetLapicSpuriousVectorFields), 166*43a90889SApple OSS Distributions (0x100, "ISR[031:000]", None), 167*43a90889SApple OSS Distributions (0x110, "ISR[063:032]", None), 168*43a90889SApple OSS Distributions (0x120, "ISR[095:064]", None), 169*43a90889SApple OSS Distributions (0x130, "ISR[127:096]", None), 170*43a90889SApple OSS Distributions (0x140, "ISR[159:128]", None), 171*43a90889SApple OSS Distributions (0x150, "ISR[191:160]", None), 172*43a90889SApple OSS Distributions (0x160, "ISR[223:192]", None), 173*43a90889SApple OSS Distributions (0x170, "ISR[225:224]", None), 174*43a90889SApple OSS Distributions (0x180, "TMR[031:000]", None), 175*43a90889SApple OSS Distributions (0x190, "TMR[063:032]", None), 176*43a90889SApple OSS Distributions (0x1A0, "TMR[095:064]", None), 177*43a90889SApple OSS Distributions (0x1B0, "TMR[127:096]", None), 178*43a90889SApple OSS Distributions (0x1C0, "TMR[159:128]", None), 179*43a90889SApple OSS Distributions (0x1D0, "TMR[191:160]", None), 180*43a90889SApple OSS Distributions (0x1E0, "TMR[223:192]", None), 181*43a90889SApple OSS Distributions (0x1F0, "TMR[225:224]", None), 182*43a90889SApple OSS Distributions (0x200, "IRR[031:000]", None), 183*43a90889SApple OSS Distributions (0x210, "IRR[063:032]", None), 184*43a90889SApple OSS Distributions (0x220, "IRR[095:064]", None), 185*43a90889SApple OSS Distributions (0x230, "IRR[127:096]", None), 186*43a90889SApple OSS Distributions (0x240, "IRR[159:128]", None), 187*43a90889SApple OSS Distributions (0x250, "IRR[191:160]", None), 188*43a90889SApple OSS Distributions (0x260, "IRR[223:192]", None), 189*43a90889SApple OSS Distributions (0x270, "IRR[225:224]", None), 190*43a90889SApple OSS Distributions (0x280, "ERROR STATUS", None), 191*43a90889SApple OSS Distributions (0x300, "Interrupt Command LO", GetApicFields), 192*43a90889SApple OSS Distributions (0x310, "Interrupt Command HI", GetLapicIcrHiFields), 193*43a90889SApple OSS Distributions (0x320, "LVT Timer", GetApicFields), 194*43a90889SApple OSS Distributions (0x350, "LVT LINT0", GetApicFields), 195*43a90889SApple OSS Distributions (0x360, "LVT LINT1", GetApicFields), 196*43a90889SApple OSS Distributions (0x370, "LVT Error", GetApicFields), 197*43a90889SApple OSS Distributions (0x340, "LVT PerfMon", GetApicFields), 198*43a90889SApple OSS Distributions (0x330, "LVT Thermal", GetApicFields), 199*43a90889SApple OSS Distributions (0x3e0, "Timer Divide", GetLapicTimerDivideFields), 200*43a90889SApple OSS Distributions (0x380, "Timer Init Count", None), 201*43a90889SApple OSS Distributions (0x390, "Timer Cur Count", None)] 202*43a90889SApple OSS Distributions for reg in lapic_dump_table: 203*43a90889SApple OSS Distributions reg_val = DoLapicRead32(reg[0], xnudefines.lcpu_self) 204*43a90889SApple OSS Distributions if reg[2] == None: 205*43a90889SApple OSS Distributions print("LAPIC[{:#05x}] {:21s}: {:#010x}".format(reg[0], reg[1], reg_val)) 206*43a90889SApple OSS Distributions else: 207*43a90889SApple OSS Distributions print("LAPIC[{:#05x}] {:21s}: {:#010x} {:s}".format(reg[0], reg[1], 208*43a90889SApple OSS Distributions reg_val, reg[2](reg_val))) 209*43a90889SApple OSS Distributions 210*43a90889SApple OSS Distributions###################################### 211*43a90889SApple OSS Distributions# IOAPIC Helper functions 212*43a90889SApple OSS Distributions###################################### 213*43a90889SApple OSS Distributionsdef DoIoApicRead(offset): 214*43a90889SApple OSS Distributions """ Read the specified IOAPIC register 215*43a90889SApple OSS Distributions Params: 216*43a90889SApple OSS Distributions offset: int - index of IOAPIC register to read 217*43a90889SApple OSS Distributions Returns: 218*43a90889SApple OSS Distributions int 32-bit read value 219*43a90889SApple OSS Distributions """ 220*43a90889SApple OSS Distributions WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8) 221*43a90889SApple OSS Distributions return ReadPhysInt(ioapic_base_addr + ioapic_data_off, 32) 222*43a90889SApple OSS Distributions 223*43a90889SApple OSS Distributionsdef DoIoApicWrite(offset, val): 224*43a90889SApple OSS Distributions """ Write the specified IOAPIC register 225*43a90889SApple OSS Distributions Params: 226*43a90889SApple OSS Distributions offset: int - index of IOAPIC register to write 227*43a90889SApple OSS Distributions Returns: 228*43a90889SApple OSS Distributions True if success, False if error 229*43a90889SApple OSS Distributions """ 230*43a90889SApple OSS Distributions WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8) 231*43a90889SApple OSS Distributions return WritePhysInt(ioapic_base_addr + ioapic_data_off, val, 32) 232*43a90889SApple OSS Distributions 233*43a90889SApple OSS Distributionsdef DoIoApicDump(): 234*43a90889SApple OSS Distributions """ Prints all IOAPIC registers 235*43a90889SApple OSS Distributions """ 236*43a90889SApple OSS Distributions # Show IOAPIC ID register 237*43a90889SApple OSS Distributions ioapic_id = DoIoApicRead(0) 238*43a90889SApple OSS Distributions print("IOAPIC[0x00] {:9s}: {:#010x}".format("ID", ioapic_id)) 239*43a90889SApple OSS Distributions # Show IOAPIC Version register 240*43a90889SApple OSS Distributions ioapic_ver = DoIoApicRead(1) 241*43a90889SApple OSS Distributions maxredir = ((ioapic_ver >> 16) & 0xff) + 1 242*43a90889SApple OSS Distributions print("IOAPIC[0x01] {:9s}: {:#010x}".format("VERSION", ioapic_ver) +\ 243*43a90889SApple OSS Distributions " [MAXREDIR={:02d} PRQ={:d} VERSION={:#04x}]".format( 244*43a90889SApple OSS Distributions maxredir, 245*43a90889SApple OSS Distributions ioapic_ver >> 15 & 0x1, 246*43a90889SApple OSS Distributions ioapic_ver & 0xff)) 247*43a90889SApple OSS Distributions # Show IOAPIC redirect regsiters 248*43a90889SApple OSS Distributions for redir in range(maxredir): 249*43a90889SApple OSS Distributions redir_val_lo = DoIoApicRead(0x10 + redir * 2) 250*43a90889SApple OSS Distributions redir_val_hi = DoIoApicRead(0x10 + (redir * 2) + 1) 251*43a90889SApple OSS Distributions print("IOAPIC[{:#04x}] IOREDIR{:02d}: {:#08x}{:08x} {:s}".format( 252*43a90889SApple OSS Distributions 0x10 + (redir * 2), 253*43a90889SApple OSS Distributions redir, 254*43a90889SApple OSS Distributions redir_val_hi, 255*43a90889SApple OSS Distributions redir_val_lo, 256*43a90889SApple OSS Distributions GetApicFields(redir_val_lo))) 257*43a90889SApple OSS Distributions 258*43a90889SApple OSS Distributions###################################### 259*43a90889SApple OSS Distributions# LLDB commands 260*43a90889SApple OSS Distributions###################################### 261*43a90889SApple OSS Distributions@lldb_command('lapic_read32') 262*43a90889SApple OSS Distributionsdef LapicRead32(cmd_args=None): 263*43a90889SApple OSS Distributions """ Read the LAPIC register at the specified offset. The CPU can 264*43a90889SApple OSS Distributions be optionally specified 265*43a90889SApple OSS Distributions Syntax: lapic_read32 <offset> [lcpu] 266*43a90889SApple OSS Distributions """ 267*43a90889SApple OSS Distributions if cmd_args is None or len(cmd_args) == 0: 268*43a90889SApple OSS Distributions raise ArgumentError("Command requires 1 argument") 269*43a90889SApple OSS Distributions if not IsArchX86_64(): 270*43a90889SApple OSS Distributions print("lapic_read32 not supported on this architecture.") 271*43a90889SApple OSS Distributions return 272*43a90889SApple OSS Distributions 273*43a90889SApple OSS Distributions lcpu = xnudefines.lcpu_self 274*43a90889SApple OSS Distributions if len(cmd_args) > 1: 275*43a90889SApple OSS Distributions lcpu = ArgumentStringToInt(cmd_args[1]) 276*43a90889SApple OSS Distributions 277*43a90889SApple OSS Distributions offset = ArgumentStringToInt(cmd_args[0]) 278*43a90889SApple OSS Distributions read_val = DoLapicRead32(offset, lcpu) 279*43a90889SApple OSS Distributions print("LAPIC[{:#05x}]: {:#010x}".format(offset, read_val)) 280*43a90889SApple OSS Distributions 281*43a90889SApple OSS Distributions@lldb_command('lapic_write32') 282*43a90889SApple OSS Distributionsdef LapicWrite32(cmd_args=None): 283*43a90889SApple OSS Distributions """ Write the LAPIC register at the specified offset. The CPU can 284*43a90889SApple OSS Distributions be optionally specified. Prints an error message if there was a 285*43a90889SApple OSS Distributions failure. Prints nothing upon success. 286*43a90889SApple OSS Distributions Syntax: lapic_write32 <offset> <val> [lcpu] 287*43a90889SApple OSS Distributions """ 288*43a90889SApple OSS Distributions if cmd_args is None or len(cmd_args) < 2: 289*43a90889SApple OSS Distributions raise ArgumentError("Please provide 2 arguments") 290*43a90889SApple OSS Distributions return 291*43a90889SApple OSS Distributions if not IsArchX86_64(): 292*43a90889SApple OSS Distributions print("lapic_write32 not supported on this architecture.") 293*43a90889SApple OSS Distributions return 294*43a90889SApple OSS Distributions offset = ArgumentStringToInt(cmd_args[0]) 295*43a90889SApple OSS Distributions write_val = ArgumentStringToInt(cmd_args[1]) 296*43a90889SApple OSS Distributions lcpu = xnudefines.lcpu_self 297*43a90889SApple OSS Distributions if len(cmd_args) > 2: 298*43a90889SApple OSS Distributions lcpu = ArgumentStringToInt(cmd_args[2]) 299*43a90889SApple OSS Distributions if not DoLapicWrite32(offset, write_val, lcpu): 300*43a90889SApple OSS Distributions print("lapic_write32 FAILED") 301*43a90889SApple OSS Distributions 302*43a90889SApple OSS Distributions@lldb_command('lapic_dump') 303*43a90889SApple OSS Distributionsdef LapicDump(cmd_args=None): 304*43a90889SApple OSS Distributions """ Prints all LAPIC entries 305*43a90889SApple OSS Distributions """ 306*43a90889SApple OSS Distributions if not IsArchX86_64(): 307*43a90889SApple OSS Distributions print("lapic_dump not supported on this architecture.") 308*43a90889SApple OSS Distributions return 309*43a90889SApple OSS Distributions DoLapicDump() 310*43a90889SApple OSS Distributions 311*43a90889SApple OSS Distributions@lldb_command('ioapic_read32') 312*43a90889SApple OSS Distributionsdef IoApicRead32(cmd_args=None): 313*43a90889SApple OSS Distributions """ Read the IOAPIC register at the specified offset. 314*43a90889SApple OSS Distributions Syntax: ioapic_read32 <offset> 315*43a90889SApple OSS Distributions """ 316*43a90889SApple OSS Distributions if cmd_args is None or len(cmd_args) < 1: 317*43a90889SApple OSS Distributions raise ArgumentError("Command requires 1 argument") 318*43a90889SApple OSS Distributions return 319*43a90889SApple OSS Distributions if not IsArchX86_64(): 320*43a90889SApple OSS Distributions print("ioapic_read32 not supported on this architecture.") 321*43a90889SApple OSS Distributions return 322*43a90889SApple OSS Distributions 323*43a90889SApple OSS Distributions offset = ArgumentStringToInt(cmd_args[0]) 324*43a90889SApple OSS Distributions read_val = DoIoApicRead(offset) 325*43a90889SApple OSS Distributions print("IOAPIC[{:#04x}]: {:#010x}".format(offset, read_val)) 326*43a90889SApple OSS Distributions 327*43a90889SApple OSS Distributions@lldb_command('ioapic_write32') 328*43a90889SApple OSS Distributionsdef IoApicWrite32(cmd_args=None): 329*43a90889SApple OSS Distributions """ Write the IOAPIC register at the specified offset. 330*43a90889SApple OSS Distributions Syntax: ioapic_write32 <offset> <val> 331*43a90889SApple OSS Distributions """ 332*43a90889SApple OSS Distributions if cmd_args is None or len(cmd_args) < 2: 333*43a90889SApple OSS Distributions raise ArgumentError("Command requires 2 arguments") 334*43a90889SApple OSS Distributions return 335*43a90889SApple OSS Distributions if not IsArchX86_64(): 336*43a90889SApple OSS Distributions print("ioapic_write32 not supported on this architecture.") 337*43a90889SApple OSS Distributions return 338*43a90889SApple OSS Distributions 339*43a90889SApple OSS Distributions offset = ArgumentStringToInt(cmd_args[0]) 340*43a90889SApple OSS Distributions write_val = ArgumentStringToInt(cmd_args[1]) 341*43a90889SApple OSS Distributions if not DoIoApicWrite(offset, write_val): 342*43a90889SApple OSS Distributions print("ioapic_write32 FAILED") 343*43a90889SApple OSS Distributions return 344*43a90889SApple OSS Distributions 345*43a90889SApple OSS Distributions@lldb_command('ioapic_dump') 346*43a90889SApple OSS Distributionsdef IoApicDump(cmd_args=None): 347*43a90889SApple OSS Distributions """ Prints all IOAPIC entries 348*43a90889SApple OSS Distributions """ 349*43a90889SApple OSS Distributions if not IsArchX86_64(): 350*43a90889SApple OSS Distributions print("ioapic_dump not supported on this architecture.") 351*43a90889SApple OSS Distributions return 352*43a90889SApple OSS Distributions DoIoApicDump() 353*43a90889SApple OSS Distributions 354