1 /* Copyright (c) (2012,2014-2023) Apple Inc. All rights reserved. 2 * 3 * corecrypto is licensed under Apple Inc.’s Internal Use License Agreement (which 4 * is contained in the License.txt file distributed with corecrypto) and only to 5 * people who accept that license. IMPORTANT: Any license rights granted to you by 6 * Apple Inc. (if any) are limited to internal use within your organization only on 7 * devices and computers you own or control, for the sole purpose of verifying the 8 * security characteristics and correct functioning of the Apple Software. You may 9 * not, directly or indirectly, redistribute the Apple Software or any portions thereof. 10 */ 11 12 #ifndef CORECRYPTO_CC_RUNTIME_CONFIG_H_ 13 #define CORECRYPTO_CC_RUNTIME_CONFIG_H_ 14 15 #include <corecrypto/cc_config.h> 16 #include <corecrypto/cc.h> 17 18 #if defined(__x86_64__) || defined(__i386__) 19 20 #define CC_HAS_DIT() (0) 21 22 #if CC_KERNEL 23 #include <i386/cpuid.h> 24 #define CC_HAS_RDRAND() ((cpuid_features() & CPUID_FEATURE_RDRAND) != 0) 25 #define CC_HAS_AESNI() ((cpuid_features() & CPUID_FEATURE_AES) != 0) 26 #define CC_HAS_SupplementalSSE3() ((cpuid_features() & CPUID_FEATURE_SSSE3) != 0) 27 #define CC_HAS_AVX1() ((cpuid_features() & CPUID_FEATURE_AVX1_0) != 0) 28 #define CC_HAS_AVX2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX2) != 0) 29 #define CC_HAS_AVX512_AND_IN_KERNEL() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX512F) !=0) 30 #define CC_HAS_BMI2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_BMI2) != 0) 31 #define CC_HAS_ADX() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_ADX) != 0) 32 33 #elif CC_DARWIN && CC_INTERNAL_SDK 34 #include <System/i386/cpu_capabilities.h> 35 #define CC_HAS_RDRAND() (_get_cpu_capabilities() & kHasRDRAND) 36 #define CC_HAS_AESNI() (_get_cpu_capabilities() & kHasAES) 37 #define CC_HAS_SupplementalSSE3() (_get_cpu_capabilities() & kHasSupplementalSSE3) 38 #define CC_HAS_AVX1() (_get_cpu_capabilities() & kHasAVX1_0) 39 #define CC_HAS_AVX2() (_get_cpu_capabilities() & kHasAVX2_0) 40 #define CC_HAS_AVX512_AND_IN_KERNEL() 0 41 #define CC_HAS_BMI2() (_get_cpu_capabilities() & kHasBMI2) 42 #define CC_HAS_ADX() (_get_cpu_capabilities() & kHasADX) 43 44 #elif CC_SGX 45 #include <cpuid.h> 46 #include <stdbool.h> 47 #include <stdint.h> 48 49 #define CPUID_REG_RAX 0 50 #define CPUID_REG_RBX 1 51 #define CPUID_REG_RCX 2 52 #define CPUID_REG_RDX 3 53 54 #define CPUID_FEATURE_AES 25 55 #define CPUID_FEATURE_SSE3 0 56 #define CPUID_FEATURE_AVX1 28 57 #define CPUID_FEATURE_LEAF7_AVX2 5 58 #define CPUID_FEATURE_LEAF7_BMI2 8 59 #define CPUID_FEATURE_RDRAND 30 60 #define CPUID_FEATURE_LEAF7_ADX 19 61 _cpu_supports(uint64_t leaf,uint64_t subleaf,uint8_t cpuid_register,uint8_t bit)62 CC_INLINE bool _cpu_supports(uint64_t leaf, uint64_t subleaf, uint8_t cpuid_register, uint8_t bit) { 63 uint64_t registers[4] = {0}; 64 registers[CPUID_REG_RAX] = leaf; 65 registers[CPUID_REG_RCX] = subleaf; 66 if (oe_emulate_cpuid(®isters[CPUID_REG_RAX], ®isters[CPUID_REG_RBX], ®isters[CPUID_REG_RCX], ®isters[CPUID_REG_RDX])) { 67 return false; 68 } 69 return (registers[cpuid_register] >> bit) & 1; 70 } 71 72 73 #define CC_HAS_AESNI() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AES) 74 #define CC_HAS_SupplementalSSE3() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_SSE3) 75 #define CC_HAS_AVX1() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AVX1) 76 #define CC_HAS_AVX2() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_AVX2) 77 #define CC_HAS_AVX512_AND_IN_KERNEL() 0 78 #define CC_HAS_BMI2() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_BMI2) 79 #define CC_HAS_RDRAND() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_RDRAND) 80 #define CC_HAS_ADX() _cpu_supports(7, 0, CPUID_REG_RBX, CPUID_FEATURE_LEAF7_ADX) 81 #else 82 #define CC_HAS_AESNI() __builtin_cpu_supports("aes") 83 #define CC_HAS_SupplementalSSE3() __builtin_cpu_supports("ssse3") 84 #define CC_HAS_AVX1() __builtin_cpu_supports("avx") 85 #define CC_HAS_AVX2() __builtin_cpu_supports("avx2") 86 #define CC_HAS_AVX512_AND_IN_KERNEL() 0 87 #define CC_HAS_BMI2() __builtin_cpu_supports("bmi2") 88 #if CC_LINUX || !CC_INTERNAL_SDK 89 #include <cpuid.h> 90 _cpu_supports_rdrand(void)91 CC_INLINE bool _cpu_supports_rdrand(void) 92 { 93 unsigned int eax, ebx, ecx, edx; 94 __cpuid(1, eax, ebx, ecx, edx); 95 return ecx & bit_RDRND; 96 } 97 _cpu_supports_adx(void)98 CC_INLINE bool _cpu_supports_adx(void) 99 { 100 unsigned int eax, ebx, ecx, edx; 101 __cpuid_count(7, 0, eax, ebx, ecx, edx); 102 return ebx & bit_ADX; 103 } 104 105 #define CC_HAS_RDRAND() _cpu_supports_rdrand() 106 #define CC_HAS_ADX() _cpu_supports_adx() 107 #else 108 #define CC_HAS_RDRAND() 0 109 #define CC_HAS_ADX() 0 110 #endif 111 112 #endif 113 114 #endif // defined(__x86_64__) || defined(__i386__) 115 116 #if defined(__arm64__) 117 118 #if CC_TXM 119 120 #define CC_HAS_SHA512() (CC_ARM_FEATURE_SHA512) 121 #define CC_HAS_SHA3() (0) 122 123 extern bool cc_dit_supported(void); 124 #define CC_HAS_DIT() (cc_dit_supported()) 125 126 #elif CC_DARWIN && CC_INTERNAL_SDK 127 #include <System/arm/cpu_capabilities.h> 128 129 #if __has_feature(address_sanitizer) 130 #define CC_COMMPAGE_CPU_CAPABILITIES \ 131 (*((volatile __attribute__((address_space(1))) uint64_t *)_COMM_PAGE_CPU_CAPABILITIES64)) 132 #else 133 #define CC_COMMPAGE_CPU_CAPABILITIES \ 134 (*((volatile uint64_t *)_COMM_PAGE_CPU_CAPABILITIES64)) 135 #endif 136 _cpu_supports(uint64_t flag)137 CC_INLINE bool _cpu_supports(uint64_t flag) 138 { 139 return CC_COMMPAGE_CPU_CAPABILITIES & flag; 140 } 141 142 #define CC_HAS_SHA512() _cpu_supports(kHasARMv82SHA512) 143 #define CC_HAS_SHA3() _cpu_supports(kHasARMv82SHA3) 144 #define CC_HAS_DIT() _cpu_supports(kHasFeatDIT) 145 #else 146 #define CC_HAS_SHA512() (CC_ARM_FEATURE_SHA512) 147 #define CC_HAS_SHA3() (0) 148 #define CC_HAS_DIT() (0) 149 #endif 150 151 #endif // defined(__arm64__) 152 153 #endif /* CORECRYPTO_CC_RUNTIME_CONFIG_H_ */ 154