1*a1e26a70SApple OSS Distributions# CPU Counters 2*a1e26a70SApple OSS Distributions 3*a1e26a70SApple OSS DistributionsThe xnu subsystems that manage CPU performance counters. 4*a1e26a70SApple OSS Distributions 5*a1e26a70SApple OSS Distributions## Overview 6*a1e26a70SApple OSS Distributions 7*a1e26a70SApple OSS DistributionsCPU performance counters are hardware registers that count events of interest to efficient CPU execution. 8*a1e26a70SApple OSS DistributionsCounters that measure events closely correlated with each CPU's execution pipeline are managed by the Core Performance Monitoring Unit (CPMU). 9*a1e26a70SApple OSS DistributionsThe CPMU contains both fixed instructions and cycles counters, as well as configurable counters that can be programmed to count any of several hundred possible events. 10*a1e26a70SApple OSS DistributionsIn addition to the CPMU, the Last Level Cache (LLC) hosts the Uncore Performance Monitoring Unit (UPMU), which measures effects that aren't necessarily correlated to a single CPU. 11*a1e26a70SApple OSS DistributionsAll counters in the UPMU are configurable. 12*a1e26a70SApple OSS Distributions 13*a1e26a70SApple OSS DistributionsCounters are typically used in one of two ways: 14*a1e26a70SApple OSS Distributions 15*a1e26a70SApple OSS Distributions1. In "counting" mode, their counts are periodically queried and tallied up for a duration of interest. 16*a1e26a70SApple OSS Distributions2. In "sampling" mode, the counters are programmed to generate a Performance Monitor Interrupt (PMI) periodically, during which the currently running code can be sampled, like a time profiler. 17*a1e26a70SApple OSS Distributions 18*a1e26a70SApple OSS Distributions## Subsystems 19*a1e26a70SApple OSS Distributions 20*a1e26a70SApple OSS DistributionsThere are several subsystems that provide access to CPU counter hardware: 21*a1e26a70SApple OSS Distributions 22*a1e26a70SApple OSS Distributions- kpc: The Kernel Performance Counter system is the oldest subsystem and still manages the configurable CPMU counters. 23*a1e26a70SApple OSS DistributionsIt can use PMIs from these counters to trigger kperf samples and counter values can be recorded in kperf samples. 24*a1e26a70SApple OSS Distributions 25*a1e26a70SApple OSS Distributions- Monotonic: The Monotonic system provides access to the fixed CPMU counters with limited support for PMIs. 26*a1e26a70SApple OSS DistributionsAdditionally, the UPMU is entirely provided by a Monotonic dev node interface. 27*a1e26a70SApple OSS Distributions 28*a1e26a70SApple OSS Distributions- cpc: The CPU Performance Counter subsystem provides a policy layer on top of kpc and Monotonic to prevent malicious use of the hardware. 29*a1e26a70SApple OSS Distributions 30*a1e26a70SApple OSS DistributionsEventually, cpc will subsume kpc's and Monotonic's roles in the system. 31*a1e26a70SApple OSS Distributions 32*a1e26a70SApple OSS Distributions## Integrations 33*a1e26a70SApple OSS Distributions 34*a1e26a70SApple OSS Distributions- The Recount subsystem makes extensive use of the fixed CPMU counters to attribute CPU resources back to threads and processes. 35*a1e26a70SApple OSS Distributions 36*a1e26a70SApple OSS Distributions- Microstackshot telemetry is sampled periodically using the CPMU's cycle PMI trigger. 37*a1e26a70SApple OSS Distributions 38*a1e26a70SApple OSS Distributions- Stackshot includes cycles and instructions for each thread container in its kcdata. 39*a1e26a70SApple OSS Distributions 40*a1e26a70SApple OSS Distributions- The kperf profiling system can trigger samples of thread states and call stacks using CPMU PMIs, allowing it to sample thread states and call stacks. 41*a1e26a70SApple OSS DistributionsAnd CPU counter values can be sampled by kperf on other triggers, like timers or kdebug events. 42*a1e26a70SApple OSS Distributions 43*a1e26a70SApple OSS Distributions## See Also 44*a1e26a70SApple OSS Distributions 45*a1e26a70SApple OSS Distributions- <doc:recount> 46