1 /* 2 * Copyright (c) 1999-2024 Apple Inc. All rights reserved. 3 * 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ 5 * 6 * This file contains Original Code and/or Modifications of Original Code 7 * as defined in and that are subject to the Apple Public Source License 8 * Version 2.0 (the 'License'). You may not use this file except in 9 * compliance with the License. The rights granted to you under the License 10 * may not be used to create, or enable the creation or redistribution of, 11 * unlawful or unlicensed copies of an Apple operating system, or to 12 * circumvent, violate, or enable the circumvention or violation of, any 13 * terms of an Apple operating system software license agreement. 14 * 15 * Please obtain a copy of the License at 16 * http://www.opensource.apple.com/apsl/ and read it before using this file. 17 * 18 * The Original Code and all software distributed under the License are 19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 23 * Please see the License for the specific language governing rights and 24 * limitations under the License. 25 * 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ 27 */ 28 /* 29 * NOTICE: This file was modified by SPARTA, Inc. in 2005 to introduce 30 * support for mandatory and extensible security protections. This notice 31 * is included in support of clause 2.2 (b) of the Apple Public License, 32 * Version 2.0. 33 */ 34 #ifndef DLIL_SYSCTL_H 35 #define DLIL_SYSCTL_H 36 37 /* 38 * Sysctl settings and metrics for DLIL. 39 */ 40 41 #if BSD_KERNEL_PRIVATE 42 43 #include <sys/kernel_types.h> 44 #include <net/if.h> 45 #include <net/dlil_var_private.h> 46 47 48 /****************************************************************************** 49 * Section: DLIL send and receive queues. * 50 ******************************************************************************/ 51 52 #define IF_RCVQ_MINLEN 32 53 #define IF_RCVQ_MAXLEN 256 54 55 extern uint32_t if_sndq_maxlen; 56 extern uint32_t if_rcvq_maxlen; 57 extern uint32_t if_delaybased_queue; /* enable/disable*/ 58 extern uint32_t ifnet_start_delayed; 59 extern uint32_t ifnet_delay_start_disabled; 60 extern uint32_t if_rcvq_burst_limit; 61 extern uint32_t if_rcvq_trim_pct; 62 extern struct chain_len_stats tx_chain_len_stats; 63 extern uint32_t tx_chain_len_count; 64 65 66 /****************************************************************************** 67 * Section: DLIL opportunistic rx polling. * 68 ******************************************************************************/ 69 70 /* Input poll interval definitions */ 71 #define IF_RXPOLL_INTERVALTIME_MIN (1ULL * 1000) /* 1 us */ 72 #define IF_RXPOLL_INTERVALTIME (1ULL * 1000 * 1000) /* 1 ms */ 73 74 extern uint32_t if_rxpoll; /* enable/disable */ 75 extern uint32_t if_rxpoll_decay; 76 extern uint64_t if_rxpoll_mode_holdtime; 77 extern uint64_t if_rxpoll_sample_holdtime; 78 extern uint64_t if_rxpoll_interval_time; 79 extern uint32_t if_rxpoll_interval_pkts; 80 extern uint32_t if_sysctl_rxpoll_wlowat; 81 extern uint32_t if_sysctl_rxpoll_whiwat; 82 extern uint32_t if_rxpoll_max; 83 84 #if TEST_INPUT_THREAD_TERMINATION 85 extern uint32_t if_input_thread_termination_spin; 86 #endif /* TEST_INPUT_THREAD_TERMINATION */ 87 88 extern uint32_t cur_dlil_input_threads; 89 90 91 /****************************************************************************** 92 * Section: hardware-assisted checksum mechanism. * 93 ******************************************************************************/ 94 95 extern uint32_t hwcksum_tx; /* enable/disable */ 96 extern uint32_t hwcksum_rx; /* enable/disable */ 97 extern uint64_t hwcksum_in_invalidated; /* Inbound packets with invalid hw cksum. */ 98 99 100 /* 101 * Hardware-assisted checksum debugging metrics. 102 */ 103 104 #define HWCKSUM_DBG_PARTIAL_FORCED 0x1 /* Forced partial checksum. */ 105 #define HWCKSUM_DBG_PARTIAL_RXOFF_ADJ 0x2 /* Adjust start offset. */ 106 #define HWCKSUM_DBG_FINALIZE_FORCED 0x10 /* Forced finalize. */ 107 #define HWCKSUM_DBG_MASK \ 108 (HWCKSUM_DBG_PARTIAL_FORCED | HWCKSUM_DBG_PARTIAL_RXOFF_ADJ | \ 109 HWCKSUM_DBG_FINALIZE_FORCED) 110 111 extern uint32_t hwcksum_dbg; /* enable/disable */ 112 extern uint32_t hwcksum_dbg_mode; /* HWCKSUM_DBG_ bitmask */ 113 extern uint64_t hwcksum_dbg_partial_forced; /* Packets forced using partial cksum. */ 114 extern uint64_t hwcksum_dbg_partial_forced_bytes; /* Bytes forced using partial cksum. */ 115 extern uint32_t hwcksum_dbg_partial_rxoff_forced; /* Forced partial cksum rx offset. */ 116 extern uint32_t hwcksum_dbg_partial_rxoff_adj; /* Adjusted partial cksum rx offset. */ 117 extern uint64_t hwcksum_dbg_verified; /* Packets verified for having good cksum. */ 118 extern uint64_t hwcksum_dbg_bad_cksum; /* Packets with bad hw cksum. */ 119 extern uint64_t hwcksum_dbg_bad_rxoff; /* Packets with invalid rx offset. */ 120 extern uint64_t hwcksum_dbg_adjusted; /* Packets with adjusted rx offset. */ 121 extern uint64_t hwcksum_dbg_finalized_hdr; /* Finalized headers. */ 122 extern uint64_t hwcksum_dbg_finalized_data; /* Finalized payloads. */ 123 124 125 /****************************************************************************** 126 * Section: DLIL debugging, notifications and sanity checks * 127 ******************************************************************************/ 128 129 extern uint32_t if_flowadv; /* enable/disable */ 130 extern uint32_t threshold_notify; /* enable/disable */ 131 extern uint32_t threshold_interval; /* in seconds */ 132 extern struct net_api_stats net_api_stats; 133 extern int dlil_verbose; 134 extern uint32_t net_wake_pkt_debug; 135 136 #if IFNET_INPUT_SANITY_CHK 137 extern uint32_t dlil_input_sanity_check; 138 #endif /* IFNET_INPUT_SANITY_CHK */ 139 140 141 142 #endif /* BSD_KERNEL_PRIVATE */ 143 144 #endif /* DLIL_SYSCTL_H */ 145