xref: /xnu-10063.141.1/tools/lldbmacros/apic.py (revision d8b80295118ef25ac3a784134bcf95cd8e88109f)
1*d8b80295SApple OSS Distributionsfrom xnu import *
2*d8b80295SApple OSS Distributionsfrom misc import DoReadMsr64, DoWriteMsr64
3*d8b80295SApple OSS Distributions
4*d8b80295SApple OSS Distributions######################################
5*d8b80295SApple OSS Distributions# Globals
6*d8b80295SApple OSS Distributions######################################
7*d8b80295SApple OSS Distributionslapic_base_addr = 0xfee00000
8*d8b80295SApple OSS Distributionsioapic_base_addr = 0xfec00000
9*d8b80295SApple OSS Distributionsioapic_index_off = 0x0
10*d8b80295SApple OSS Distributionsioapic_data_off = 0x10
11*d8b80295SApple OSS Distributions
12*d8b80295SApple OSS Distributions
13*d8b80295SApple OSS Distributions######################################
14*d8b80295SApple OSS Distributions# LAPIC Helper functions
15*d8b80295SApple OSS Distributions######################################
16*d8b80295SApple OSS Distributionsdef IsArchX86_64():
17*d8b80295SApple OSS Distributions    """ Determines if target machine is x86_64
18*d8b80295SApple OSS Distributions        Returns:
19*d8b80295SApple OSS Distributions            True if running on x86_64, False otherwise
20*d8b80295SApple OSS Distributions    """
21*d8b80295SApple OSS Distributions    return kern.arch == "x86_64"
22*d8b80295SApple OSS Distributions
23*d8b80295SApple OSS Distributions
24*d8b80295SApple OSS Distributions@static_var('x2apic_enabled', -1)
25*d8b80295SApple OSS Distributionsdef IsX2ApicEnabled():
26*d8b80295SApple OSS Distributions    """ Reads the APIC configuration MSR to determine if APIC is operating
27*d8b80295SApple OSS Distributions        in x2APIC mode. The MSR is read the first time this function is
28*d8b80295SApple OSS Distributions        called, and the answer is remembered for all subsequent calls.
29*d8b80295SApple OSS Distributions        Returns:
30*d8b80295SApple OSS Distributions            True if APIC is x2APIC mode
31*d8b80295SApple OSS Distributions            False if not
32*d8b80295SApple OSS Distributions    """
33*d8b80295SApple OSS Distributions    apic_cfg_msr = 0x1b
34*d8b80295SApple OSS Distributions    apic_cfg_msr_x2en_mask = 0xc00
35*d8b80295SApple OSS Distributions    if IsX2ApicEnabled.x2apic_enabled < 0:
36*d8b80295SApple OSS Distributions        if (int(DoReadMsr64(apic_cfg_msr, xnudefines.lcpu_self)) & apic_cfg_msr_x2en_mask ==
37*d8b80295SApple OSS Distributions            apic_cfg_msr_x2en_mask):
38*d8b80295SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 1
39*d8b80295SApple OSS Distributions        else:
40*d8b80295SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 0
41*d8b80295SApple OSS Distributions    return IsX2ApicEnabled.x2apic_enabled == 1
42*d8b80295SApple OSS Distributions
43*d8b80295SApple OSS Distributionsdef DoLapicRead32(offset, cpu):
44*d8b80295SApple OSS Distributions    """ Read the specified 32-bit LAPIC register
45*d8b80295SApple OSS Distributions        Params:
46*d8b80295SApple OSS Distributions            offset: int - index of LAPIC register to read
47*d8b80295SApple OSS Distributions            cpu: int - cpu ID
48*d8b80295SApple OSS Distributions        Returns:
49*d8b80295SApple OSS Distributions            The 32-bit LAPIC register value
50*d8b80295SApple OSS Distributions    """
51*d8b80295SApple OSS Distributions    if IsX2ApicEnabled():
52*d8b80295SApple OSS Distributions        return DoReadMsr64(offset >> 4, cpu)
53*d8b80295SApple OSS Distributions    else:
54*d8b80295SApple OSS Distributions        return ReadPhysInt(lapic_base_addr + offset, 32, cpu)
55*d8b80295SApple OSS Distributions
56*d8b80295SApple OSS Distributionsdef DoLapicWrite32(offset, val, cpu):
57*d8b80295SApple OSS Distributions    """ Write the specified 32-bit LAPIC register
58*d8b80295SApple OSS Distributions        Params:
59*d8b80295SApple OSS Distributions            offset: int - index of LAPIC register to write
60*d8b80295SApple OSS Distributions            val: int - write value
61*d8b80295SApple OSS Distributions            cpu: int - cpu ID
62*d8b80295SApple OSS Distributions        Returns:
63*d8b80295SApple OSS Distributions            True if success, False if error
64*d8b80295SApple OSS Distributions    """
65*d8b80295SApple OSS Distributions    if IsX2ApicEnabled():
66*d8b80295SApple OSS Distributions        return DoWriteMsr64(offset >> 4, cpu, val)
67*d8b80295SApple OSS Distributions    else:
68*d8b80295SApple OSS Distributions        return WritePhysInt(lapic_base_addr + offset, val, 32)
69*d8b80295SApple OSS Distributions
70*d8b80295SApple OSS Distributions######################################
71*d8b80295SApple OSS Distributions# LAPIC Register Print functions
72*d8b80295SApple OSS Distributions######################################
73*d8b80295SApple OSS Distributionsdef GetLapicVersionFields(reg_val):
74*d8b80295SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
75*d8b80295SApple OSS Distributions        version register.
76*d8b80295SApple OSS Distributions        Params:
77*d8b80295SApple OSS Distributions            reg_val: int - the value of the version register to print
78*d8b80295SApple OSS Distributions        Returns:
79*d8b80295SApple OSS Distributions            string showing the fields
80*d8b80295SApple OSS Distributions    """
81*d8b80295SApple OSS Distributions    lvt_num = (reg_val >> 16) + 1
82*d8b80295SApple OSS Distributions    version = reg_val & 0xff
83*d8b80295SApple OSS Distributions    return "[VERSION={:d} MaxLVT={:d}]".format(lvt_num, version)
84*d8b80295SApple OSS Distributions
85*d8b80295SApple OSS Distributionsdef GetLapicSpuriousVectorFields(reg_val):
86*d8b80295SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
87*d8b80295SApple OSS Distributions        spurious vector register.
88*d8b80295SApple OSS Distributions        Params:
89*d8b80295SApple OSS Distributions            reg_val: int - the value of the spurious vector registre to print
90*d8b80295SApple OSS Distributions        Returns:
91*d8b80295SApple OSS Distributions            string showing the fields
92*d8b80295SApple OSS Distributions    """
93*d8b80295SApple OSS Distributions    vector = reg_val & 0xff
94*d8b80295SApple OSS Distributions    enabled = (reg_val & 0x100) >> 8
95*d8b80295SApple OSS Distributions    return "[VEC={:3d} ENABLED={:d}]".format(vector, enabled)
96*d8b80295SApple OSS Distributions
97*d8b80295SApple OSS Distributionsdef GetLapicIcrHiFields(reg_val):
98*d8b80295SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
99*d8b80295SApple OSS Distributions        upper 32-bits of the Interrupt Control Register (ICR).
100*d8b80295SApple OSS Distributions        Params:
101*d8b80295SApple OSS Distributions            reg_val: int - the value of the ICR to show
102*d8b80295SApple OSS Distributions        Returns:
103*d8b80295SApple OSS Distributions            string showing the fields
104*d8b80295SApple OSS Distributions    """
105*d8b80295SApple OSS Distributions    dest = reg_val >> 24
106*d8b80295SApple OSS Distributions    return "[DEST={:d}]".format(dest)
107*d8b80295SApple OSS Distributions
108*d8b80295SApple OSS Distributionsdef GetLapicTimerDivideFields(reg_val):
109*d8b80295SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
110*d8b80295SApple OSS Distributions        timer divide register.
111*d8b80295SApple OSS Distributions        Params:
112*d8b80295SApple OSS Distributions            reg_val: int - the value of the timer divide register
113*d8b80295SApple OSS Distributions        Returns:
114*d8b80295SApple OSS Distributions            string showing the fields
115*d8b80295SApple OSS Distributions    """
116*d8b80295SApple OSS Distributions    divide_val = ((reg_val & 0x8) >> 1) | (reg_val & 0x3)
117*d8b80295SApple OSS Distributions    if divide_val == 0x7:
118*d8b80295SApple OSS Distributions        divide_by = 1
119*d8b80295SApple OSS Distributions    else:
120*d8b80295SApple OSS Distributions        divide_by = 2 << divide_val
121*d8b80295SApple OSS Distributions    return "[Divide by {:d}]".format(divide_by)
122*d8b80295SApple OSS Distributions
123*d8b80295SApple OSS Distributionsdef GetApicFields(reg_val):
124*d8b80295SApple OSS Distributions    """ Helper function for DoLapicDump and DoIoapicDump that prints the
125*d8b80295SApple OSS Distributions        fields of the APIC register.
126*d8b80295SApple OSS Distributions        Params:
127*d8b80295SApple OSS Distributions            reg_val: int - the value of the APIC register to print
128*d8b80295SApple OSS Distributions        Returns:
129*d8b80295SApple OSS Distributions            string showing the fields
130*d8b80295SApple OSS Distributions    """
131*d8b80295SApple OSS Distributions    vector = reg_val & 0xff
132*d8b80295SApple OSS Distributions    tsc_deadline = reg_val & 0x40000
133*d8b80295SApple OSS Distributions    periodic = reg_val & 0x20000
134*d8b80295SApple OSS Distributions    masked = reg_val & 0x10000
135*d8b80295SApple OSS Distributions    trigger = reg_val & 0x8000
136*d8b80295SApple OSS Distributions    polarity = reg_val & 0x2000
137*d8b80295SApple OSS Distributions    pending = reg_val & 0x1000
138*d8b80295SApple OSS Distributions
139*d8b80295SApple OSS Distributions    ret_str = "[VEC={:3d} MASK={:3s} TRIG={:5s} POL={:4s} PEND={:3s}".format(
140*d8b80295SApple OSS Distributions        vector,
141*d8b80295SApple OSS Distributions        "no" if masked == 0 else "yes",
142*d8b80295SApple OSS Distributions        "edge" if trigger == 0 else "level",
143*d8b80295SApple OSS Distributions        "low" if polarity == 0 else "high",
144*d8b80295SApple OSS Distributions        "no" if pending == 0 else "yes")
145*d8b80295SApple OSS Distributions    if not periodic == 0:
146*d8b80295SApple OSS Distributions        ret_str += " PERIODIC"
147*d8b80295SApple OSS Distributions    if not tsc_deadline == 0:
148*d8b80295SApple OSS Distributions        ret_str += " TSC_DEADLINE"
149*d8b80295SApple OSS Distributions    ret_str += "]"
150*d8b80295SApple OSS Distributions    return ret_str
151*d8b80295SApple OSS Distributions
152*d8b80295SApple OSS Distributionsdef DoLapicDump():
153*d8b80295SApple OSS Distributions    """ Prints all LAPIC registers
154*d8b80295SApple OSS Distributions    """
155*d8b80295SApple OSS Distributions    print("LAPIC operating mode: {:s}".format(
156*d8b80295SApple OSS Distributions        "x2APIC" if IsX2ApicEnabled() else "xAPIC"))
157*d8b80295SApple OSS Distributions    # LAPIC register offset, register name, field formatting function
158*d8b80295SApple OSS Distributions    lapic_dump_table = [
159*d8b80295SApple OSS Distributions        (0x020, "ID", None),
160*d8b80295SApple OSS Distributions        (0x030, "VERSION", GetLapicVersionFields),
161*d8b80295SApple OSS Distributions        (0x080, "TASK PRIORITY", None),
162*d8b80295SApple OSS Distributions        (0x0A0, "PROCESSOR PRIORITY", None),
163*d8b80295SApple OSS Distributions        (0x0D0, "LOGICAL DEST", None),
164*d8b80295SApple OSS Distributions        (0x0E0, "DEST FORMAT", None),
165*d8b80295SApple OSS Distributions        (0x0F0, "SPURIOUS VECTOR", GetLapicSpuriousVectorFields),
166*d8b80295SApple OSS Distributions        (0x100, "ISR[031:000]", None),
167*d8b80295SApple OSS Distributions        (0x110, "ISR[063:032]", None),
168*d8b80295SApple OSS Distributions        (0x120, "ISR[095:064]", None),
169*d8b80295SApple OSS Distributions        (0x130, "ISR[127:096]", None),
170*d8b80295SApple OSS Distributions        (0x140, "ISR[159:128]", None),
171*d8b80295SApple OSS Distributions        (0x150, "ISR[191:160]", None),
172*d8b80295SApple OSS Distributions        (0x160, "ISR[223:192]", None),
173*d8b80295SApple OSS Distributions        (0x170, "ISR[225:224]", None),
174*d8b80295SApple OSS Distributions        (0x180, "TMR[031:000]", None),
175*d8b80295SApple OSS Distributions        (0x190, "TMR[063:032]", None),
176*d8b80295SApple OSS Distributions        (0x1A0, "TMR[095:064]", None),
177*d8b80295SApple OSS Distributions        (0x1B0, "TMR[127:096]", None),
178*d8b80295SApple OSS Distributions        (0x1C0, "TMR[159:128]", None),
179*d8b80295SApple OSS Distributions        (0x1D0, "TMR[191:160]", None),
180*d8b80295SApple OSS Distributions        (0x1E0, "TMR[223:192]", None),
181*d8b80295SApple OSS Distributions        (0x1F0, "TMR[225:224]", None),
182*d8b80295SApple OSS Distributions        (0x200, "IRR[031:000]", None),
183*d8b80295SApple OSS Distributions        (0x210, "IRR[063:032]", None),
184*d8b80295SApple OSS Distributions        (0x220, "IRR[095:064]", None),
185*d8b80295SApple OSS Distributions        (0x230, "IRR[127:096]", None),
186*d8b80295SApple OSS Distributions        (0x240, "IRR[159:128]", None),
187*d8b80295SApple OSS Distributions        (0x250, "IRR[191:160]", None),
188*d8b80295SApple OSS Distributions        (0x260, "IRR[223:192]", None),
189*d8b80295SApple OSS Distributions        (0x270, "IRR[225:224]", None),
190*d8b80295SApple OSS Distributions        (0x280, "ERROR STATUS", None),
191*d8b80295SApple OSS Distributions        (0x300, "Interrupt Command LO", GetApicFields),
192*d8b80295SApple OSS Distributions        (0x310, "Interrupt Command HI", GetLapicIcrHiFields),
193*d8b80295SApple OSS Distributions        (0x320, "LVT Timer", GetApicFields),
194*d8b80295SApple OSS Distributions        (0x350, "LVT LINT0", GetApicFields),
195*d8b80295SApple OSS Distributions        (0x360, "LVT LINT1", GetApicFields),
196*d8b80295SApple OSS Distributions        (0x370, "LVT Error", GetApicFields),
197*d8b80295SApple OSS Distributions        (0x340, "LVT PerfMon", GetApicFields),
198*d8b80295SApple OSS Distributions        (0x330, "LVT Thermal", GetApicFields),
199*d8b80295SApple OSS Distributions        (0x3e0, "Timer Divide", GetLapicTimerDivideFields),
200*d8b80295SApple OSS Distributions        (0x380, "Timer Init Count", None),
201*d8b80295SApple OSS Distributions        (0x390, "Timer Cur Count", None)]
202*d8b80295SApple OSS Distributions    for reg in lapic_dump_table:
203*d8b80295SApple OSS Distributions        reg_val = DoLapicRead32(reg[0], xnudefines.lcpu_self)
204*d8b80295SApple OSS Distributions        if reg[2] == None:
205*d8b80295SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x}".format(reg[0], reg[1], reg_val))
206*d8b80295SApple OSS Distributions        else:
207*d8b80295SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x} {:s}".format(reg[0], reg[1],
208*d8b80295SApple OSS Distributions                reg_val, reg[2](reg_val)))
209*d8b80295SApple OSS Distributions
210*d8b80295SApple OSS Distributions######################################
211*d8b80295SApple OSS Distributions# IOAPIC Helper functions
212*d8b80295SApple OSS Distributions######################################
213*d8b80295SApple OSS Distributionsdef DoIoApicRead(offset):
214*d8b80295SApple OSS Distributions    """ Read the specified IOAPIC register
215*d8b80295SApple OSS Distributions        Params:
216*d8b80295SApple OSS Distributions            offset: int - index of IOAPIC register to read
217*d8b80295SApple OSS Distributions        Returns:
218*d8b80295SApple OSS Distributions            int 32-bit read value
219*d8b80295SApple OSS Distributions    """
220*d8b80295SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
221*d8b80295SApple OSS Distributions    return ReadPhysInt(ioapic_base_addr + ioapic_data_off, 32)
222*d8b80295SApple OSS Distributions
223*d8b80295SApple OSS Distributionsdef DoIoApicWrite(offset, val):
224*d8b80295SApple OSS Distributions    """ Write the specified IOAPIC register
225*d8b80295SApple OSS Distributions        Params:
226*d8b80295SApple OSS Distributions            offset: int - index of IOAPIC register to write
227*d8b80295SApple OSS Distributions        Returns:
228*d8b80295SApple OSS Distributions            True if success, False if error
229*d8b80295SApple OSS Distributions    """
230*d8b80295SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
231*d8b80295SApple OSS Distributions    return WritePhysInt(ioapic_base_addr + ioapic_data_off, val, 32)
232*d8b80295SApple OSS Distributions
233*d8b80295SApple OSS Distributionsdef DoIoApicDump():
234*d8b80295SApple OSS Distributions    """ Prints all IOAPIC registers
235*d8b80295SApple OSS Distributions    """
236*d8b80295SApple OSS Distributions    # Show IOAPIC ID register
237*d8b80295SApple OSS Distributions    ioapic_id = DoIoApicRead(0)
238*d8b80295SApple OSS Distributions    print("IOAPIC[0x00] {:9s}: {:#010x}".format("ID", ioapic_id))
239*d8b80295SApple OSS Distributions    # Show IOAPIC Version register
240*d8b80295SApple OSS Distributions    ioapic_ver = DoIoApicRead(1)
241*d8b80295SApple OSS Distributions    maxredir = ((ioapic_ver >> 16) & 0xff) + 1
242*d8b80295SApple OSS Distributions    print("IOAPIC[0x01] {:9s}: {:#010x}".format("VERSION", ioapic_ver) +\
243*d8b80295SApple OSS Distributions        "       [MAXREDIR={:02d} PRQ={:d} VERSION={:#04x}]".format(
244*d8b80295SApple OSS Distributions            maxredir,
245*d8b80295SApple OSS Distributions            ioapic_ver >> 15 & 0x1,
246*d8b80295SApple OSS Distributions            ioapic_ver & 0xff))
247*d8b80295SApple OSS Distributions    # Show IOAPIC redirect regsiters
248*d8b80295SApple OSS Distributions    for redir in range(maxredir):
249*d8b80295SApple OSS Distributions        redir_val_lo = DoIoApicRead(0x10 + redir * 2)
250*d8b80295SApple OSS Distributions        redir_val_hi = DoIoApicRead(0x10 + (redir * 2) + 1)
251*d8b80295SApple OSS Distributions        print("IOAPIC[{:#04x}] IOREDIR{:02d}: {:#08x}{:08x} {:s}".format(
252*d8b80295SApple OSS Distributions            0x10 + (redir * 2),
253*d8b80295SApple OSS Distributions            redir,
254*d8b80295SApple OSS Distributions            redir_val_hi,
255*d8b80295SApple OSS Distributions            redir_val_lo,
256*d8b80295SApple OSS Distributions            GetApicFields(redir_val_lo)))
257*d8b80295SApple OSS Distributions
258*d8b80295SApple OSS Distributions######################################
259*d8b80295SApple OSS Distributions# LLDB commands
260*d8b80295SApple OSS Distributions######################################
261*d8b80295SApple OSS Distributions@lldb_command('lapic_read32')
262*d8b80295SApple OSS Distributionsdef LapicRead32(cmd_args=None):
263*d8b80295SApple OSS Distributions    """ Read the LAPIC register at the specified offset. The CPU can
264*d8b80295SApple OSS Distributions        be optionally specified
265*d8b80295SApple OSS Distributions        Syntax: lapic_read32 <offset> [lcpu]
266*d8b80295SApple OSS Distributions    """
267*d8b80295SApple OSS Distributions    if cmd_args is None or len(cmd_args) < 1:
268*d8b80295SApple OSS Distributions        print(LapicRead32.__doc__)
269*d8b80295SApple OSS Distributions        return
270*d8b80295SApple OSS Distributions    if not IsArchX86_64():
271*d8b80295SApple OSS Distributions        print("lapic_read32 not supported on this architecture.")
272*d8b80295SApple OSS Distributions        return
273*d8b80295SApple OSS Distributions
274*d8b80295SApple OSS Distributions    lcpu = xnudefines.lcpu_self
275*d8b80295SApple OSS Distributions    if len(cmd_args) > 1:
276*d8b80295SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[1])
277*d8b80295SApple OSS Distributions
278*d8b80295SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
279*d8b80295SApple OSS Distributions    read_val = DoLapicRead32(offset, lcpu)
280*d8b80295SApple OSS Distributions    print("LAPIC[{:#05x}]: {:#010x}".format(offset, read_val))
281*d8b80295SApple OSS Distributions
282*d8b80295SApple OSS Distributions@lldb_command('lapic_write32')
283*d8b80295SApple OSS Distributionsdef LapicWrite32(cmd_args=None):
284*d8b80295SApple OSS Distributions    """ Write the LAPIC register at the specified offset. The CPU can
285*d8b80295SApple OSS Distributions        be optionally specified. Prints an error message if there was a
286*d8b80295SApple OSS Distributions        failure. Prints nothing upon success.
287*d8b80295SApple OSS Distributions        Syntax: lapic_write32 <offset> <val> [lcpu]
288*d8b80295SApple OSS Distributions    """
289*d8b80295SApple OSS Distributions    if cmd_args is None or len(cmd_args) < 2:
290*d8b80295SApple OSS Distributions        print(LapicWrite32.__doc__)
291*d8b80295SApple OSS Distributions        return
292*d8b80295SApple OSS Distributions    if not IsArchX86_64():
293*d8b80295SApple OSS Distributions        print("lapic_write32 not supported on this architecture.")
294*d8b80295SApple OSS Distributions        return
295*d8b80295SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
296*d8b80295SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
297*d8b80295SApple OSS Distributions    lcpu = xnudefines.lcpu_self
298*d8b80295SApple OSS Distributions    if len(cmd_args) > 2:
299*d8b80295SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[2])
300*d8b80295SApple OSS Distributions    if not DoLapicWrite32(offset, write_val, lcpu):
301*d8b80295SApple OSS Distributions        print("lapic_write32 FAILED")
302*d8b80295SApple OSS Distributions
303*d8b80295SApple OSS Distributions@lldb_command('lapic_dump')
304*d8b80295SApple OSS Distributionsdef LapicDump(cmd_args=None):
305*d8b80295SApple OSS Distributions    """ Prints all LAPIC entries
306*d8b80295SApple OSS Distributions    """
307*d8b80295SApple OSS Distributions    if not IsArchX86_64():
308*d8b80295SApple OSS Distributions        print("lapic_dump not supported on this architecture.")
309*d8b80295SApple OSS Distributions        return
310*d8b80295SApple OSS Distributions    DoLapicDump()
311*d8b80295SApple OSS Distributions
312*d8b80295SApple OSS Distributions@lldb_command('ioapic_read32')
313*d8b80295SApple OSS Distributionsdef IoApicRead32(cmd_args=None):
314*d8b80295SApple OSS Distributions    """ Read the IOAPIC register at the specified offset.
315*d8b80295SApple OSS Distributions        Syntax: ioapic_read32 <offset>
316*d8b80295SApple OSS Distributions    """
317*d8b80295SApple OSS Distributions    if cmd_args is None or len(cmd_args) < 1:
318*d8b80295SApple OSS Distributions        print(IoApicRead32.__doc__)
319*d8b80295SApple OSS Distributions        return
320*d8b80295SApple OSS Distributions    if not IsArchX86_64():
321*d8b80295SApple OSS Distributions        print("ioapic_read32 not supported on this architecture.")
322*d8b80295SApple OSS Distributions        return
323*d8b80295SApple OSS Distributions
324*d8b80295SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
325*d8b80295SApple OSS Distributions    read_val = DoIoApicRead(offset)
326*d8b80295SApple OSS Distributions    print("IOAPIC[{:#04x}]: {:#010x}".format(offset, read_val))
327*d8b80295SApple OSS Distributions
328*d8b80295SApple OSS Distributions@lldb_command('ioapic_write32')
329*d8b80295SApple OSS Distributionsdef IoApicWrite32(cmd_args=None):
330*d8b80295SApple OSS Distributions    """ Write the IOAPIC register at the specified offset.
331*d8b80295SApple OSS Distributions        Syntax: ioapic_write32 <offset> <val>
332*d8b80295SApple OSS Distributions    """
333*d8b80295SApple OSS Distributions    if cmd_args is None or len(cmd_args) < 2:
334*d8b80295SApple OSS Distributions        print(IoApicWrite32.__doc__)
335*d8b80295SApple OSS Distributions        return
336*d8b80295SApple OSS Distributions    if not IsArchX86_64():
337*d8b80295SApple OSS Distributions        print("ioapic_write32 not supported on this architecture.")
338*d8b80295SApple OSS Distributions        return
339*d8b80295SApple OSS Distributions
340*d8b80295SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
341*d8b80295SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
342*d8b80295SApple OSS Distributions    if not DoIoApicWrite(offset, write_val):
343*d8b80295SApple OSS Distributions        print("ioapic_write32 FAILED")
344*d8b80295SApple OSS Distributions    return
345*d8b80295SApple OSS Distributions
346*d8b80295SApple OSS Distributions@lldb_command('ioapic_dump')
347*d8b80295SApple OSS Distributionsdef IoApicDump(cmd_args=None):
348*d8b80295SApple OSS Distributions    """ Prints all IOAPIC entries
349*d8b80295SApple OSS Distributions    """
350*d8b80295SApple OSS Distributions    if not IsArchX86_64():
351*d8b80295SApple OSS Distributions        print("ioapic_dump not supported on this architecture.")
352*d8b80295SApple OSS Distributions        return
353*d8b80295SApple OSS Distributions    DoIoApicDump()
354*d8b80295SApple OSS Distributions
355