1*2c2f96dcSApple OSS Distributions /*
2*2c2f96dcSApple OSS Distributions * Copyright (c) 2008 Apple Computer, Inc. All rights reserved.
3*2c2f96dcSApple OSS Distributions *
4*2c2f96dcSApple OSS Distributions * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5*2c2f96dcSApple OSS Distributions *
6*2c2f96dcSApple OSS Distributions * This file contains Original Code and/or Modifications of Original Code
7*2c2f96dcSApple OSS Distributions * as defined in and that are subject to the Apple Public Source License
8*2c2f96dcSApple OSS Distributions * Version 2.0 (the 'License'). You may not use this file except in
9*2c2f96dcSApple OSS Distributions * compliance with the License. The rights granted to you under the License
10*2c2f96dcSApple OSS Distributions * may not be used to create, or enable the creation or redistribution of,
11*2c2f96dcSApple OSS Distributions * unlawful or unlicensed copies of an Apple operating system, or to
12*2c2f96dcSApple OSS Distributions * circumvent, violate, or enable the circumvention or violation of, any
13*2c2f96dcSApple OSS Distributions * terms of an Apple operating system software license agreement.
14*2c2f96dcSApple OSS Distributions *
15*2c2f96dcSApple OSS Distributions * Please obtain a copy of the License at
16*2c2f96dcSApple OSS Distributions * http://www.opensource.apple.com/apsl/ and read it before using this file.
17*2c2f96dcSApple OSS Distributions *
18*2c2f96dcSApple OSS Distributions * The Original Code and all software distributed under the License are
19*2c2f96dcSApple OSS Distributions * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20*2c2f96dcSApple OSS Distributions * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21*2c2f96dcSApple OSS Distributions * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22*2c2f96dcSApple OSS Distributions * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23*2c2f96dcSApple OSS Distributions * Please see the License for the specific language governing rights and
24*2c2f96dcSApple OSS Distributions * limitations under the License.
25*2c2f96dcSApple OSS Distributions *
26*2c2f96dcSApple OSS Distributions * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27*2c2f96dcSApple OSS Distributions */
28*2c2f96dcSApple OSS Distributions
29*2c2f96dcSApple OSS Distributions #ifndef _I386_POSTCODE_H_
30*2c2f96dcSApple OSS Distributions #define _I386_POSTCODE_H_
31*2c2f96dcSApple OSS Distributions
32*2c2f96dcSApple OSS Distributions /*
33*2c2f96dcSApple OSS Distributions * Postcodes are no longer enabled by default in the DEBUG kernel
34*2c2f96dcSApple OSS Distributions * because platforms may not have builtin port 0x80 support.
35*2c2f96dcSApple OSS Distributions * To re-enable postcode outpout, uncomment the following define:
36*2c2f96dcSApple OSS Distributions */
37*2c2f96dcSApple OSS Distributions //#define DEBUG_POSTCODE 1
38*2c2f96dcSApple OSS Distributions
39*2c2f96dcSApple OSS Distributions /* Define this to delay about 1 sec after posting each code */
40*2c2f96dcSApple OSS Distributions //#define POSTCODE_DELAY 1
41*2c2f96dcSApple OSS Distributions
42*2c2f96dcSApple OSS Distributions /* The POSTCODE is port 0x80 */
43*2c2f96dcSApple OSS Distributions #define POSTPORT 0x80
44*2c2f96dcSApple OSS Distributions
45*2c2f96dcSApple OSS Distributions #define SPINCOUNT 300000000
46*2c2f96dcSApple OSS Distributions #define CPU_PAUSE() rep; nop
47*2c2f96dcSApple OSS Distributions
48*2c2f96dcSApple OSS Distributions #if DEBUG_POSTCODE
49*2c2f96dcSApple OSS Distributions /*
50*2c2f96dcSApple OSS Distributions * Macro to output byte value to postcode, destoying register al.
51*2c2f96dcSApple OSS Distributions * Additionally, if POSTCODE_DELAY, spin for about a second.
52*2c2f96dcSApple OSS Distributions */
53*2c2f96dcSApple OSS Distributions #if POSTCODE_DELAY
54*2c2f96dcSApple OSS Distributions #define POSTCODE_AL \
55*2c2f96dcSApple OSS Distributions outb %al,$(POSTPORT); \
56*2c2f96dcSApple OSS Distributions movl $(SPINCOUNT), %eax; \
57*2c2f96dcSApple OSS Distributions 1: \
58*2c2f96dcSApple OSS Distributions CPU_PAUSE(); \
59*2c2f96dcSApple OSS Distributions decl %eax; \
60*2c2f96dcSApple OSS Distributions jne 1b
61*2c2f96dcSApple OSS Distributions #define POSTCODE_AX \
62*2c2f96dcSApple OSS Distributions outw %ax,$(POSTPORT); \
63*2c2f96dcSApple OSS Distributions movl $(SPINCOUNT), %eax; \
64*2c2f96dcSApple OSS Distributions 1: \
65*2c2f96dcSApple OSS Distributions CPU_PAUSE(); \
66*2c2f96dcSApple OSS Distributions decl %eax; \
67*2c2f96dcSApple OSS Distributions jne 1b
68*2c2f96dcSApple OSS Distributions #else
69*2c2f96dcSApple OSS Distributions #define POSTCODE_AL \
70*2c2f96dcSApple OSS Distributions outb %al,$(POSTPORT)
71*2c2f96dcSApple OSS Distributions #define POSTCODE_AX \
72*2c2f96dcSApple OSS Distributions outw %ax,$(POSTPORT)
73*2c2f96dcSApple OSS Distributions #endif /* POSTCODE_DELAY */
74*2c2f96dcSApple OSS Distributions
75*2c2f96dcSApple OSS Distributions #define POSTCODE(XX) \
76*2c2f96dcSApple OSS Distributions mov $(XX), %al; \
77*2c2f96dcSApple OSS Distributions POSTCODE_AL
78*2c2f96dcSApple OSS Distributions
79*2c2f96dcSApple OSS Distributions #define POSTCODE2(XXXX) \
80*2c2f96dcSApple OSS Distributions mov $(XXXX), %ax; \
81*2c2f96dcSApple OSS Distributions POSTCODE_AX
82*2c2f96dcSApple OSS Distributions
83*2c2f96dcSApple OSS Distributions /* Output byte value to postcode, without destoying register eax */
84*2c2f96dcSApple OSS Distributions #define POSTCODE_SAVE_EAX(XX) \
85*2c2f96dcSApple OSS Distributions push %eax; \
86*2c2f96dcSApple OSS Distributions POSTCODE(XX); \
87*2c2f96dcSApple OSS Distributions pop %eax
88*2c2f96dcSApple OSS Distributions
89*2c2f96dcSApple OSS Distributions /*
90*2c2f96dcSApple OSS Distributions * Display a 32-bit value to the post card - low byte to high byte
91*2c2f96dcSApple OSS Distributions * Entry: value in %ebx
92*2c2f96dcSApple OSS Distributions * Exit: %ebx preserved; %eax destroyed
93*2c2f96dcSApple OSS Distributions */
94*2c2f96dcSApple OSS Distributions #define POSTCODE32_EBX \
95*2c2f96dcSApple OSS Distributions roll $8, %ebx; \
96*2c2f96dcSApple OSS Distributions movl %ebx, %eax; \
97*2c2f96dcSApple OSS Distributions POSTCODE_AL; \
98*2c2f96dcSApple OSS Distributions \
99*2c2f96dcSApple OSS Distributions roll $8, %ebx; \
100*2c2f96dcSApple OSS Distributions movl %ebx, %eax; \
101*2c2f96dcSApple OSS Distributions POSTCODE_AL; \
102*2c2f96dcSApple OSS Distributions \
103*2c2f96dcSApple OSS Distributions roll $8, %ebx; \
104*2c2f96dcSApple OSS Distributions movl %ebx, %eax; \
105*2c2f96dcSApple OSS Distributions POSTCODE_AL; \
106*2c2f96dcSApple OSS Distributions \
107*2c2f96dcSApple OSS Distributions roll $8, %ebx; \
108*2c2f96dcSApple OSS Distributions movl %ebx, %eax; \
109*2c2f96dcSApple OSS Distributions POSTCODE_AL
110*2c2f96dcSApple OSS Distributions
111*2c2f96dcSApple OSS Distributions #else /* DEBUG_POSTCODE */
112*2c2f96dcSApple OSS Distributions #define POSTCODE_AL
113*2c2f96dcSApple OSS Distributions #define POSTCODE_AX
114*2c2f96dcSApple OSS Distributions #define POSTCODE(X)
115*2c2f96dcSApple OSS Distributions #define POSTCODE2(X)
116*2c2f96dcSApple OSS Distributions #define POSTCODE_SAVE_EAX(X)
117*2c2f96dcSApple OSS Distributions #define POSTCODE32_EBX
118*2c2f96dcSApple OSS Distributions #endif /* DEBUG_POSTCODE */
119*2c2f96dcSApple OSS Distributions
120*2c2f96dcSApple OSS Distributions /*
121*2c2f96dcSApple OSS Distributions * The following postcodes are defined for stages of early startup:
122*2c2f96dcSApple OSS Distributions */
123*2c2f96dcSApple OSS Distributions
124*2c2f96dcSApple OSS Distributions #define PSTART_ENTRY 0xFF
125*2c2f96dcSApple OSS Distributions #define PSTART_REBASE 0xFE
126*2c2f96dcSApple OSS Distributions #define PSTART_BEFORE_PAGING 0xFE
127*2c2f96dcSApple OSS Distributions #define PSTART_VSTART 0xFD
128*2c2f96dcSApple OSS Distributions #define VSTART_ENTRY 0xFC
129*2c2f96dcSApple OSS Distributions #define VSTART_IDT_INIT 0xFB
130*2c2f96dcSApple OSS Distributions #define VSTART_IDLE_PTS_INIT 0xFA
131*2c2f96dcSApple OSS Distributions #define VSTART_PHYSMAP_INIT 0xF9
132*2c2f96dcSApple OSS Distributions #define VSTART_DESC_ALIAS_INIT 0xF8
133*2c2f96dcSApple OSS Distributions #define VSTART_SET_CR3 0xF7
134*2c2f96dcSApple OSS Distributions #define VSTART_CPU_DESC_INIT 0xF6
135*2c2f96dcSApple OSS Distributions #define VSTART_CPU_MODE_INIT 0xF5
136*2c2f96dcSApple OSS Distributions #define VSTART_EXIT 0xF4
137*2c2f96dcSApple OSS Distributions #define I386_INIT_ENTRY 0xF3
138*2c2f96dcSApple OSS Distributions #define CPU_INIT_D 0xF2
139*2c2f96dcSApple OSS Distributions #define PE_INIT_PLATFORM_D 0xF1
140*2c2f96dcSApple OSS Distributions
141*2c2f96dcSApple OSS Distributions #define SLAVE_STARTPROG_ENTRY 0xEF
142*2c2f96dcSApple OSS Distributions #define SLAVE_PSTART 0xEE
143*2c2f96dcSApple OSS Distributions #define I386_INIT_SLAVE 0xED
144*2c2f96dcSApple OSS Distributions
145*2c2f96dcSApple OSS Distributions #define PANIC_DOUBLE_FAULT 0xDF /* Double Fault exception */
146*2c2f96dcSApple OSS Distributions #define PANIC_MACHINE_CHECK 0xDC /* Machine-Check */
147*2c2f96dcSApple OSS Distributions #define MP_KDP_ENTER 0xDB /* Debugger Begin */
148*2c2f96dcSApple OSS Distributions #define MP_KDP_EXIT 0xDE /* Debugger End */
149*2c2f96dcSApple OSS Distributions #define PANIC_HLT 0xD1 /* Die an early death */
150*2c2f96dcSApple OSS Distributions #define BOOT_TRAP_HLT 0xD0 /* D'oh! even earlier */
151*2c2f96dcSApple OSS Distributions
152*2c2f96dcSApple OSS Distributions #define ACPI_WAKE_START_ENTRY 0xCF
153*2c2f96dcSApple OSS Distributions #define ACPI_WAKE_PROT_ENTRY 0xCE
154*2c2f96dcSApple OSS Distributions #define ACPI_WAKE_PAGED_ENTRY 0xCD
155*2c2f96dcSApple OSS Distributions
156*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_ENTRY 0xBF
157*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_GS_BASE 0xBE
158*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_KERNEL_GS_BASE 0xBD
159*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_GDT 0xBC
160*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_IDT 0xBB
161*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_LDT 0xBA
162*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_TSS 0xB9
163*2c2f96dcSApple OSS Distributions #define CPU_DESC_LOAD_EXIT 0xB7
164*2c2f96dcSApple OSS Distributions
165*2c2f96dcSApple OSS Distributions #ifndef ASSEMBLER
166*2c2f96dcSApple OSS Distributions inline static void
_postcode_delay(uint32_t spincount)167*2c2f96dcSApple OSS Distributions _postcode_delay(uint32_t spincount)
168*2c2f96dcSApple OSS Distributions {
169*2c2f96dcSApple OSS Distributions asm volatile ("1: \n\t"
170*2c2f96dcSApple OSS Distributions " rep; nop; \n\t"
171*2c2f96dcSApple OSS Distributions " decl %%eax; \n\t"
172*2c2f96dcSApple OSS Distributions " jne 1b"
173*2c2f96dcSApple OSS Distributions : : "a" (spincount));
174*2c2f96dcSApple OSS Distributions }
175*2c2f96dcSApple OSS Distributions inline static void
_postcode(uint8_t xx)176*2c2f96dcSApple OSS Distributions _postcode(uint8_t xx)
177*2c2f96dcSApple OSS Distributions {
178*2c2f96dcSApple OSS Distributions asm volatile ("outb %0, %1" : : "a" (xx), "N" (POSTPORT));
179*2c2f96dcSApple OSS Distributions }
180*2c2f96dcSApple OSS Distributions inline static void
_postcode2(uint16_t xxxx)181*2c2f96dcSApple OSS Distributions _postcode2(uint16_t xxxx)
182*2c2f96dcSApple OSS Distributions {
183*2c2f96dcSApple OSS Distributions asm volatile ("outw %0, %1" : : "a" (xxxx), "N" (POSTPORT));
184*2c2f96dcSApple OSS Distributions }
185*2c2f96dcSApple OSS Distributions #if DEBUG_POSTCODE
186*2c2f96dcSApple OSS Distributions inline static void
postcode(uint8_t xx)187*2c2f96dcSApple OSS Distributions postcode(uint8_t xx)
188*2c2f96dcSApple OSS Distributions {
189*2c2f96dcSApple OSS Distributions _postcode(xx);
190*2c2f96dcSApple OSS Distributions #if POSTCODE_DELAY
191*2c2f96dcSApple OSS Distributions _postcode_delay(SPINCOUNT);
192*2c2f96dcSApple OSS Distributions #endif
193*2c2f96dcSApple OSS Distributions }
194*2c2f96dcSApple OSS Distributions inline static void
postcode2(uint8_t xxxx)195*2c2f96dcSApple OSS Distributions postcode2(uint8_t xxxx)
196*2c2f96dcSApple OSS Distributions {
197*2c2f96dcSApple OSS Distributions _postcode2(xxxx);
198*2c2f96dcSApple OSS Distributions #if POSTCODE_DELAY
199*2c2f96dcSApple OSS Distributions _postcode_delay(SPINCOUNT);
200*2c2f96dcSApple OSS Distributions #endif
201*2c2f96dcSApple OSS Distributions }
202*2c2f96dcSApple OSS Distributions #else
203*2c2f96dcSApple OSS Distributions #define postcode(xx) do {} while(0)
204*2c2f96dcSApple OSS Distributions #define postcode2(xxxx) do {} while(0)
205*2c2f96dcSApple OSS Distributions #endif
206*2c2f96dcSApple OSS Distributions #endif
207*2c2f96dcSApple OSS Distributions
208*2c2f96dcSApple OSS Distributions #endif /* _I386_POSTCODE_H_ */
209