1 /*
2 * Copyright (c) 2018 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 #include <mach/mach.h>
29 #include <mach/mach_traps.h>
30 #include <mach/mach_port.h>
31 #include <mach/mach_right.h>
32
33
34 #pragma mark Utilities
35 #define _mach_assert(__op, __kr) \
36 do { \
37 if (kr != KERN_SUCCESS) { \
38 __builtin_trap(); \
39 } \
40 } while (0)
41
42 #pragma mark API
43 mach_right_recv_t
mach_right_recv_construct(mach_right_flags_t flags,mach_right_send_t * _Nullable sr,uintptr_t ctx)44 mach_right_recv_construct(mach_right_flags_t flags,
45 mach_right_send_t *_Nullable sr, uintptr_t ctx)
46 {
47 kern_return_t kr = KERN_FAILURE;
48 mach_port_t p = MACH_PORT_NULL;
49 mach_port_options_t opts = {
50 .flags = MPO_CONTEXT_AS_GUARD,
51 .mpl = {
52 .mpl_qlimit = MACH_PORT_QLIMIT_BASIC,
53 },
54 };
55
56 if (flags & MACH_RIGHT_RECV_FLAG_UNGUARDED) {
57 opts.flags &= (~MPO_CONTEXT_AS_GUARD);
58 }
59 if (sr) {
60 opts.flags |= MPO_INSERT_SEND_RIGHT;
61 }
62
63 kr = mach_port_construct(mach_task_self(), &opts, ctx, &p);
64 _mach_assert("construct recv right", kr);
65
66 if (sr) {
67 sr->mrs_name = p;
68 }
69
70 return mach_right_recv(p);
71 }
72
73 void
mach_right_recv_destruct(mach_right_recv_t r,mach_right_send_t * s,uintptr_t ctx)74 mach_right_recv_destruct(mach_right_recv_t r, mach_right_send_t *s,
75 uintptr_t ctx)
76 {
77 kern_return_t kr = KERN_FAILURE;
78 mach_port_delta_t srd = 0;
79
80 if (s) {
81 if (r.mrr_name != s->mrs_name) {
82 __builtin_trap();
83 }
84
85 srd = -1;
86 }
87
88 kr = mach_port_destruct(mach_task_self(), r.mrr_name, srd, ctx);
89 _mach_assert("destruct recv right", kr);
90 }
91
92 mach_right_send_t
mach_right_send_create(mach_right_recv_t r)93 mach_right_send_create(mach_right_recv_t r)
94 {
95 kern_return_t kr = KERN_FAILURE;
96
97 kr = mach_port_insert_right(mach_task_self(), r.mrr_name, r.mrr_name,
98 MACH_MSG_TYPE_MAKE_SEND);
99 _mach_assert("create send right", kr);
100
101 return mach_right_send(r.mrr_name);
102 }
103
104 mach_right_send_t
mach_right_send_retain(mach_right_send_t s)105 mach_right_send_retain(mach_right_send_t s)
106 {
107 kern_return_t kr = KERN_FAILURE;
108 mach_right_send_t rs = MACH_RIGHT_SEND_NULL;
109
110 kr = mach_port_mod_refs(mach_task_self(), s.mrs_name,
111 MACH_PORT_RIGHT_SEND, 1);
112 switch (kr) {
113 case 0:
114 rs = s;
115 break;
116 case KERN_INVALID_RIGHT:
117 rs.mrs_name = MACH_PORT_DEAD;
118 break;
119 case KERN_INVALID_NAME:
120 // mach_port_mod_refs() will return success when given either
121 // MACH_PORT_DEAD or MACH_PORT_NULL with send or send-once right
122 // operations, so this is always fatal.
123 default:
124 _mach_assert("retain send right", kr);
125 }
126
127 return rs;
128 }
129
130 void
mach_right_send_release(mach_right_send_t s)131 mach_right_send_release(mach_right_send_t s)
132 {
133 kern_return_t kr = KERN_FAILURE;
134
135 kr = mach_port_mod_refs(mach_task_self(), s.mrs_name,
136 MACH_PORT_RIGHT_SEND, -1);
137 switch (kr) {
138 case 0:
139 break;
140 case KERN_INVALID_RIGHT:
141 kr = mach_port_mod_refs(mach_task_self(), s.mrs_name,
142 MACH_PORT_RIGHT_DEAD_NAME, -1);
143 _mach_assert("release dead name", kr);
144 break;
145 default:
146 _mach_assert("release send right", kr);
147 }
148 }
149
150 mach_right_send_once_t
mach_right_send_once_create(mach_right_recv_t r)151 mach_right_send_once_create(mach_right_recv_t r)
152 {
153 mach_msg_type_name_t right = 0;
154 mach_port_t so = MACH_PORT_NULL;
155 kern_return_t kr = mach_port_extract_right(mach_task_self(), r.mrr_name,
156 MACH_MSG_TYPE_MAKE_SEND_ONCE, &so, &right);
157 _mach_assert("create send-once right", kr);
158
159 return mach_right_send_once(so);
160 }
161
162 void
mach_right_send_once_consume(mach_right_send_once_t so)163 mach_right_send_once_consume(mach_right_send_once_t so)
164 {
165 kern_return_t kr = KERN_FAILURE;
166
167 kr = mach_port_mod_refs(mach_task_self(), so.mrso_name,
168 MACH_PORT_RIGHT_SEND_ONCE, -1);
169 switch (kr) {
170 case 0:
171 break;
172 case KERN_INVALID_RIGHT:
173 kr = mach_port_mod_refs(mach_task_self(), so.mrso_name,
174 MACH_PORT_RIGHT_DEAD_NAME, -1);
175 _mach_assert("release dead name", kr);
176 break;
177 default:
178 _mach_assert("consume send-once right", kr);
179 }
180 }
181