1 /*
2 * Copyright (c) 2000-2020 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31 /*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or [email protected]
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56 /*
57 */
58
59 /*
60 * File: machine/thread.h
61 *
62 * This file contains the structure definitions for the thread
63 * state as applied to I386 processors.
64 */
65
66 #ifndef _I386_THREAD_H_
67 #define _I386_THREAD_H_
68
69 #include <mach/boolean.h>
70 #include <mach/i386/vm_types.h>
71 #include <mach/i386/fp_reg.h>
72 #include <mach/thread_status.h>
73
74 #include <kern/simple_lock.h>
75
76 #include <i386/fpu.h>
77 #include <i386/iopb.h>
78 #include <i386/seg.h>
79 #include <i386/tss.h>
80 #include <i386/eflags.h>
81
82 #include <i386/cpu_data.h>
83 #include <i386/proc_reg.h>
84
85 #include <machine/pal_routines.h>
86
87 /*
88 * machine_thread_kernel_state, x86_kernel_state:
89 *
90 * This structure corresponds to the state of kernel registers
91 * as saved in a context-switch. It lives at the base of the stack.
92 */
93
94 struct x86_kernel_state {
95 uint64_t k_rbx; /* kernel context */
96 uint64_t k_rsp;
97 uint64_t k_rbp;
98 uint64_t k_r12;
99 uint64_t k_r13;
100 uint64_t k_r14;
101 uint64_t k_r15;
102 uint64_t k_rip;
103 };
104
105 #ifdef MACH_KERNEL_PRIVATE
106 typedef struct x86_kernel_state machine_thread_kernel_state;
107 #include <kern/thread_kernel_state.h>
108 #endif
109
110 /*
111 * Maps state flavor to number of words in the state:
112 */
113 extern unsigned int _MachineStateCount[];
114
115 /*
116 * The machine-dependent thread state - registers and all platform-dependent
117 * state - is saved in the machine thread structure which is embedded in
118 * the thread data structure. For historical reasons this is also referred to
119 * as the PCB.
120 */
121 struct machine_thread {
122 x86_saved_state_t *iss;
123 void *ifps;
124 void *ids;
125 decl_simple_lock_data(, lock); /* protects ifps and ids */
126 xstate_t xstate;
127
128 #ifdef MACH_BSD
129 uint64_t cthread_self; /* for use of cthread package */
130 struct real_descriptor cthread_desc;
131 unsigned long uldt_selector; /* user ldt selector to set */
132 struct real_descriptor uldt_desc; /* actual user setable ldt */
133 #endif
134
135 struct pal_pcb pal_pcb;
136 uint32_t specFlags;
137 /* N.B.: These "specFlags" are read-modify-written non-atomically within
138 * the copyio routine. So conceivably any exception that modifies the
139 * flags in a persistent manner could be clobbered if it occurs within
140 * a copyio context. For now, the only other flag here is OnProc which
141 * is not modified except at context switch.
142 */
143 #define OnProc 0x1
144 #define CopyIOActive 0x2 /* Checked to ensure DTrace actions do not re-enter copyio(). */
145 uint64_t thread_gpu_ns;
146 uint32_t last_xcpm_ttd;
147 uint8_t last_xcpm_index;
148 int mthr_do_segchk;
149 #define MTHR_SEGCHK 1
150 #define MTHR_RSBST 2
151 int insn_state_copyin_failure_errorcode; /* If insn_state is 0, this may hold the reason */
152 x86_instruction_state_t *insn_state;
153 #if DEVELOPMENT || DEBUG
154 /* first byte specifies the offset of the instruction at the time of capture */
155 uint8_t insn_cacheline[65]; /* XXX: Hard-coded cacheline size */
156 #endif
157 x86_lbrs_t lbrs;
158 bool insn_copy_optout;
159 };
160 typedef struct machine_thread *pcb_t;
161
162 #define THREAD_TO_PCB(Thr) (&(Thr)->machine)
163
164 #define USER_STATE(Thr) ((Thr)->machine.iss)
165 #define USER_REGS32(Thr) (saved_state32(USER_STATE(Thr)))
166 #define USER_REGS64(Thr) (saved_state64(USER_STATE(Thr)))
167
168 #define user_pc(Thr) (is_saved_state32(USER_STATE(Thr)) ? \
169 USER_REGS32(Thr)->eip : \
170 USER_REGS64(Thr)->isf.rip )
171
172 extern void *get_user_regs(thread_t);
173
174 extern void *act_thread_csave(void);
175 extern void act_thread_catt(void *ctx);
176 extern void act_thread_cfree(void *ctx);
177
178 #define FIND_PERFCONTROL_STATE(th) (PERFCONTROL_STATE_NULL)
179
180 /*
181 * On the kernel stack is:
182 * stack: ...
183 * struct thread_kernel_state
184 * stack+kernel_stack_size
185 */
186
187
188 #define STACK_IKS(stack) \
189 (&(((struct thread_kernel_state *)((stack) + kernel_stack_size)) - 1)->machine)
190
191 extern vm_offset_t kernel_stack_size;
192
193 /*
194 * Return the current stack depth including thread_kernel_state
195 *
196 * Note: this is only valid to call on a thread's kernel stack,
197 * as opposed to the interrupt or special expection stacks, since
198 * it's computation is based on cpu_kernel_stack field of the cpu
199 * pointer.
200 *
201 */
202 static inline vm_offset_t
current_kernel_stack_depth(void)203 current_kernel_stack_depth(void)
204 {
205 vm_offset_t stack_ptr;
206 vm_offset_t stack_depth;
207
208 assert(get_preemption_level() > 0 || !ml_get_interrupts_enabled());
209
210 __asm__ volatile ("mov %%rsp, %0" : "=m" (stack_ptr));
211
212 stack_depth = current_cpu_datap()->cpu_kernel_stack
213 + sizeof(struct thread_kernel_state)
214 - stack_ptr;
215
216 if (stack_depth >= kernel_stack_size) {
217 panic("kernel stack overflow; stack base: 0x%16lx, "
218 "stack top: 0x%016lx, stack depth: 0x%016lx, "
219 "depth limit: 0x%016lx", current_cpu_datap()->cpu_kernel_stack,
220 stack_ptr, stack_depth, kernel_stack_size);
221 }
222
223 return stack_depth;
224 }
225
226 /*
227 * Return address of the function that called current function, given
228 * address of the first parameter of current function.
229 */
230 #define GET_RETURN_PC(addr) (__builtin_return_address(0))
231
232 #endif /* _I386_THREAD_H_ */
233