xref: /xnu-10002.1.13/tools/lldbmacros/apic.py (revision 1031c584a5e37aff177559b9f69dbd3c8c3fd30a)
1*1031c584SApple OSS Distributionsfrom __future__ import absolute_import, print_function
2*1031c584SApple OSS Distributions
3*1031c584SApple OSS Distributionsfrom builtins import range
4*1031c584SApple OSS Distributions
5*1031c584SApple OSS Distributionsfrom xnu import *
6*1031c584SApple OSS Distributionsfrom misc import DoReadMsr64, DoWriteMsr64
7*1031c584SApple OSS Distributions
8*1031c584SApple OSS Distributions######################################
9*1031c584SApple OSS Distributions# Globals
10*1031c584SApple OSS Distributions######################################
11*1031c584SApple OSS Distributionslapic_base_addr = 0xfee00000
12*1031c584SApple OSS Distributionsioapic_base_addr = 0xfec00000
13*1031c584SApple OSS Distributionsioapic_index_off = 0x0
14*1031c584SApple OSS Distributionsioapic_data_off = 0x10
15*1031c584SApple OSS Distributions
16*1031c584SApple OSS Distributions
17*1031c584SApple OSS Distributions######################################
18*1031c584SApple OSS Distributions# LAPIC Helper functions
19*1031c584SApple OSS Distributions######################################
20*1031c584SApple OSS Distributionsdef IsArchX86_64():
21*1031c584SApple OSS Distributions    """ Determines if target machine is x86_64
22*1031c584SApple OSS Distributions        Returns:
23*1031c584SApple OSS Distributions            True if running on x86_64, False otherwise
24*1031c584SApple OSS Distributions    """
25*1031c584SApple OSS Distributions    return kern.arch == "x86_64"
26*1031c584SApple OSS Distributions
27*1031c584SApple OSS Distributions
28*1031c584SApple OSS Distributions@static_var('x2apic_enabled', -1)
29*1031c584SApple OSS Distributionsdef IsX2ApicEnabled():
30*1031c584SApple OSS Distributions    """ Reads the APIC configuration MSR to determine if APIC is operating
31*1031c584SApple OSS Distributions        in x2APIC mode. The MSR is read the first time this function is
32*1031c584SApple OSS Distributions        called, and the answer is remembered for all subsequent calls.
33*1031c584SApple OSS Distributions        Returns:
34*1031c584SApple OSS Distributions            True if APIC is x2APIC mode
35*1031c584SApple OSS Distributions            False if not
36*1031c584SApple OSS Distributions    """
37*1031c584SApple OSS Distributions    apic_cfg_msr = 0x1b
38*1031c584SApple OSS Distributions    apic_cfg_msr_x2en_mask = 0xc00
39*1031c584SApple OSS Distributions    if IsX2ApicEnabled.x2apic_enabled < 0:
40*1031c584SApple OSS Distributions        if (int(DoReadMsr64(apic_cfg_msr, xnudefines.lcpu_self)) & apic_cfg_msr_x2en_mask ==
41*1031c584SApple OSS Distributions            apic_cfg_msr_x2en_mask):
42*1031c584SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 1
43*1031c584SApple OSS Distributions        else:
44*1031c584SApple OSS Distributions            IsX2ApicEnabled.x2apic_enabled = 0
45*1031c584SApple OSS Distributions    return IsX2ApicEnabled.x2apic_enabled == 1
46*1031c584SApple OSS Distributions
47*1031c584SApple OSS Distributionsdef DoLapicRead32(offset, cpu):
48*1031c584SApple OSS Distributions    """ Read the specified 32-bit LAPIC register
49*1031c584SApple OSS Distributions        Params:
50*1031c584SApple OSS Distributions            offset: int - index of LAPIC register to read
51*1031c584SApple OSS Distributions            cpu: int - cpu ID
52*1031c584SApple OSS Distributions        Returns:
53*1031c584SApple OSS Distributions            The 32-bit LAPIC register value
54*1031c584SApple OSS Distributions    """
55*1031c584SApple OSS Distributions    if IsX2ApicEnabled():
56*1031c584SApple OSS Distributions        return DoReadMsr64(offset >> 4, cpu)
57*1031c584SApple OSS Distributions    else:
58*1031c584SApple OSS Distributions        return ReadPhysInt(lapic_base_addr + offset, 32, cpu)
59*1031c584SApple OSS Distributions
60*1031c584SApple OSS Distributionsdef DoLapicWrite32(offset, val, cpu):
61*1031c584SApple OSS Distributions    """ Write the specified 32-bit LAPIC register
62*1031c584SApple OSS Distributions        Params:
63*1031c584SApple OSS Distributions            offset: int - index of LAPIC register to write
64*1031c584SApple OSS Distributions            val: int - write value
65*1031c584SApple OSS Distributions            cpu: int - cpu ID
66*1031c584SApple OSS Distributions        Returns:
67*1031c584SApple OSS Distributions            True if success, False if error
68*1031c584SApple OSS Distributions    """
69*1031c584SApple OSS Distributions    if IsX2ApicEnabled():
70*1031c584SApple OSS Distributions        return DoWriteMsr64(offset >> 4, cpu, val)
71*1031c584SApple OSS Distributions    else:
72*1031c584SApple OSS Distributions        return WritePhysInt(lapic_base_addr + offset, val, 32)
73*1031c584SApple OSS Distributions
74*1031c584SApple OSS Distributions######################################
75*1031c584SApple OSS Distributions# LAPIC Register Print functions
76*1031c584SApple OSS Distributions######################################
77*1031c584SApple OSS Distributionsdef GetLapicVersionFields(reg_val):
78*1031c584SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
79*1031c584SApple OSS Distributions        version register.
80*1031c584SApple OSS Distributions        Params:
81*1031c584SApple OSS Distributions            reg_val: int - the value of the version register to print
82*1031c584SApple OSS Distributions        Returns:
83*1031c584SApple OSS Distributions            string showing the fields
84*1031c584SApple OSS Distributions    """
85*1031c584SApple OSS Distributions    lvt_num = (reg_val >> 16) + 1
86*1031c584SApple OSS Distributions    version = reg_val & 0xff
87*1031c584SApple OSS Distributions    return "[VERSION={:d} MaxLVT={:d}]".format(lvt_num, version)
88*1031c584SApple OSS Distributions
89*1031c584SApple OSS Distributionsdef GetLapicSpuriousVectorFields(reg_val):
90*1031c584SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
91*1031c584SApple OSS Distributions        spurious vector register.
92*1031c584SApple OSS Distributions        Params:
93*1031c584SApple OSS Distributions            reg_val: int - the value of the spurious vector registre to print
94*1031c584SApple OSS Distributions        Returns:
95*1031c584SApple OSS Distributions            string showing the fields
96*1031c584SApple OSS Distributions    """
97*1031c584SApple OSS Distributions    vector = reg_val & 0xff
98*1031c584SApple OSS Distributions    enabled = (reg_val & 0x100) >> 8
99*1031c584SApple OSS Distributions    return "[VEC={:3d} ENABLED={:d}]".format(vector, enabled)
100*1031c584SApple OSS Distributions
101*1031c584SApple OSS Distributionsdef GetLapicIcrHiFields(reg_val):
102*1031c584SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
103*1031c584SApple OSS Distributions        upper 32-bits of the Interrupt Control Register (ICR).
104*1031c584SApple OSS Distributions        Params:
105*1031c584SApple OSS Distributions            reg_val: int - the value of the ICR to show
106*1031c584SApple OSS Distributions        Returns:
107*1031c584SApple OSS Distributions            string showing the fields
108*1031c584SApple OSS Distributions    """
109*1031c584SApple OSS Distributions    dest = reg_val >> 24
110*1031c584SApple OSS Distributions    return "[DEST={:d}]".format(dest)
111*1031c584SApple OSS Distributions
112*1031c584SApple OSS Distributionsdef GetLapicTimerDivideFields(reg_val):
113*1031c584SApple OSS Distributions    """ Helper function for DoLapicDump that prints the fields of the
114*1031c584SApple OSS Distributions        timer divide register.
115*1031c584SApple OSS Distributions        Params:
116*1031c584SApple OSS Distributions            reg_val: int - the value of the timer divide register
117*1031c584SApple OSS Distributions        Returns:
118*1031c584SApple OSS Distributions            string showing the fields
119*1031c584SApple OSS Distributions    """
120*1031c584SApple OSS Distributions    divide_val = ((reg_val & 0x8) >> 1) | (reg_val & 0x3)
121*1031c584SApple OSS Distributions    if divide_val == 0x7:
122*1031c584SApple OSS Distributions        divide_by = 1
123*1031c584SApple OSS Distributions    else:
124*1031c584SApple OSS Distributions        divide_by = 2 << divide_val
125*1031c584SApple OSS Distributions    return "[Divide by {:d}]".format(divide_by)
126*1031c584SApple OSS Distributions
127*1031c584SApple OSS Distributionsdef GetApicFields(reg_val):
128*1031c584SApple OSS Distributions    """ Helper function for DoLapicDump and DoIoapicDump that prints the
129*1031c584SApple OSS Distributions        fields of the APIC register.
130*1031c584SApple OSS Distributions        Params:
131*1031c584SApple OSS Distributions            reg_val: int - the value of the APIC register to print
132*1031c584SApple OSS Distributions        Returns:
133*1031c584SApple OSS Distributions            string showing the fields
134*1031c584SApple OSS Distributions    """
135*1031c584SApple OSS Distributions    vector = reg_val & 0xff
136*1031c584SApple OSS Distributions    tsc_deadline = reg_val & 0x40000
137*1031c584SApple OSS Distributions    periodic = reg_val & 0x20000
138*1031c584SApple OSS Distributions    masked = reg_val & 0x10000
139*1031c584SApple OSS Distributions    trigger = reg_val & 0x8000
140*1031c584SApple OSS Distributions    polarity = reg_val & 0x2000
141*1031c584SApple OSS Distributions    pending = reg_val & 0x1000
142*1031c584SApple OSS Distributions
143*1031c584SApple OSS Distributions    ret_str = "[VEC={:3d} MASK={:3s} TRIG={:5s} POL={:4s} PEND={:3s}".format(
144*1031c584SApple OSS Distributions        vector,
145*1031c584SApple OSS Distributions        "no" if masked == 0 else "yes",
146*1031c584SApple OSS Distributions        "edge" if trigger == 0 else "level",
147*1031c584SApple OSS Distributions        "low" if polarity == 0 else "high",
148*1031c584SApple OSS Distributions        "no" if pending == 0 else "yes")
149*1031c584SApple OSS Distributions    if not periodic == 0:
150*1031c584SApple OSS Distributions        ret_str += " PERIODIC"
151*1031c584SApple OSS Distributions    if not tsc_deadline == 0:
152*1031c584SApple OSS Distributions        ret_str += " TSC_DEADLINE"
153*1031c584SApple OSS Distributions    ret_str += "]"
154*1031c584SApple OSS Distributions    return ret_str
155*1031c584SApple OSS Distributions
156*1031c584SApple OSS Distributionsdef DoLapicDump():
157*1031c584SApple OSS Distributions    """ Prints all LAPIC registers
158*1031c584SApple OSS Distributions    """
159*1031c584SApple OSS Distributions    print("LAPIC operating mode: {:s}".format(
160*1031c584SApple OSS Distributions        "x2APIC" if IsX2ApicEnabled() else "xAPIC"))
161*1031c584SApple OSS Distributions    # LAPIC register offset, register name, field formatting function
162*1031c584SApple OSS Distributions    lapic_dump_table = [
163*1031c584SApple OSS Distributions        (0x020, "ID", None),
164*1031c584SApple OSS Distributions        (0x030, "VERSION", GetLapicVersionFields),
165*1031c584SApple OSS Distributions        (0x080, "TASK PRIORITY", None),
166*1031c584SApple OSS Distributions        (0x0A0, "PROCESSOR PRIORITY", None),
167*1031c584SApple OSS Distributions        (0x0D0, "LOGICAL DEST", None),
168*1031c584SApple OSS Distributions        (0x0E0, "DEST FORMAT", None),
169*1031c584SApple OSS Distributions        (0x0F0, "SPURIOUS VECTOR", GetLapicSpuriousVectorFields),
170*1031c584SApple OSS Distributions        (0x100, "ISR[031:000]", None),
171*1031c584SApple OSS Distributions        (0x110, "ISR[063:032]", None),
172*1031c584SApple OSS Distributions        (0x120, "ISR[095:064]", None),
173*1031c584SApple OSS Distributions        (0x130, "ISR[127:096]", None),
174*1031c584SApple OSS Distributions        (0x140, "ISR[159:128]", None),
175*1031c584SApple OSS Distributions        (0x150, "ISR[191:160]", None),
176*1031c584SApple OSS Distributions        (0x160, "ISR[223:192]", None),
177*1031c584SApple OSS Distributions        (0x170, "ISR[225:224]", None),
178*1031c584SApple OSS Distributions        (0x180, "TMR[031:000]", None),
179*1031c584SApple OSS Distributions        (0x190, "TMR[063:032]", None),
180*1031c584SApple OSS Distributions        (0x1A0, "TMR[095:064]", None),
181*1031c584SApple OSS Distributions        (0x1B0, "TMR[127:096]", None),
182*1031c584SApple OSS Distributions        (0x1C0, "TMR[159:128]", None),
183*1031c584SApple OSS Distributions        (0x1D0, "TMR[191:160]", None),
184*1031c584SApple OSS Distributions        (0x1E0, "TMR[223:192]", None),
185*1031c584SApple OSS Distributions        (0x1F0, "TMR[225:224]", None),
186*1031c584SApple OSS Distributions        (0x200, "IRR[031:000]", None),
187*1031c584SApple OSS Distributions        (0x210, "IRR[063:032]", None),
188*1031c584SApple OSS Distributions        (0x220, "IRR[095:064]", None),
189*1031c584SApple OSS Distributions        (0x230, "IRR[127:096]", None),
190*1031c584SApple OSS Distributions        (0x240, "IRR[159:128]", None),
191*1031c584SApple OSS Distributions        (0x250, "IRR[191:160]", None),
192*1031c584SApple OSS Distributions        (0x260, "IRR[223:192]", None),
193*1031c584SApple OSS Distributions        (0x270, "IRR[225:224]", None),
194*1031c584SApple OSS Distributions        (0x280, "ERROR STATUS", None),
195*1031c584SApple OSS Distributions        (0x300, "Interrupt Command LO", GetApicFields),
196*1031c584SApple OSS Distributions        (0x310, "Interrupt Command HI", GetLapicIcrHiFields),
197*1031c584SApple OSS Distributions        (0x320, "LVT Timer", GetApicFields),
198*1031c584SApple OSS Distributions        (0x350, "LVT LINT0", GetApicFields),
199*1031c584SApple OSS Distributions        (0x360, "LVT LINT1", GetApicFields),
200*1031c584SApple OSS Distributions        (0x370, "LVT Error", GetApicFields),
201*1031c584SApple OSS Distributions        (0x340, "LVT PerfMon", GetApicFields),
202*1031c584SApple OSS Distributions        (0x330, "LVT Thermal", GetApicFields),
203*1031c584SApple OSS Distributions        (0x3e0, "Timer Divide", GetLapicTimerDivideFields),
204*1031c584SApple OSS Distributions        (0x380, "Timer Init Count", None),
205*1031c584SApple OSS Distributions        (0x390, "Timer Cur Count", None)]
206*1031c584SApple OSS Distributions    for reg in lapic_dump_table:
207*1031c584SApple OSS Distributions        reg_val = DoLapicRead32(reg[0], xnudefines.lcpu_self)
208*1031c584SApple OSS Distributions        if reg[2] == None:
209*1031c584SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x}".format(reg[0], reg[1], reg_val))
210*1031c584SApple OSS Distributions        else:
211*1031c584SApple OSS Distributions            print("LAPIC[{:#05x}] {:21s}: {:#010x} {:s}".format(reg[0], reg[1],
212*1031c584SApple OSS Distributions                reg_val, reg[2](reg_val)))
213*1031c584SApple OSS Distributions
214*1031c584SApple OSS Distributions######################################
215*1031c584SApple OSS Distributions# IOAPIC Helper functions
216*1031c584SApple OSS Distributions######################################
217*1031c584SApple OSS Distributionsdef DoIoApicRead(offset):
218*1031c584SApple OSS Distributions    """ Read the specified IOAPIC register
219*1031c584SApple OSS Distributions        Params:
220*1031c584SApple OSS Distributions            offset: int - index of IOAPIC register to read
221*1031c584SApple OSS Distributions        Returns:
222*1031c584SApple OSS Distributions            int 32-bit read value
223*1031c584SApple OSS Distributions    """
224*1031c584SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
225*1031c584SApple OSS Distributions    return ReadPhysInt(ioapic_base_addr + ioapic_data_off, 32)
226*1031c584SApple OSS Distributions
227*1031c584SApple OSS Distributionsdef DoIoApicWrite(offset, val):
228*1031c584SApple OSS Distributions    """ Write the specified IOAPIC register
229*1031c584SApple OSS Distributions        Params:
230*1031c584SApple OSS Distributions            offset: int - index of IOAPIC register to write
231*1031c584SApple OSS Distributions        Returns:
232*1031c584SApple OSS Distributions            True if success, False if error
233*1031c584SApple OSS Distributions    """
234*1031c584SApple OSS Distributions    WritePhysInt(ioapic_base_addr + ioapic_index_off, offset, 8)
235*1031c584SApple OSS Distributions    return WritePhysInt(ioapic_base_addr + ioapic_data_off, val, 32)
236*1031c584SApple OSS Distributions
237*1031c584SApple OSS Distributionsdef DoIoApicDump():
238*1031c584SApple OSS Distributions    """ Prints all IOAPIC registers
239*1031c584SApple OSS Distributions    """
240*1031c584SApple OSS Distributions    # Show IOAPIC ID register
241*1031c584SApple OSS Distributions    ioapic_id = DoIoApicRead(0)
242*1031c584SApple OSS Distributions    print("IOAPIC[0x00] {:9s}: {:#010x}".format("ID", ioapic_id))
243*1031c584SApple OSS Distributions    # Show IOAPIC Version register
244*1031c584SApple OSS Distributions    ioapic_ver = DoIoApicRead(1)
245*1031c584SApple OSS Distributions    maxredir = ((ioapic_ver >> 16) & 0xff) + 1
246*1031c584SApple OSS Distributions    print("IOAPIC[0x01] {:9s}: {:#010x}".format("VERSION", ioapic_ver) +\
247*1031c584SApple OSS Distributions        "       [MAXREDIR={:02d} PRQ={:d} VERSION={:#04x}]".format(
248*1031c584SApple OSS Distributions            maxredir,
249*1031c584SApple OSS Distributions            ioapic_ver >> 15 & 0x1,
250*1031c584SApple OSS Distributions            ioapic_ver & 0xff))
251*1031c584SApple OSS Distributions    # Show IOAPIC redirect regsiters
252*1031c584SApple OSS Distributions    for redir in range(maxredir):
253*1031c584SApple OSS Distributions        redir_val_lo = DoIoApicRead(0x10 + redir * 2)
254*1031c584SApple OSS Distributions        redir_val_hi = DoIoApicRead(0x10 + (redir * 2) + 1)
255*1031c584SApple OSS Distributions        print("IOAPIC[{:#04x}] IOREDIR{:02d}: {:#08x}{:08x} {:s}".format(
256*1031c584SApple OSS Distributions            0x10 + (redir * 2),
257*1031c584SApple OSS Distributions            redir,
258*1031c584SApple OSS Distributions            redir_val_hi,
259*1031c584SApple OSS Distributions            redir_val_lo,
260*1031c584SApple OSS Distributions            GetApicFields(redir_val_lo)))
261*1031c584SApple OSS Distributions
262*1031c584SApple OSS Distributions######################################
263*1031c584SApple OSS Distributions# LLDB commands
264*1031c584SApple OSS Distributions######################################
265*1031c584SApple OSS Distributions@lldb_command('lapic_read32')
266*1031c584SApple OSS Distributionsdef LapicRead32(cmd_args=None):
267*1031c584SApple OSS Distributions    """ Read the LAPIC register at the specified offset. The CPU can
268*1031c584SApple OSS Distributions        be optionally specified
269*1031c584SApple OSS Distributions        Syntax: lapic_read32 <offset> [lcpu]
270*1031c584SApple OSS Distributions    """
271*1031c584SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
272*1031c584SApple OSS Distributions        print(LapicRead32.__doc__)
273*1031c584SApple OSS Distributions        return
274*1031c584SApple OSS Distributions    if not IsArchX86_64():
275*1031c584SApple OSS Distributions        print("lapic_read32 not supported on this architecture.")
276*1031c584SApple OSS Distributions        return
277*1031c584SApple OSS Distributions
278*1031c584SApple OSS Distributions    lcpu = xnudefines.lcpu_self
279*1031c584SApple OSS Distributions    if len(cmd_args) > 1:
280*1031c584SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[1])
281*1031c584SApple OSS Distributions
282*1031c584SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
283*1031c584SApple OSS Distributions    read_val = DoLapicRead32(offset, lcpu)
284*1031c584SApple OSS Distributions    print("LAPIC[{:#05x}]: {:#010x}".format(offset, read_val))
285*1031c584SApple OSS Distributions
286*1031c584SApple OSS Distributions@lldb_command('lapic_write32')
287*1031c584SApple OSS Distributionsdef LapicWrite32(cmd_args=None):
288*1031c584SApple OSS Distributions    """ Write the LAPIC register at the specified offset. The CPU can
289*1031c584SApple OSS Distributions        be optionally specified. Prints an error message if there was a
290*1031c584SApple OSS Distributions        failure. Prints nothing upon success.
291*1031c584SApple OSS Distributions        Syntax: lapic_write32 <offset> <val> [lcpu]
292*1031c584SApple OSS Distributions    """
293*1031c584SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
294*1031c584SApple OSS Distributions        print(LapicWrite32.__doc__)
295*1031c584SApple OSS Distributions        return
296*1031c584SApple OSS Distributions    if not IsArchX86_64():
297*1031c584SApple OSS Distributions        print("lapic_write32 not supported on this architecture.")
298*1031c584SApple OSS Distributions        return
299*1031c584SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
300*1031c584SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
301*1031c584SApple OSS Distributions    lcpu = xnudefines.lcpu_self
302*1031c584SApple OSS Distributions    if len(cmd_args) > 2:
303*1031c584SApple OSS Distributions        lcpu = ArgumentStringToInt(cmd_args[2])
304*1031c584SApple OSS Distributions    if not DoLapicWrite32(offset, write_val, lcpu):
305*1031c584SApple OSS Distributions        print("lapic_write32 FAILED")
306*1031c584SApple OSS Distributions
307*1031c584SApple OSS Distributions@lldb_command('lapic_dump')
308*1031c584SApple OSS Distributionsdef LapicDump(cmd_args=None):
309*1031c584SApple OSS Distributions    """ Prints all LAPIC entries
310*1031c584SApple OSS Distributions    """
311*1031c584SApple OSS Distributions    if not IsArchX86_64():
312*1031c584SApple OSS Distributions        print("lapic_dump not supported on this architecture.")
313*1031c584SApple OSS Distributions        return
314*1031c584SApple OSS Distributions    DoLapicDump()
315*1031c584SApple OSS Distributions
316*1031c584SApple OSS Distributions@lldb_command('ioapic_read32')
317*1031c584SApple OSS Distributionsdef IoApicRead32(cmd_args=None):
318*1031c584SApple OSS Distributions    """ Read the IOAPIC register at the specified offset.
319*1031c584SApple OSS Distributions        Syntax: ioapic_read32 <offset>
320*1031c584SApple OSS Distributions    """
321*1031c584SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 1:
322*1031c584SApple OSS Distributions        print(IoApicRead32.__doc__)
323*1031c584SApple OSS Distributions        return
324*1031c584SApple OSS Distributions    if not IsArchX86_64():
325*1031c584SApple OSS Distributions        print("ioapic_read32 not supported on this architecture.")
326*1031c584SApple OSS Distributions        return
327*1031c584SApple OSS Distributions
328*1031c584SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
329*1031c584SApple OSS Distributions    read_val = DoIoApicRead(offset)
330*1031c584SApple OSS Distributions    print("IOAPIC[{:#04x}]: {:#010x}".format(offset, read_val))
331*1031c584SApple OSS Distributions
332*1031c584SApple OSS Distributions@lldb_command('ioapic_write32')
333*1031c584SApple OSS Distributionsdef IoApicWrite32(cmd_args=None):
334*1031c584SApple OSS Distributions    """ Write the IOAPIC register at the specified offset.
335*1031c584SApple OSS Distributions        Syntax: ioapic_write32 <offset> <val>
336*1031c584SApple OSS Distributions    """
337*1031c584SApple OSS Distributions    if cmd_args == None or len(cmd_args) < 2:
338*1031c584SApple OSS Distributions        print(IoApicWrite32.__doc__)
339*1031c584SApple OSS Distributions        return
340*1031c584SApple OSS Distributions    if not IsArchX86_64():
341*1031c584SApple OSS Distributions        print("ioapic_write32 not supported on this architecture.")
342*1031c584SApple OSS Distributions        return
343*1031c584SApple OSS Distributions
344*1031c584SApple OSS Distributions    offset = ArgumentStringToInt(cmd_args[0])
345*1031c584SApple OSS Distributions    write_val = ArgumentStringToInt(cmd_args[1])
346*1031c584SApple OSS Distributions    if not DoIoApicWrite(offset, write_val):
347*1031c584SApple OSS Distributions        print("ioapic_write32 FAILED")
348*1031c584SApple OSS Distributions    return
349*1031c584SApple OSS Distributions
350*1031c584SApple OSS Distributions@lldb_command('ioapic_dump')
351*1031c584SApple OSS Distributionsdef IoApicDump(cmd_args=None):
352*1031c584SApple OSS Distributions    """ Prints all IOAPIC entries
353*1031c584SApple OSS Distributions    """
354*1031c584SApple OSS Distributions    if not IsArchX86_64():
355*1031c584SApple OSS Distributions        print("ioapic_dump not supported on this architecture.")
356*1031c584SApple OSS Distributions        return
357*1031c584SApple OSS Distributions    DoIoApicDump()
358*1031c584SApple OSS Distributions
359