| /xnu-11417.140.69/bsd/dev/arm64/ |
| H A D | cpu_memcmp_mask.s | 72 ld1.16b {v0}, [src1]
75 eor.16b v0, v0, v1
76 and.16b v0, v0, v2
77 umaxv b0, v0.16b
78 umov w0, v0.s[0]
101 ld1.16b {v0, v1}, [src1]
104 eor.16b v0, v0, v2
106 and.16b v0, v0, v4
108 orr.16b v0, v0, v1
109 umaxv b0, v0.16b
[all …]
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| H A D | cpu_copy_in_cksum.s | 118 st1.4s {v0, v1, v2, v3}, [x11], #4*16
126 eor.16b v0, v0, v0
129 mov v0.d[0], partial // move partial to 1st 64b lane in v0
163 uadalp.2d v0, v4
177 uadalp.2d v0, v16
195 uadalp.2d v0, v4
204 uadalp.2d v0, v16
214 add.2d v0, v0, v2
231 uadalp.2d v0, v2
238 uadalp.2d v0, v2
[all …]
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| H A D | cpu_in_cksum.s | 289 st1.4s {v0, v1, v2, v3}, [x11], #4*16
294 eor.16b v0, v0, v0
312 uadalp.2d v0, v4
327 uadalp.2d v0, v4
332 add.2d v0, v0, v1
334 addp.2d d0, v0
336 add.2d v0, v0, v2
340 ld1.4s {v0, v1, v2, v3}, [sp], #4*16
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| /xnu-11417.140.69/osfmk/arm64/ |
| H A D | strnlen.s | 98 orr.16b v0, v0, v1
109 1: uminv.16b b1, v0
131 cmhi.16b v0, v0, v1
132 orr.16b v0, v0, v2
133 uminv.16b b1, v0
166 orr.16b v0, v0, v1
178 1: uminv.16b b1, v0
196 cmhi.16b v0, v0, v1
197 orr.16b v0, v0, v2
198 uminv.16b b1, v0
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| H A D | strncmp.s | 128 cmeq.16b v1, v0, v1
129 and.16b v0, v0, v1 // contains zero byte iff mismatch or EOS
130 uminv.16b b1, v0
171 cmeq.16b v1, v0, v1
172 and.16b v0, v0, v1 // contains zero byte iff mismatch or EOS
173 uminv.16b b1, v0
184 cmeq.16b v1, v0, v1
185 and.16b v0, v0, v1 // contains zero byte iff mismatch or EOS
186 uminv.16b b1, v0
198 cmhi.16b v0, v0, v1 // force non-zero lanes to 0xff
[all …]
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| H A D | WKdmDecompress_4k.s | 141 st1.4s {v0,v1,v2},[rax],#48
196 ld1.4s {v0,v1},[rbx]
219 ushl.4s v2, v2, v0 // v1 = {0, -2, -4, -6}
220 ushl.4s v3, v3, v0 // v1 = {0, -2, -4, -6}
221 ushl.4s v4, v4, v0 // v1 = {0, -2, -4, -6}
222 ushl.4s v5, v5, v0 // v1 = {0, -2, -4, -6}
243 ld1.4s {v0,v1},[rbx]
250 ushl.4s v2, v2, v0 // v1 = {0, -4, 0, -4}
260 ushl.2s v2, v2, v0 // v1 = {0, -4}
282 ld1.4s {v0,v1,v2,v3},[rbx]
[all …]
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| H A D | WKdmDecompress_16k.s | 141 st1.4s {v0,v1,v2},[rax],#48
196 ld1.4s {v0,v1},[rbx]
219 ushl.4s v2, v2, v0 // v1 = {0, -2, -4, -6}
220 ushl.4s v3, v3, v0 // v1 = {0, -2, -4, -6}
221 ushl.4s v4, v4, v0 // v1 = {0, -2, -4, -6}
222 ushl.4s v5, v5, v0 // v1 = {0, -2, -4, -6}
243 ld1.4s {v0,v1},[rbx]
250 ushl.4s v2, v2, v0 // v1 = {0, -4, 0, -4}
260 ushl.2s v2, v2, v0 // v1 = {0, -4}
282 ld1.4s {v0,v1,v2,v3},[rbx]
[all …]
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| H A D | WKdmCompress_16k.s | 245 st1.4s {v0,v1,v2,v3},[sp]
358 ld1.2s {v0,v1,v2,v3},[rcx],#32
363 orr.8b v0, v0, v1
366 ushr.2d v1, v0, #30
369 orr.8b v0, v0, v1
372 zip1.2s v0, v0, v2
373 st1.2s {v0},[rdi],#8
470 ld1.4s {v0,v1,v2,v3},[sp],#64
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| H A D | WKdmCompress_4k.s | 243 st1.4s {v0,v1,v2,v3},[sp]
356 ld1.2s {v0,v1,v2,v3},[rcx],#32
361 orr.8b v0, v0, v1
364 ushr.2d v1, v0, #30
367 orr.8b v0, v0, v1
370 zip1.2s v0, v0, v2
371 st1.2s {v0},[rdi],#8
468 ld1.4s {v0,v1,v2,v3},[sp],#64
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| H A D | memcmp_zero.s | 98 orr.16b v4, v4, v0 // use orr to keep non-zero bytes
114 orr.16b v4, v4, v0 // use orr to keep non-zero bytes
123 umov w0, v0.b[0] // move byte to GPR for testing
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| H A D | lz4_decode_arm64.s | 226 tbl v0.16b,{v0.16b},v1.16b // low 16 bytes of pattern
253 tbl v0.16b,{v1.16b},v2.16b // low 16 bytes of pattern in q0
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| H A D | machine_routines_asm.s | 1490 dup.4s v0, w2
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| /xnu-11417.140.69/bsd/dev/i386/ |
| H A D | cpu_copy_in_cksum.s | 87 #define v0 %xmm0 macro
143 movdqa v0, 0*16(%rsp)
166 pxor v0, v0
169 movq partial, v0 // move partial to 1st 64b lane in v0
225 paddq v4, v0
246 paddq v12, v0
268 paddq v8, v0
288 paddq v12, v0
322 paddq v4, v0
339 paddq v12, v0
[all …]
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| /xnu-11417.140.69/bsd/dev/arm/ |
| H A D | cpu_copy_in_cksum.s | 57 #define v0 q0 macro
124 vpush {v0-v3}
132 veor v0, v0, v0
156 vpadal.u16 v0, v8
166 vpadal.u16 v0, v12
180 vpadal.u16 v0, v8
188 vpadal.u16 v0, v12
198 vadd.i32 v0, v0, v2
208 vpadal.u16 v0, v8
212 vpadal.u16 v0, v10
[all …]
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| /xnu-11417.140.69/osfmk/arm64/corecrypto/ |
| H A D | sha256_compress_arm64.s | 234 st1.4s {v0, v1, v2, v3}, [x4], #64
241 ld1.4s {v0,v1,v2,v3}, [data], #64 // w0,w1,w2,w3 need to bswap into big-endian
243 rev32.16b v0, v0 // byte swap of 1st 4 ints
254 add.4s v4, v0, v21 // 1st 4 input + K256
300 add.4s v4, v0, v21
320 rev32.16b v0, v0
324 add.4s v4, v0, v21
354 add.4s v4, v0, v21
368 add.4s v4, v0, v21
383 add.4s v4, v0, v21
[all …]
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