Home
last modified time | relevance | path

Searched refs:x4 (Results 1 – 25 of 29) sorted by relevance

12

/xnu-11215.1.10/osfmk/arm64/
H A Dmachine_routines_asm.s175 mov x4, #(FPSR_MASK & 0xFFFF)
177 orr x0, x4, x5
181 mov x4, #(FPCR_MASK & 0xFFFF)
183 orr x0, x4, x5
201 mov x4, #(FPSR_MASK & 0xFFFF)
203 orr x1, x4, x5
205 mov x4, #(FPCR_MASK & 0xFFFF)
207 orr x2, x4, x5
506 ldp x3, x4, [x0]
507 stp x3, x4, [x1]
[all …]
H A Dbcopy.s232 add x4, x0, x2
243 sub x3, x4, #1 // In the forward copy, we used dst+32 & -32
245 sub x5, x4, x3 // buffer. Here we use dst-1 & -32 instead,
250 stp x12,x13,[x4, #-16]
251 stp x14,x15,[x4, #-32]
282 str x6, [x4,#-8]!
289 strb w6, [x4,#-1]!
H A Dstrncmp.s82 subs x3, x4, x5 // if the are not equal
143 subs x3, x4, x5 // if the are not equal
165 add x4, x0, x3 // save the addresses of the last vectors
181 mov x0, x4
207 sub x0, x4, x5
213 subs x3, x4, x5 // if the are not equal
H A Dcaches_asm.s263 add x4, x1, x2
264 sub x4, x4, #1
265 lsr x4, x4, #MMU_CLINE // Set cache line counter
270 subs x4, x4, #1 // Decrementer cache line counter
H A Dcswitch.s292 mrs x4, TPIDR_EL1 // Get the current thread pointer
295 LOAD_KERN_STACK_TOP dst=x5, src=x4, tmp=x6
299 set_process_dependent_keys_and_sync_context x4, x5, x6, x7, w20
334 LOAD_KERN_STACK_TOP dst=x3, src=x0, tmp=x4 // Get the old kernel stack top
337 set_thread_registers x2, x3, x4
338 LOAD_KERN_STACK_TOP dst=x3, src=x2, tmp=x4
340 set_process_dependent_keys_and_sync_context x2, x3, x4, x5, w6
H A Dbzero.s76 add x4, x3, #64 // end of first cacheline to zero
77 subs x2, x2, x4 // if the end of the buffer comes first, jump
123 add x4, x3, #64 // end of first aligned 64-byte store
124 subs x2, x2, x4 // if the end of the buffer comes first, jump
H A Dmachine_routines_asm.h73 mov \tmp4, x4
89 mov x4, x16
94 mov x16, x4
107 mov x4, \tmp4
H A Dstrnlen.s95 and x4, x0, #0xf
96 sub x3, x3, x4
101 add x1, x1, x4
H A Dlocore.s104 mov x4, #0
136 and x4, x1, x3
138 cmp x4, x5
146 and x4, x1, x3
148 cmp x4, x5
867 mov x4, #0
957 mrs x4, SPSR_EL1
958 tst x4, #(PSR64_MODE_EL_MASK)
961 adrp x4, EXT(sptm_xnu_triggered_panic_ptr)@page
962 ldr x4, [x4, EXT(sptm_xnu_triggered_panic_ptr)@pageoff]
[all …]
H A Darm64_hypercall.c54 hvc_5(uint64_t *x0, uint64_t *x1, uint64_t *x2, uint64_t *x3, uint64_t *x4) in hvc_5() argument
72 [o4] "=m" (*x4) in hvc_5()
77 [i4] "r" (*x4) in hvc_5()
H A Dexception_asm.h175 stp x4, x5, [x0, SS64_X4]
240 mov x4, x16
H A Dstart.s171 SET_PIO_ONLY_REGISTERS x21, x2, x3, x4, x5, x6
591 mov x4, x0
615 create_bootstrap_mapping x0, x4, x5, x1, x2, x6, x10, x11, x12, x13
H A Dlz4_encode_arm64.s49 #define src_size x4
87 add x12, x11, x4 // src_end
H A Dlz4_decode_arm64.s55 #define src_end x4 // arg4
H A DWKdmDecompress_4k.s112 #define rbx x4
/xnu-11215.1.10/osfmk/corecrypto/
H A Dccmode_gcm_gf_mult.c47 cc_dunit x1, x2, x3, x4, x5; in bmul64() local
63 x4 = x & m4; in bmul64()
68 z = (x1 * y1) ^ (x2 * y5) ^ (x3 * y4) ^ (x4 * y3) ^ (x5 * y2); in bmul64()
70 z = (x1 * y2) ^ (x2 * y1) ^ (x3 * y5) ^ (x4 * y4) ^ (x5 * y3); in bmul64()
72 z = (x1 * y3) ^ (x2 * y2) ^ (x3 * y1) ^ (x4 * y5) ^ (x5 * y4); in bmul64()
74 z = (x1 * y4) ^ (x2 * y3) ^ (x3 * y2) ^ (x4 * y1) ^ (x5 * y5); in bmul64()
76 z = (x1 * y5) ^ (x2 * y4) ^ (x3 * y3) ^ (x4 * y2) ^ (x5 * y1); in bmul64()
/xnu-11215.1.10/osfmk/arm64/corecrypto/
H A Dsha256_compress_arm64.s232 sub x4, sp, #17*16
234 st1.4s {v0, v1, v2, v3}, [x4], #64
235 st1.4s {v4, v5, v6, v7}, [x4], #64
236 st1.4s {v16, v17, v18, v19}, [x4], #64
237 st1.4s {v20, v21, v22, v23}, [x4], #64
238 st1.4s {v24}, [x4], #16
/xnu-11215.1.10/bsd/dev/arm64/
H A Dcpu_in_cksum.s101 #define needs_swap x4
424 and x0, x4, x3, lsr #48
425 and x1, x4, x3, lsr #32
426 and x2, x4, x3, lsr #16
427 and x3, x4, x3
/xnu-11215.1.10/libsyscall/wrappers/
H A Dvarargs_wrappers.s82 ldp x3, x4, [fp, #32]
99 ldp x3, x4, [fp, #32]
/xnu-11215.1.10/osfmk/arm64/sptm/
H A Dstart_sptm.s196 mov x4, MAX_CPUS
199 mul x3, x19, x4
/xnu-11215.1.10/libsyscall/custom/
H A D__syscall.s66 ldp x3, x4, [sp, #16]
/xnu-11215.1.10/doc/mach_ipc/
H A Dkmsg.md403 0x0008,[ 0x4] (unsigned int : 0x10) pad2
404 0x000a,[ 0x4] (mach_msg_type_name_t : 0x08) disposition
405 0x000b,[ 0x4] (mach_msg_descriptor_type_t : 0x08) type
406 0x000c,[ 0x4] (uint32_t) pad_end
/xnu-11215.1.10/bsd/kern/code_signing/
H A Dtxm.c261 registers->x4 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
271 registers->x4 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
280 registers->x4 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
288 registers->x4 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
/xnu-11215.1.10/libsyscall/mach/
H A Derr_libkern.sub66 "(libkern/kext) not privileged", /* 0x4 */
/xnu-11215.1.10/tools/lldbmacros/core/
H A Doperating_system.py72 self.x4 = 0
109 return struct.pack('34QII', self.x0, self.x1, self.x2, self.x3, self.x4, self.x5,
126 self.x4 = saved_state.GetChildMemberWithName('x').GetChildAtIndex(4).GetValueAsUnsigned()

12