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/xnu-8796.141.3/osfmk/arm64/
H A Dbzero.s55 mov x2, x1
56 eor x1, x1, x1
69 stp x1, x1, [x0]
70 stp x1, x1, [x0, #16]
71 stp x1, x1, [x0, #32]
72 stp x1, x1, [x0, #48]
84 stp x1, x1, [x3] // and store 64 bytes to reach end of buffer.
85 stp x1, x1, [x3, #16]
86 stp x1, x1, [x3, #32]
87 stp x1, x1, [x3, #48]
[all …]
H A Dbcopy.s74 mov x0, x1
75 mov x1, x3
95 sub x3, x0, x1
114 ldp x12,x13,[x1]
115 ldp x14,x15,[x1, #16]
117 add x1, x1, x5 // update src pointer
136 ldp x8, x9, [x1]
137 ldp x10,x11,[x1, #16]
138 add x1, x1, #32
159 ldnp x8, x9, [x1]
[all …]
H A Dmachine_routines_asm.s99 mov x1, #1
101 LOAD_CPU_JOP_KEY x0, x1
112 mov x2, x1
114 mov x1, #0
168 mrs x1, FPSR // Grab FPSR
172 and x1, x1, x0 // Be paranoid, and clear bits we expect to
180 orr x0, x1, x2 // OR them to get FPSCR equivalent state
196 orr x1, x4, x5
197 and x1, x1, x0 // Clear the bits that don't apply to FPSR
202 msr FPSR, x1 // Write FPCR
[all …]
H A Dcaches_asm.s68 add x1, x1, x2
69 sub x1, x1, #1
70 lsr x1, x1, #MMU_I_CLINE // Set cache line counter
74 subs x1, x1, #1 // Decrementer cache line counter
146 mov x1, #0
148 CACHE_AT_LEVEL x2, x1, x3
152 mov x2, x1
154 lsl x2, x1, #1 // level field for cisw/csw, bits 1:3
166 add x1, x1, #1
167 cmp x1, x0
[all …]
H A Dlocore.s147 and x1, x1, #ESR_EC_MASK // Mask the exception class
149 cmp x1, x2 // If we have a stack alignment exception
152 cmp x1, x2 // If we have a data abort, we need to
155 mrs x1, TPIDR_EL1 // Get thread pointer
157 ldr x2, [x1, TH_KSTACKPTR] // Get top of kernel stack
164 ldr x1, [x1, ACT_CPUDATAP] // Load the cpu data ptr
165 ldr x2, [x1, CPU_INTSTACK_TOP] // Get top of istack
173 ldp x0, x1, [sp], #16
175 stp x0, x1, [sp, SS64_X0] // Save x0, x1 to the exception frame
181 adrp x1, fleh_invalid_stack@page // Load address for fleh
[all …]
H A Dalternate_debugger_asm.s42 mov x1, x3
43 blr x1 // (*putc_address)('\n');
45 ldr x1, [sp, #0x8]
46 blr x1 // (*putc_address)('>');
48 ldr x1, [sp, #0x8]
49 blr x1 // (*putc_address)('M');
51 ldr x1, [sp, #0x8]
52 blr x1 // (*putc_address)('T');
54 ldr x1, [sp, #0x8]
55 blr x1 // (*putc_address)('<');
[all …]
H A Dstrnlen.s75 tst x1, x1
100 add x1, x1, x4
111 subs x1, x1, #16
117 add x1, x1, #16
118 add x0, x0, x1
135 cmp x1, x3 // if NUL occurs before maxlen bytes
136 csel x1, x1, x3, cc // return strlen, else maxlen
137 add x0, x0, x1
148 and x1, x0, #-16
149 ldr q0, [x1]
[all …]
H A Dstart.s47 mov x1, lr
49 mov lr, x1
57 mov x0, x1
58 mov x1, lr
60 mov lr, x1
62 msr TCR_EL1, x1
68 mov x1, lr
70 mov lr, x1
78 mov x1, lr
85 mov lr, x1
[all …]
H A Dmemcmp_zero.s78 cmp x1, #64
91 sub x1, x1, x2 // update length
92 subs x1, x1, #64 // check length > 64
103 subs x1, x1, #64 // check length > 64
111 add x0, x0, x1
129 cbz x1, L_sizeIsZero // return zero if length is zero
134 subs x1, x1, #8 // update length
H A Darm64_hypercall.c54 hvc_5(uint64_t *x0, uint64_t *x1, uint64_t *x2, uint64_t *x3, uint64_t *x4) in hvc_5() argument
69 [o1] "=m" (*x1), in hvc_5()
74 [i1] "r" (*x1), in hvc_5()
84 hvc_2(uint64_t *x0, uint64_t *x1) in hvc_2() argument
87 return hvc_5(x0, x1, &x, &x, &x); in hvc_2()
258 uint64_t x1 = ml_get_abstime_offset(); in hvg_hcall_get_mabs_offset() local
260 if (!hvc_2(&fn, &x1)) { in hvg_hcall_get_mabs_offset()
263 *mabs_offset = x1; in hvg_hcall_get_mabs_offset()
278 uint64_t x1 = phys_id; in hvg_hc_kick_cpu() local
279 __assert_only const bool success = hvc_2(&x0, &x1); in hvg_hc_kick_cpu()
[all …]
H A Dexception_asm.h191 mov x21, x1
204 mov x1, x22
215 mov x1, x21
235 ldr x1, [x1, TH_KSTACKPTR] // Load the top of the kernel stack to x1
236 mov sp, x1 // Set the stack pointer to the kernel stack
241 mrs x1, TPIDR_EL1
242 ldr x1, [x1, ACT_CPUDATAP]
243 ldr x1, [x1, CPU_ISTACKPTR]
244 mov sp, x1 // Set the stack pointer to the interrupt stack
H A Dcswitch.s272 set_thread_registers x0, x1, x2
273 ldr x1, [x0, TH_KSTACKPTR] // Get top of kernel stack
274 load_general_registers x1, 2
275 set_process_dependent_keys_and_sync_context x0, x1, x2, x3, w4
302 mov x21, x1 //continuation parameter
311 mov x1, x22 // Set the wait result arg
332 cbnz x1, Lswitch_threads // Skip saving old state if blocking on continuation
370 ldr x1, [x0, TH_KSTACKPTR] // Get the top of the kernel stack
371 save_general_registers x1, 2
372 ldr x1, [x0, ACT_CPUDATAP] // Get current cpu
[all …]
H A Dstrncmp.s80 ldrb w5, [x1],#1 // load byte from src2
97 tst x1, #(kVectorSize-1)
110 neg x7, x1
125 ldr q1, [x1],#(kVectorSize)
139 ldrb w5, [x1],#1 // load byte from src2
160 ldr q1, [x1],#(kVectorSize)
188 ldrb w5, [x1, x3]
H A Dmachine_routines_asm.h67 ldr x1, [x0, SS64_PC]
86 mov \tmp1, x1
92 mov x1, \tmp1
H A Dsmccc_asm.h43 stp x0, x1, [sp, #- 16]!
55 ldp x0, x1, [sp], #16
H A Dpac_asm.h112 mov x1, \new_jop_key
132 mov x1, \new_rop_key
H A Dlz4_encode_arm64.s46 #define dst_size x1
79 add x10, x9, x1 // dst_end
/xnu-8796.141.3/osfmk/arm/commpage/
H A Dcommpage_asm.s150 stp x0, x1, [sp, #-16]!
159 ldp x0, x1, [sp], #16
287 str x1, [x0] // Set head to new element
291 str x1, [x10, x2] // Set old tail -> offset = new elem
294 str x1, [x0, #8] // Set tail = new elem
337 ldr x11, [x10, x1] // get ptr to new head
344 str xzr, [x10, x1] // zero the link in the old head
374 str xzr, [x1, x2] // Zero the forward link in the new element
483 stp x0, x1, [sp, #-16]!
493 ldp x0, x1, [sp], #16
/xnu-8796.141.3/libsyscall/wrappers/
H A Dvarargs_wrappers.s81 ldp x1, x2, [fp, #16]
98 ldp x1, x2, [fp, #16]
132 ldp x1, x2, [fp, #16]
H A Dmach_absolute_time.s229 ldr x1, [x3] // Load the offset
232 cmp x1, x2 // Compare our offset values...
234 add x0, x0, x1 // Construct mach_absolute_time
/xnu-8796.141.3/osfmk/kern/
H A Darithmetic_128.h70 uint32_t x1 = (uint32_t)(x >> 32); in mul64x64() local
82 prod->high = (uint64_t)x1 * (uint64_t)y1; in mul64x64()
84 add.low = (uint64_t)x1 * (uint64_t)y2; in mul64x64()
/xnu-8796.141.3/san/memory/
H A Dkasan-test-arm64.s22 add x1, sp, #0 /* can't STP from sp */
29 stp fp, x1, [x0, JMP_fp_sp]
52 mov x0, x1
/xnu-8796.141.3/libsyscall/custom/
H A D__syscall.s65 ldp x1, x2, [sp]
H A D__fork.s142 cbz x1, Lparent // x1 == 0 indicates that we are the parent
/xnu-8796.141.3/bsd/dev/arm64/
H A Dcpu_in_cksum.s98 #define len x1
425 and x1, x4, x3, lsr #32

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