Searched refs:mdscr_el1 (Results 1 – 5 of 5) sorted by relevance
145 thread_state->mdscr_el1 |= MDSCR_SS; in thread_setsinglestep()147 thread_state->mdscr_el1 &= ~MDSCR_SS; in thread_setsinglestep()
1327 …thread_state->mdscr_el1 = 0ULL; // Legacy customers issuing ARM_DEBUG_STATE dont drive sin… in machine_thread_set_state()1352 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1379 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1380 thread_state->mdscr_el1 |= MDSCR_SS; in machine_thread_set_state()1382 thread_state->mdscr_el1 &= ~MDSCR_SS; in machine_thread_set_state()1429 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1455 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1456 thread_state->mdscr_el1 |= MDSCR_SS; in machine_thread_set_state()1458 thread_state->mdscr_el1 &= ~MDSCR_SS; in machine_thread_set_state()
769 if (debug_state->uds.ds32.mdscr_el1 & 0x1) { in arm_debug_set32()971 if (debug_state->uds.ds64.mdscr_el1 & 0x1) { in arm_debug_set64()
1335 thread->machine.DebugData->uds.ds64.mdscr_el1 &= ~0x1; in handle_sw_step_debug()
686 __uint64_t mdscr_el1; /* Bit 0 is SS (Hardware Single Step) */ variable696 __uint64_t mdscr_el1; /* Bit 0 is SS (Hardware Single Step) */ variable