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/xnu-8020.140.41/osfmk/arm/
H A Dcaches_asm.s45 mov r0, #0
47 mcr p15, 0, r0, c7, c7, 0 // Invalidate caches
61 mov r0, #0
63 mcr p15, 0, r0, c7, c6, 0 // Invalidate dcache
76 and r2, r0, #((1<<MMU_CLINE)-1)
77 bic r0, r0, #((1<<MMU_CLINE)-1) // Cached aligned
83 mcr p15, 0, r0, c7, c14, 1 // Invalidate dcache line
84 add r0, r0, #1<<MMU_CLINE // Get next cache aligned addr
101 mov r0, #0
103 mcr p15, 0, r0, c7, c5, 0 // Invalidate icache
[all …]
H A Dmachine_routines_asm.s39 ldr r1, [r0, ACT_CPUDATAP]
40 str r0, [r1, CPU_ACTIVE_THREAD]
41 mcr p15, 0, r0, c13, c0, 4 // Write TPIDRPRW
42 ldr r1, [r0, TH_CTH_SELF]
75 cmp r0, #0
81 add r0, r0, #1
96 mcr p15, 0, r0, c7, c10, 4
99 mcr p15, 0, r0, c7, c0, 4
109 cmp r0, #0
117 ldr r2, [r0, TIMER_HIGH]
[all …]
H A Dbcopy.s42 mov r3, r0
43 mov r0, r1
50 cmpne r0, r1
54 stmfd sp!, { r0, r4, r5, r7, lr }
58 subhs r3, r0, r1
59 sublo r3, r1, r0
65 mov r12, r0, lsl #30
74 tst r0, #0xf
78 tst r0, #(1<<4)
92 stmia r0!, { r3, r4, r5, r6, r8, r10, r11, r12 }
[all …]
H A Dcswitch.s84 mcr p15, 0, r0, c13, c0, 4 // Write TPIDRPRW
85 ldr r1, [r0, TH_CTH_SELF]
93 ldr r3, [r0, TH_KSTACKPTR] // Get kernel stack top
94 mov r0, #0 // no param
116 mov r4,r0 // Load continuation
122 mov r0, #1
126 mov r0,r5 // Set first parameter
130 mrc p15, 0, r0, c13, c0, 4 // Read TPIDRPRW
149 ldr r3, [r0, TH_KSTACKPTR] // Get old kernel stack top
154 ldr r3, [r0, TH_KSTACKPTR] // Get old kernel stack top
[all …]
H A Dlocore.s94 ldr r0, [r4, ASSIST_RESET_HANDLER]
95 movs r0, r0
96 blxne r0
104 ldr r0, [r4, BOOT_ARGS]
281 movne r0, sp
334 stmia sp, {r0-r12, sp, lr}^ // Save user context on PCB
338 mov r0, sp // Store arm_saved_state pointer
359 mvn r0, #0
360 …str r0, [r9, TH_IOTIER_OVERRIDE] // Reset IO tier override to -1 before handling abort from use…
368 add r0, r9, ACT_UVFP // Get the address of the user VFP save area
[all …]
H A Dstrncmp.s55 0: ldrb r3, [r0],#1
64 tst r0, #3
119 ldr ip, [r0],#4
123 ldr ip, [r0],#4
133 sub r0, r0, #4
146 movlo r0, #0
150 ldrb r3, [r0],#1
158 sub r0, r3, ip
H A Dstart.s65 ldr r8, [r0, BA_PHYS_BASE] // Get the phys base in r8
66 ldr r9, [r0, BA_VIRT_BASE] // Get the virt base in r9
67 ldr r10, [r0, BA_MEM_SIZE] // Get the mem size in r10
70 ldr r4, [r0, BA_TOP_OF_KERNEL_DATA] // Get the top of kernel data
81 sub r0, r1, r8 // Convert to virtual address
82 add r0, r0, r9
104 ldr r8, [r0, BA_PHYS_BASE] // Get the phys base in r8
105 ldr r9, [r0, BA_VIRT_BASE] // Get the virt base in r9
106 ldr r10, [r0, BA_MEM_SIZE] // Get the mem size in r10
149 ldr r4, [r0, BA_TOP_OF_KERNEL_DATA] // Get the top of kernel data
[all …]
H A DWKdmCompress_new.s169 #define src_buf r0
170 #define next_input_word r0
190 …#define R11 r0 // only safe to use between phase-1 and phase-2
427 ldrh r0,[ecx], #6 // w0
430 orr r0, r0, r4, lsl #10 // w1:w0
432 orr r0, r0, r5, lsl #20 // w2:w1:w0
433 str r0, [rdi], #4 // pack w0,w1,w2 into 1 dest_buf word
451 lsl r0, eax, #2 // boundary_tmp - dest_buf in terms of bytes
465 mov r0, #-1
516 moveq r0, #SV_RETURN // Magic return value
[all …]
H A Dasm.h254 stmfd sp!, { r0 } ; \
255 stmfd sp!, { r0 } ; \
256 LOAD_ADDR(r0, label) ; \
257 str r0, [sp, #4] ; \
258 ldmfd sp!, { r0 } ; \
H A Dstrlen.s34 #define addr r0
39 #define indx r0
H A Dstrnlen.s34 #define addr r0
41 #define indx r0
H A Dlz4_decode_armv7NEON.s50 #define dst r0 // arg0
78 push {r0, r3} // save dst/src
240 mov r0,aux1 // x0 = return value
H A Dlz4_encode_armv7.s43 #define dst_ptr r0
61 push {r0, r2}
62 ldr dst_ptr, [r0]
/xnu-8020.140.41/bsd/dev/arm/
H A Dcpu_in_cksum.s116 push {r0, r1, r2, r12}
118 pop {r0, r1, r2, r12}
151 mov ip, r0 /* set ip to the current mbuf */
155 mov r0, r8 /* otherwise, return initial sum */
161 ldr r0, [ip, #(M_DATA)]
171 add r0, r2, r0 /* data += offset (offset is < 0) */
172 add r0, r0, r1 /* data += length of mbuf */
180 ldr r0, [ip, #(M_DATA)]
186 eor r11, r10, r0
217 ands r7, r0, #0x03
[all …]
H A Dcpu_copy_in_cksum.s79 #define src r0
298 and r0, sum, lr
299 add r0, r0, sum, lsr #16
302 add r0, r0, partial, lsr #16
304 add r0, r0, partial
307 and t, r0, lr
308 add r0, t, r0, lsr #16
314 and t, r0, lr
315 add r0, t, r0, lsr #16
H A Dcpu_memcmp_mask.s53 #define src1 r0 /* 1st arg */
86 vmov.u32 r0, d0[0]
126 vmov.u32 r0, d0[0]
173 vmov.u32 r0, d0[0]
224 vmov.u32 r0, d0[0]
281 vmov.u32 r0, d0[0]
/xnu-8020.140.41/libsyscall/wrappers/
H A D__get_cpu_capabilities.s56 mov r0, #(_COMM_PAGE_CPU_CAPABILITIES & 0x000000ff)
57 orr r0, r0, #(_COMM_PAGE_CPU_CAPABILITIES & 0x0000ff00)
58 orr r0, r0, #(_COMM_PAGE_CPU_CAPABILITIES & 0x00ff0000)
59 orr r0, r0, #(_COMM_PAGE_CPU_CAPABILITIES & 0xff000000)
60 ldr r0, [r0]
H A Dmach_approximate_time.s39 movw r0, #((_COMM_PAGE_APPROX_TIME_SUPPORTED>>0)&0x0FFFF)
40 movt r0, #((_COMM_PAGE_APPROX_TIME_SUPPORTED>>16)&0x0FFFF)
41 ldrb r0, [r0] // load COMM_PAGE_APPROX_TIME_SUPPORTED
42 cmp r0, #1 // check if approx time is supported
62 ldr r0, [r2] // load low
H A Dmach_absolute_time.s181 ldrb r0, [ip, #((_COMM_PAGE_USER_TIMEBASE) - (_COMM_PAGE_TIMEBASE_OFFSET))]
182 cmp r0, #USER_TIMEBASE_NONE // Are userspace reads supported?
192 mrrc p15, 0, r0, r3, c14 // Read timebase low to r0
202 adds r0, r0, r2 // Construct mach_absolute_time
/xnu-8020.140.41/libsyscall/custom/
H A D__pipe.s53 mov r3,r0 // save fildes across syscall
55 str r0, [r3, #0]
57 mov r0,#0
H A D__getpid.s120 ldr r0, [r3] // get the cached pid
121 cmp r0, #0
130 strex r2, r0, [r3] // ignore conflicts
137 streq r0, [r3] // if zero, we can
H A D__fork.s120 mov r0, #0
121 str r0, [r3] // clear cached pid in child
126 mov r0,#-1 // set the error
H A D__vfork.s167 mov r0, #0
173 mov r0,#-1 // set the error
/xnu-8020.140.41/tools/tests/execperf/
H A Dexit-asm.S43 mov r0, #42
/xnu-8020.140.41/EXTERNAL_HEADERS/corecrypto/
H A Dccchacha20poly1305.h33 uint32_t r0, r1, r2, r3, r4; member

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