Searched refs:MSR_IA32_APIC_BASE (Results 1 – 2 of 2) sorted by relevance
| /xnu-8020.101.4/osfmk/i386/ |
| H A D | lapic_native.c | 168 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in legacy_init()
175 wrmsr64(MSR_IA32_APIC_BASE, ((uint64_t)hi) << 32 | lo); in legacy_init()
176 wrmsr64(MSR_IA32_APIC_BASE, ((uint64_t)hi) << 32 | lo | MSR_IA32_APIC_BASE_ENABLE); in legacy_init()
228 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in x2apic_init()
231 wrmsr(MSR_IA32_APIC_BASE, lo, hi); in x2apic_init()
292 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_safe_apicid()
315 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_reinit()
328 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_reinit()
374 if (rdmsr64(MSR_IA32_APIC_BASE) & MSR_IA32_APIC_BASE_BSP) { in lapic_init_slave()
389 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_init()
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| H A D | proc_reg.h | 557 #define MSR_IA32_APIC_BASE 0x1b macro
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