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Searched refs:fpcr (Results 1 – 6 of 6) sorted by relevance

/xnu-8019.80.24/tests/
H A Dfp_exception.c89 uint64_t fpcr = __builtin_arm_rsr64("FPCR");
91 if (fpcr != FPCR_INIT) {
92 T_FAIL("The floating point control register has a non-default value" "%" PRIx64, fpcr);
96 uint64_t fpcr_divexc = fpcr | FPCR_DIV_EXC;
/xnu-8019.80.24/osfmk/mach/arm/
H A Dthread_status.h946 uint32_t fpcr; member
960 uint32_t fpcr; member
980 uint32_t fpcr; member
H A D_structs.h503 uint32_t fpcr; variable
510 uint32_t fpcr; variable
/xnu-8019.80.24/osfmk/arm64/
H A Dgenassym.c214 DECLARE("NS64_FPCR", offsetof(arm_context_t, ns.ns_64.fpcr)); in main()
242 DECLARE("NS64_KERNEL_FPCR", offsetof(arm_kernel_context_t, ns.fpcr)); in main()
H A Dstatus.c923 thread->machine.uNeon->ns_64.fpcr = FPCR_DEFAULT; in machine_thread_switch_addrmode()
934 thread->machine.uNeon->ns_32.fpcr = FPCR_DEFAULT_32; in machine_thread_switch_addrmode()
1339 context->ns.ns_64.fpcr = FPCR_DEFAULT; in machine_thread_state_initialize()
1341 context->ns.ns_32.fpcr = FPCR_DEFAULT_32; in machine_thread_state_initialize()
H A Dpcb.c396 neon_savestate->fpcr = FPCR_DEFAULT; in machine_stack_attach()