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/xnu-12377.81.4/osfmk/arm64/
H A Dmachine_routines_asm.s189 mov x5, #(FPSR_MASK & 0xFFFF0000)
190 orr x0, x4, x5
195 mov x5, #(FPCR_MASK & 0xFFFF0000)
196 orr x0, x4, x5
215 mov x5, #(FPSR_MASK & 0xFFFF0000)
216 orr x1, x4, x5
219 mov x5, #(FPCR_MASK & 0xFFFF0000)
220 orr x2, x4, x5
547 ldp x5, x6, [\src, #16]
548 stp x5, x6, [\dst, #16]
[all …]
H A Dstrncmp.s81 subs x3, x4, x5 // if the are not equal
155 subs x3, x4, x5 // if the are not equal
182 sub x0, x4, x5
195 add x5, x1, x3
211 mov x1, x5
244 sub x0, x4, x5
254 subs x3, x4, x5 // if the are not equal
H A Dbcopy.s117 sub x5, x3, x0 // bytes between original dst and aligned dst
118 add x1, x1, x5 // update src pointer
140 sub x2, x2, x5 // update length
246 sub x5, x4, x3 // buffer. Here we use dst-1 & -32 instead,
247 sub x1, x1, x5 // because we are going backwards.
248 sub x2, x2, x5
H A Dmachine_routines_asm.h74 mov \tmp5, x5
92 mov x5, x17
97 mov x17, x5
111 mov x5, \tmp5
H A Dlocore.s112 mov x5, #0
148 and x5, x2, x3
149 cmp x4, x5
158 and x5, x2, x3
159 cmp x4, x5
940 mov x5, #0
1635 mrs x5, FPCR
1636 CMSR FPCR, x5, x4, 1
1638 mov x5, #0
1705 orr x5, x5, #(1 << BIT_ISB_PENDING)
[all …]
H A Dlz4_encode_arm64.s50 #define hash_table x5
106 add x20, x5, x20, lsl #3 // hash_table_entry ptr (hash + 8*index)
115 add x21, x5, x21, lsl #3 // hash_table_entry ptr (hash + 8*index)
136 add x20, x5, x20, lsl #3 // hash_table_entry ptr (hash + 8*index)
157 add x20, x5, x20, lsl #3 // hash_table_entry ptr (hash + 8*index)
178 add x20, x5, x20, lsl #3 // hash_table_entry ptr (hash + 8*index)
H A Dcswitch.s314 LOAD_KERN_STACK_TOP dst=x5, src=x4, tmp=x6
315 mov sp, x5 // Set stack pointer
318 set_process_dependent_keys_and_sync_context x4, x5, x6, x7, w20
359 set_process_dependent_keys_and_sync_context x2, x3, x4, x5, w6
H A Dstart.s171 SET_PIO_ONLY_REGISTERS x21, x2, x3, x4, x5, x6
615 lsr x5, x24, #(ARM_TT_L2_SHIFT)
617 create_bootstrap_mapping x0, x4, x5, x1, x2, x6, x10, x11, x12, x13
620 lsr x5, x24, #(ARM_TT_L2_SHIFT)
621 create_bootstrap_mapping x14, x15, x5, x3, x2, x9, x10, x11, x12, x13
H A Dexception_asm.h175 stp x4, x5, [x0, SS64_X4]
241 mov x5, x17
247 mov x17, x5
H A Dlz4_decode_arm64.s58 #define n_matches x5
H A DWKdmDecompress_4k.s114 #define rcx x5
H A DWKdmDecompress_16k.s114 #define rcx x5
H A DWKdmCompress_16k.s191 #define dictionary x5
H A DWKdmCompress_4k.s189 #define dictionary x5
/xnu-12377.81.4/osfmk/corecrypto/
H A Dccmode_gcm_gf_mult.c47 cc_dunit x1, x2, x3, x4, x5; in bmul64() local
65 x5 = x & m5; in bmul64()
68 z = (x1 * y1) ^ (x2 * y5) ^ (x3 * y4) ^ (x4 * y3) ^ (x5 * y2); in bmul64()
70 z = (x1 * y2) ^ (x2 * y1) ^ (x3 * y5) ^ (x4 * y4) ^ (x5 * y3); in bmul64()
72 z = (x1 * y3) ^ (x2 * y2) ^ (x3 * y1) ^ (x4 * y5) ^ (x5 * y4); in bmul64()
74 z = (x1 * y4) ^ (x2 * y3) ^ (x3 * y2) ^ (x4 * y1) ^ (x5 * y5); in bmul64()
76 z = (x1 * y5) ^ (x2 * y4) ^ (x3 * y3) ^ (x4 * y2) ^ (x5 * y1); in bmul64()
/xnu-12377.81.4/libsyscall/custom/
H A D__syscall.s67 ldp x5, x6, [sp, #32]
/xnu-12377.81.4/tools/lldbmacros/core/
H A Doperating_system.py73 self.x5 = 0
109 return struct.pack('34QII', self.x0, self.x1, self.x2, self.x3, self.x4, self.x5,
127 self.x5 = saved_state.GetChildMemberWithName('x').GetChildAtIndex(5).GetValueAsUnsigned()
/xnu-12377.81.4/bsd/dev/arm64/
H A Dcpu_copy_in_cksum.s73 #define need_swap x5
H A Dcpu_in_cksum.s104 #define started_on_odd x5
/xnu-12377.81.4/libsyscall/mach/
H A Derr_libkern.sub67 "(libkern/kext) invalid argument", /* 0x5 */
/xnu-12377.81.4/bsd/kern/code_signing/
H A Dtxm.c265 registers->x5 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
275 registers->x5 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()
284 registers->x5 = va_arg(args, uintptr_t); in txm_kernel_call_registers_setup()