Home
last modified time | relevance | path

Searched refs:x1 (Results 1 – 25 of 46) sorted by relevance

12

/xnu-12377.81.4/osfmk/arm64/
H A Dbzero.s55 mov x2, x1
56 eor x1, x1, x1
69 stp x1, x1, [x0]
70 stp x1, x1, [x0, #16]
71 stp x1, x1, [x0, #32]
72 stp x1, x1, [x0, #48]
84 stp x1, x1, [x3] // and store 64 bytes to reach end of buffer.
85 stp x1, x1, [x3, #16]
86 stp x1, x1, [x3, #32]
87 stp x1, x1, [x3, #48]
[all …]
H A Dbcopy.s75 mov x0, x1
76 mov x1, x3
96 sub x3, x0, x1
115 ldp x12,x13,[x1]
116 ldp x14,x15,[x1, #16]
118 add x1, x1, x5 // update src pointer
137 ldp x8, x9, [x1]
138 ldp x10,x11,[x1, #16]
139 add x1, x1, #32
160 ldnp x8, x9, [x1]
[all …]
H A Dmachine_routines_asm.s113 mov x1, #1
116 LOAD_CPU_JOP_KEY x0, x1
128 mov x2, x1
130 mov x1, #0
187 mrs x1, FPSR // Grab FPSR
191 and x1, x1, x0 // Be paranoid, and clear bits we expect to
199 orr x0, x1, x2 // OR them to get FPSCR equivalent state
216 orr x1, x4, x5
217 and x1, x1, x0 // Clear the bits that don't apply to FPSR
222 msr FPSR, x1 // Write FPCR
[all …]
H A Dcaches_asm.s69 add x1, x1, x2
70 sub x1, x1, #1
71 lsr x1, x1, #MMU_I_CLINE // Set cache line counter
75 subs x1, x1, #1 // Decrementer cache line counter
147 mov x1, #0
149 CACHE_AT_LEVEL x2, x1, x3
153 mov x2, x1
155 lsl x2, x1, #1 // level field for cisw/csw, bits 1:3
167 add x1, x1, #1
168 cmp x1, x0
[all …]
H A Dlocore.s108 mov x1, #0
139 ldr x1, [x0, TH_EXPECTED_FAULT_HANDLER]
141 cbz x1, Lbegin_panic_lockdown_real_\@
144 ldr x1, [x0, TH_EXPECTED_FAULT_PC]
147 and x4, x1, x3
152 cbnz x1, Lbegin_panic_lockdown_real_\@
155 ldr x1, [x0, TH_EXPECTED_FAULT_ADDR]
157 and x4, x1, x3
180 adrp x1, EXT(xnu_post_panic_lockdown_did_fire)@page
181 strb w0, [x1, EXT(xnu_post_panic_lockdown_did_fire)@pageoff]
[all …]
H A Dstart.s47 mov x1, lr
49 mov lr, x1
57 mov x0, x1
58 mov x1, lr
60 mov lr, x1
62 msr TCR_EL1, x1
68 mov x1, lr
70 mov lr, x1
78 mov x1, lr
85 mov lr, x1
[all …]
H A Dstrnlen.s76 tst x1, x1
102 add x1, x1, x4
113 subs x1, x1, #16
119 add x1, x1, #16
120 add x0, x0, x1
137 cmp x1, x3 // if NUL occurs before maxlen bytes
138 csel x1, x1, x3, cc // return strlen, else maxlen
139 add x0, x0, x1
150 and x1, x0, #-16
151 ldr q0, [x1]
[all …]
H A Dalternate_debugger_asm.s43 mov x1, x3
44 blr x1 // (*putc_address)('\n');
46 ldr x1, [sp, #0x8]
47 blr x1 // (*putc_address)('>');
49 ldr x1, [sp, #0x8]
50 blr x1 // (*putc_address)('M');
52 ldr x1, [sp, #0x8]
53 blr x1 // (*putc_address)('T');
55 ldr x1, [sp, #0x8]
56 blr x1 // (*putc_address)('<');
H A Dmemcmp_zero.s78 cmp x1, #64
91 sub x1, x1, x2 // update length
92 subs x1, x1, #64 // check length > 64
103 subs x1, x1, #64 // check length > 64
111 add x0, x0, x1
129 cbz x1, L_sizeIsZero // return zero if length is zero
134 subs x1, x1, #8 // update length
H A Dstrncmp.s80 ldrb w5, [x1],#1 // load byte from src2
102 ldrb w5, [x1]
112 tst x1, #(kVectorSize-1)
125 neg x7, x1
140 ldr q1, [x1],#(kVectorSize)
154 ldrb w5, [x1],#1 // load byte from src2
181 ldrb w5, [x1, #-1]
195 add x5, x1, x3
200 ldr q1, [x1],#(kVectorSize)
211 mov x1, x5
[all …]
H A Darm64_hypercall.c54 hvc_5(uint64_t *x0, uint64_t *x1, uint64_t *x2, uint64_t *x3, uint64_t *x4) in hvc_5() argument
69 [o1] "=m" (*x1), in hvc_5()
74 [i1] "r" (*x1), in hvc_5()
84 hvc_2(uint64_t *x0, uint64_t *x1) in hvc_2() argument
87 return hvc_5(x0, x1, &x, &x, &x); in hvc_2()
258 uint64_t x1 = ml_get_abstime_offset(); in hvg_hcall_get_mabs_offset() local
260 if (!hvc_2(&fn, &x1)) { in hvg_hcall_get_mabs_offset()
263 *mabs_offset = x1; in hvg_hcall_get_mabs_offset()
278 uint64_t x1 = phys_id; in hvg_hc_kick_cpu() local
279 __assert_only const bool success = hvc_2(&x0, &x1); in hvg_hc_kick_cpu()
[all …]
H A Dcswitch.s290 set_thread_registers x0, x1, x2
291 LOAD_KERN_STACK_TOP dst=x1, src=x0, tmp=x2 // Get top of kernel stack
292 load_general_registers x1, 2
293 set_process_dependent_keys_and_sync_context x0, x1, x2, x3, w4
321 mov x21, x1 //continuation parameter
330 mov x1, x22 // Set the wait result arg
352 cbnz x1, Lswitch_threads // Skip saving old state if blocking on continuation
391 LOAD_KERN_STACK_TOP dst=x1, src=x0, tmp=x2 // Get the top of the kernel stack
392 save_general_registers x1, 2
393 LOAD_INT_STACK_THREAD dst=x2, src=x0, tmp=x1
[all …]
H A Dexception_asm.h224 mov x21, x1
237 mov x1, x22
250 mov x1, x21
291 mrs x1, TPIDR_EL1
292 LOAD_INT_STACK_THREAD dst=x1, src=x1, tmp=\tmp
293 mov sp, x1 // Set the stack pointer to the interrupt stack
H A Dsmccc_asm.h43 stp x0, x1, [sp, #- 16]!
55 ldp x0, x1, [sp], #16
H A Dplatform_tests_asm.s158 mov x1, #0
159 mov sp, x1
171 ldr x1, [x0], #16
173 mov sp, x1
H A Dmachine_routines_asm.h67 ldr x1, [x0, SS64_PC]
88 mov \tmp1, x1
94 mov x1, \tmp1
H A Dpac_asm.h112 mov x1, \new_jop_key
133 mov x1, \new_rop_key
/xnu-12377.81.4/osfmk/arm64/sptm/
H A Dstart_sptm.s91 mov x0, x1
136 mov x26, x1
168 mov x1, x27
204 adrp x1, EXT(CpuDataEntries)@page
205 add x1, x1, EXT(CpuDataEntries)@pageoff
212 add x3, x1, x3
220 ldr x21, [x1, CPU_DATA_VADDR]
229 add x1, x1, x19
230 cmp x1, x3
248 mov x1, x20
/xnu-12377.81.4/osfmk/arm/commpage/
H A Dcommpage_asm.s150 stp x0, x1, [sp, #-16]!
159 ldp x0, x1, [sp], #16
287 str x1, [x0] // Set head to new element
291 str x1, [x10, x2] // Set old tail -> offset = new elem
294 str x1, [x0, #8] // Set tail = new elem
337 ldr x11, [x10, x1] // get ptr to new head
344 str xzr, [x10, x1] // zero the link in the old head
374 str xzr, [x1, x2] // Zero the forward link in the new element
483 stp x0, x1, [sp, #-16]!
493 ldp x0, x1, [sp], #16
/xnu-12377.81.4/osfmk/corecrypto/
H A Dccmode_gcm_gf_mult.c47 cc_dunit x1, x2, x3, x4, x5; in bmul64() local
57 x1 = x & m1; in bmul64()
68 z = (x1 * y1) ^ (x2 * y5) ^ (x3 * y4) ^ (x4 * y3) ^ (x5 * y2); in bmul64()
70 z = (x1 * y2) ^ (x2 * y1) ^ (x3 * y5) ^ (x4 * y4) ^ (x5 * y3); in bmul64()
72 z = (x1 * y3) ^ (x2 * y2) ^ (x3 * y1) ^ (x4 * y5) ^ (x5 * y4); in bmul64()
74 z = (x1 * y4) ^ (x2 * y3) ^ (x3 * y2) ^ (x4 * y1) ^ (x5 * y5); in bmul64()
76 z = (x1 * y5) ^ (x2 * y4) ^ (x3 * y3) ^ (x4 * y2) ^ (x5 * y1); in bmul64()
123 uint32_t x0, x1, x2, x3; in bmul32() local
133 x1 = x & m2; in bmul32()
141 z0 = ((uint64_t)x0 * y0) ^ ((uint64_t)x1 * y3) ^ ((uint64_t)x2 * y2) ^ ((uint64_t)x3 * y1); in bmul32()
[all …]
/xnu-12377.81.4/libsyscall/wrappers/
H A Dvarargs_wrappers.s81 ldp x1, x2, [fp, #16]
98 ldp x1, x2, [fp, #16]
132 ldp x1, x2, [fp, #16]
H A Dmach_absolute_time.s229 ldr x1, [x3] // Load the offset
232 cmp x1, x2 // Compare our offset values...
234 add x0, x0, x1 // Construct mach_absolute_time
/xnu-12377.81.4/osfmk/kern/
H A Darithmetic_128.h70 uint32_t x1 = (uint32_t)(x >> 32); in mul64x64() local
82 prod->high = (uint64_t)x1 * (uint64_t)y1; in mul64x64()
84 add.low = (uint64_t)x1 * (uint64_t)y2; in mul64x64()
/xnu-12377.81.4/san/memory/
H A Dkasan-test-arm64.s23 add x1, sp, #0 /* can't STP from sp */
30 stp fp, x1, [x0, JMP_fp_sp]
54 mov x0, x1
/xnu-12377.81.4/libsyscall/custom/
H A D__syscall.s65 ldp x1, x2, [sp]

12