xref: /xnu-12377.81.4/pexpert/pexpert/arm64/apple_arm64_common.h (revision 043036a2b3718f7f0be807e2870f8f47d3fa0796)
1 /*
2  * Copyright (c) 2019 Apple Inc. All rights reserved.
3  *
4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5  *
6  * This file contains Original Code and/or Modifications of Original Code
7  * as defined in and that are subject to the Apple Public Source License
8  * Version 2.0 (the 'License'). You may not use this file except in
9  * compliance with the License. The rights granted to you under the License
10  * may not be used to create, or enable the creation or redistribution of,
11  * unlawful or unlicensed copies of an Apple operating system, or to
12  * circumvent, violate, or enable the circumvention or violation of, any
13  * terms of an Apple operating system software license agreement.
14  *
15  * Please obtain a copy of the License at
16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
17  *
18  * The Original Code and all software distributed under the License are
19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23  * Please see the License for the specific language governing rights and
24  * limitations under the License.
25  *
26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27  */
28 
29 #ifndef _PEXPERT_ARM64_APPLE_ARM64_COMMON_H
30 #define _PEXPERT_ARM64_APPLE_ARM64_COMMON_H
31 
32 #define __ARM_ARCH__                         8
33 #define __ARM_VMSA__                         8
34 #define __ARM_VFP__                          4
35 #define __ARM_COHERENT_CACHE__               1
36 #define __ARM_COHERENT_IO__                  1
37 #define __ARM_IC_NOALIAS_ICACHE__            1
38 #define __ARM_DEBUG__                        7
39 #define __ARM_ENABLE_SWAP__                  1
40 #define __ARM_V8_CRYPTO_EXTENSIONS__         1
41 
42 /*
43  * If we're using a parameterized PMAP + SPTM, we can enable kernel-only large
44  * memory. Otherwise, large memory is either enabled for both user and kernel or
45  * neither.
46  */
47 #if ARM_PARAMETERIZED_PMAP && CONFIG_SPTM
48 #define HAS_ARM_INDEPENDENT_TNSZ 1
49 #endif
50 
51 #if !ARM_LARGE_MEMORY
52 #define __ARM64_PMAP_SUBPAGE_L1__            1
53 #define __ARM64_PMAP_KERN_SUBPAGE_L1__       1
54 #elif ARM_LARGE_MEMORY_KERNONLY && HAS_ARM_INDEPENDENT_TNSZ
55 /* Kernel-only large memory */
56 #define __ARM64_PMAP_SUBPAGE_L1__            1
57 #endif /* ARM_LARGE_MEMORY */
58 
59 #define APPLE_ARM64_ARCH_FAMILY              1
60 #define ARM_ARCH_TIMER
61 
62 #if defined(HAS_CTRR3)
63 #define KERNEL_INTEGRITY_CTRR                1
64 #define KERNEL_CTRR_VERSION                  3
65 #elif defined(HAS_CTRR)
66 #define KERNEL_INTEGRITY_CTRR                1
67 #define KERNEL_CTRR_VERSION                  2
68 #elif defined(HAS_PARAVIRTUALIZED_CTRR)
69 #define KERNEL_INTEGRITY_PV_CTRR             1
70 #elif defined(HAS_KTRR)
71 #define KERNEL_INTEGRITY_KTRR                1
72 #elif defined(MONITOR)
73 #define KERNEL_INTEGRITY_WT                  1
74 #endif
75 
76 #if defined(CPU_HAS_APPLE_PAC) && defined(__arm64e__)
77 #define HAS_APPLE_PAC                        1 /* Has Apple ARMv8.3a pointer authentication */
78 #endif
79 
80 #include <pexpert/arm64/apple_arm64_regs.h>
81 #include <pexpert/arm64/apple_arm64_cpu.h>
82 #include <pexpert/arm64/AIC.h>
83 
84 #ifndef ASSEMBLER
85 #include <pexpert/arm/apple_uart_regs.h>
86 
87 #if !defined(APPLETYPHOON) && !defined(APPLETWISTER) && !defined(APPLEVIRTUALPLATFORM)
88 #include <pexpert/arm/dockchannel.h>
89 
90 // AOP_CLOCK frequency * 30 ms
91 #define DOCKCHANNEL_DRAIN_PERIOD             (192000000 * 0.03)
92 #endif
93 
94 #endif /* ASSEMBLER */
95 
96 /*
97  * See arm64/proc_reg.h for how these values are constructed from the MIDR.
98  * The chip-revision property from EDT also uses these constants.
99  */
100 #define CPU_VERSION_A0                       0x00
101 #define CPU_VERSION_A1                       0x01
102 #define CPU_VERSION_B0                       0x10
103 #define CPU_VERSION_B1                       0x11
104 #define CPU_VERSION_C0                       0x20
105 #define CPU_VERSION_UNKNOWN                  0xff
106 
107 
108 /*
109  * Conservatively assume that BTI will be enforced.
110  * Individual SoCs and kernel configurations may have different behavior.
111  */
112 #define BTI_ENFORCED 1
113 
114 #endif /* !_PEXPERT_ARM64_APPLE_ARM64_COMMON_H */
115