Searched refs:parent_entry (Results 1 – 7 of 7) sorted by relevance
162 vm_named_entry_t parent_entry) in mach_make_memory_entry_mem_only() argument195 if (use_data_addr || use_4K_compat || parent_entry == NULL) { in mach_make_memory_entry_mem_only()200 parent_is_object = parent_entry->is_object; in mach_make_memory_entry_mem_only()206 if ((access != parent_entry->access) && in mach_make_memory_entry_mem_only()207 !(parent_entry->protection & VM_PROT_WRITE)) { in mach_make_memory_entry_mem_only()212 object = vm_named_entry_to_vm_object(parent_entry); in mach_make_memory_entry_mem_only()229 parent_entry->access = access; in mach_make_memory_entry_mem_only()623 vm_named_entry_t parent_entry) in mach_make_memory_entry_share() argument728 parent_entry != NULL && in mach_make_memory_entry_share()729 parent_entry->is_object) { in mach_make_memory_entry_share()[all …]
626 ipc_port_t parent_entry) in vm32_mach_make_memory_entry() argument633 mo_offset, permission, object_handle, parent_entry); in vm32_mach_make_memory_entry()
2179 vm_named_entry_t parent_entry; in vm_memory_entry_parent_submap_tests() local2191 parent_entry = mach_memory_entry_from_port(parent_handle); in vm_memory_entry_parent_submap_tests()2192 assert(parent_entry->is_sub_map); in vm_memory_entry_parent_submap_tests()2197 entry_size = parent_entry->size; in vm_memory_entry_parent_submap_tests()
490 KXLDVTableEntry *parent_entry = NULL; in kxld_vtable_patch() local515 parent_entry = kxld_array_get_item(&super_vtable->entries, i); in kxld_vtable_patch()532 if (!parent_entry->patched.name) { in kxld_vtable_patch()556 parent_entry->patched.name)) { in kxld_vtable_patch()565 require_action(!kxld_sym_name_is_padslot(parent_entry->patched.name), in kxld_vtable_patch()625 parent_entry->patched.name); in kxld_vtable_patch()627 rval = kxld_object_add_symbol(object, parent_entry->patched.name, in kxld_vtable_patch()628 parent_entry->patched.addr, &sym); in kxld_vtable_patch()
204 parent_entry :mem_entry_name_port_t);260 parent_entry :mem_entry_name_port_t);
368 parent_entry :mem_entry_name_port_t);445 parent_entry :mem_entry_name_port_t);
1177 parent_entry = None1183 parent_entry = CastIOKitClass(ca.array[0], 'IORegistryEntry *')1184 return parent_entry