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Searched refs:CPUID_REG_RCX (Results 1 – 2 of 2) sorted by relevance

/xnu-11215.81.4/EXTERNAL_HEADERS/corecrypto/
H A Dcc_runtime_config.h51 #define CPUID_REG_RCX 2 macro
65 registers[CPUID_REG_RCX] = subleaf; in _cpu_supports()
66 …puid(&registers[CPUID_REG_RAX], &registers[CPUID_REG_RBX], &registers[CPUID_REG_RCX], &registers[C… in _cpu_supports()
73 #define CC_HAS_AESNI() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AES)
74 #define CC_HAS_SupplementalSSE3() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_SSE3)
75 #define CC_HAS_AVX1() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AVX1)
79 #define CC_HAS_RDRAND() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_RDRAND)
/xnu-11215.81.4/osfmk/corecrypto/
H A Dcc_runtime_config.h75 #define CPUID_REG_RCX 2 macro
91 registers[CPUID_REG_RCX] = subleaf; in _cpu_supports()
92 …puid(&registers[CPUID_REG_RAX], &registers[CPUID_REG_RBX], &registers[CPUID_REG_RCX], &registers[C… in _cpu_supports()
99 #define CC_HAS_AESNI() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AES)
100 #define CC_HAS_SupplementalSSE3() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_SSE3)
101 #define CC_HAS_AVX1() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_AVX1)
105 #define CC_HAS_RDRAND() _cpu_supports(1, 0, CPUID_REG_RCX, CPUID_FEATURE_RDRAND)