Searched refs:mdscr_el1 (Results 1 – 5 of 5) sorted by relevance
145 thread_state->mdscr_el1 |= MDSCR_SS; in thread_setsinglestep()147 thread_state->mdscr_el1 &= ~MDSCR_SS; in thread_setsinglestep()
1339 …thread_state->mdscr_el1 = 0ULL; // Legacy customers issuing ARM_DEBUG_STATE dont drive sin… in machine_thread_set_state()1364 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1391 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1392 thread_state->mdscr_el1 |= MDSCR_SS; in machine_thread_set_state()1394 thread_state->mdscr_el1 &= ~MDSCR_SS; in machine_thread_set_state()1441 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1467 if (state->mdscr_el1 & MDSCR_SS) { in machine_thread_set_state()1468 thread_state->mdscr_el1 |= MDSCR_SS; in machine_thread_set_state()1470 thread_state->mdscr_el1 &= ~MDSCR_SS; in machine_thread_set_state()
790 if (debug_state->uds.ds32.mdscr_el1 & 0x1) { in arm_debug_set32()992 if (debug_state->uds.ds64.mdscr_el1 & 0x1) { in arm_debug_set64()
1517 thread->machine.DebugData->uds.ds64.mdscr_el1 &= ~0x1; in handle_sw_step_debug()
686 __uint64_t mdscr_el1; /* Bit 0 is SS (Hardware Single Step) */ variable696 __uint64_t mdscr_el1; /* Bit 0 is SS (Hardware Single Step) */ variable