Searched refs:MSR (Results 1 – 3 of 3) sorted by relevance
220 MSR("S3_5_C15_C0_0", x); in ml_cpu_signal_type()224 MSR("S3_5_C15_C0_1", x); in ml_cpu_signal_type()228 MSR("S3_5_C15_C0_1", x); in ml_cpu_signal_type()280 MSR("S3_5_C15_C3_1", abstime); in ml_cpu_signal_deferred_adjust_timer()
2723 #define MSR(reg, src) __asm__ volatile ("msr " reg ", %0" :: "r" (src)) macro
2192 MSR("S3_5_C15_C1_1", ARM64_IPISR_IPI_PENDING); in sleh_fiq()