Searched refs:MSR_IA32_APIC_BASE (Results 1 – 2 of 2) sorted by relevance
| /xnu-10002.61.3/osfmk/i386/ |
| H A D | lapic_native.c | 155 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in legacy_init() 162 wrmsr64(MSR_IA32_APIC_BASE, ((uint64_t)hi) << 32 | lo); in legacy_init() 163 wrmsr64(MSR_IA32_APIC_BASE, ((uint64_t)hi) << 32 | lo | MSR_IA32_APIC_BASE_ENABLE); in legacy_init() 215 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in x2apic_init() 218 wrmsr(MSR_IA32_APIC_BASE, lo, hi); in x2apic_init() 279 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_safe_apicid() 302 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_reinit() 315 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_reinit() 361 if (rdmsr64(MSR_IA32_APIC_BASE) & MSR_IA32_APIC_BASE_BSP) { in lapic_init_slave() 376 rdmsr(MSR_IA32_APIC_BASE, lo, hi); in lapic_init() [all …]
|
| H A D | proc_reg.h | 557 #define MSR_IA32_APIC_BASE 0x1b macro
|