1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 #include <sys/fasttrap_isa.h>
28 #include <sys/fasttrap_impl.h>
29 #include <sys/dtrace.h>
30 #include <sys/dtrace_impl.h>
31 extern dtrace_id_t dtrace_probeid_error;
32
33 #include "fasttrap_regset.h"
34
35 #include <sys/dtrace_ptss.h>
36 #include <kern/debug.h>
37
38 #include <machine/pal_routines.h>
39
40 /* Solaris proc_t is the struct. Darwin's proc_t is a pointer to it. */
41 #define proc_t struct proc /* Steer clear of the Darwin typedef for proc_t */
42
43 /*
44 * Lossless User-Land Tracing on x86
45 * ---------------------------------
46 *
47 * The execution of most instructions is not dependent on the address; for
48 * these instructions it is sufficient to copy them into the user process's
49 * address space and execute them. To effectively single-step an instruction
50 * in user-land, we copy out the following sequence of instructions to scratch
51 * space in the user thread's ulwp_t structure.
52 *
53 * We then set the program counter (%eip or %rip) to point to this scratch
54 * space. Once execution resumes, the original instruction is executed and
55 * then control flow is redirected to what was originally the subsequent
56 * instruction. If the kernel attemps to deliver a signal while single-
57 * stepping, the signal is deferred and the program counter is moved into the
58 * second sequence of instructions. The second sequence ends in a trap into
59 * the kernel where the deferred signal is then properly handled and delivered.
60 *
61 * For instructions whose execute is position dependent, we perform simple
62 * emulation. These instructions are limited to control transfer
63 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
64 * of %rip-relative addressing that means that almost any instruction can be
65 * position dependent. For all the details on how we emulate generic
66 * instructions included %rip-relative instructions, see the code in
67 * fasttrap_pid_probe() below where we handle instructions of type
68 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
69 */
70
71 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3)
72 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7)
73 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7)
74 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
75
76 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3)
77 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7)
78 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7)
79
80 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1)
81 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1)
82 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1)
83 #define FASTTRAP_REX_B(rex) ((rex) & 1)
84 #define FASTTRAP_REX(w, r, x, b) \
85 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
86
87 /*
88 * Single-byte op-codes.
89 */
90 #define FASTTRAP_PUSHL_EBP 0x55
91
92 #define FASTTRAP_JO 0x70
93 #define FASTTRAP_JNO 0x71
94 #define FASTTRAP_JB 0x72
95 #define FASTTRAP_JAE 0x73
96 #define FASTTRAP_JE 0x74
97 #define FASTTRAP_JNE 0x75
98 #define FASTTRAP_JBE 0x76
99 #define FASTTRAP_JA 0x77
100 #define FASTTRAP_JS 0x78
101 #define FASTTRAP_JNS 0x79
102 #define FASTTRAP_JP 0x7a
103 #define FASTTRAP_JNP 0x7b
104 #define FASTTRAP_JL 0x7c
105 #define FASTTRAP_JGE 0x7d
106 #define FASTTRAP_JLE 0x7e
107 #define FASTTRAP_JG 0x7f
108
109 #define FASTTRAP_NOP 0x90
110
111 #define FASTTRAP_MOV_EAX 0xb8
112 #define FASTTRAP_MOV_ECX 0xb9
113
114 #define FASTTRAP_RET16 0xc2
115 #define FASTTRAP_RET 0xc3
116
117 #define FASTTRAP_LOOPNZ 0xe0
118 #define FASTTRAP_LOOPZ 0xe1
119 #define FASTTRAP_LOOP 0xe2
120 #define FASTTRAP_JCXZ 0xe3
121
122 #define FASTTRAP_CALL 0xe8
123 #define FASTTRAP_JMP32 0xe9
124 #define FASTTRAP_JMP8 0xeb
125
126 #define FASTTRAP_INT3 0xcc
127 #define FASTTRAP_INT 0xcd
128
129 #define FASTTRAP_2_BYTE_OP 0x0f
130 #define FASTTRAP_GROUP5_OP 0xff
131
132 /*
133 * Two-byte op-codes (second byte only).
134 */
135 #define FASTTRAP_0F_JO 0x80
136 #define FASTTRAP_0F_JNO 0x81
137 #define FASTTRAP_0F_JB 0x82
138 #define FASTTRAP_0F_JAE 0x83
139 #define FASTTRAP_0F_JE 0x84
140 #define FASTTRAP_0F_JNE 0x85
141 #define FASTTRAP_0F_JBE 0x86
142 #define FASTTRAP_0F_JA 0x87
143 #define FASTTRAP_0F_JS 0x88
144 #define FASTTRAP_0F_JNS 0x89
145 #define FASTTRAP_0F_JP 0x8a
146 #define FASTTRAP_0F_JNP 0x8b
147 #define FASTTRAP_0F_JL 0x8c
148 #define FASTTRAP_0F_JGE 0x8d
149 #define FASTTRAP_0F_JLE 0x8e
150 #define FASTTRAP_0F_JG 0x8f
151
152 #define FASTTRAP_EFLAGS_OF 0x800
153 #define FASTTRAP_EFLAGS_DF 0x400
154 #define FASTTRAP_EFLAGS_SF 0x080
155 #define FASTTRAP_EFLAGS_ZF 0x040
156 #define FASTTRAP_EFLAGS_AF 0x010
157 #define FASTTRAP_EFLAGS_PF 0x004
158 #define FASTTRAP_EFLAGS_CF 0x001
159
160 /*
161 * Instruction prefixes.
162 */
163 #define FASTTRAP_PREFIX_OPERAND 0x66
164 #define FASTTRAP_PREFIX_ADDRESS 0x67
165 #define FASTTRAP_PREFIX_CS 0x2E
166 #define FASTTRAP_PREFIX_DS 0x3E
167 #define FASTTRAP_PREFIX_ES 0x26
168 #define FASTTRAP_PREFIX_FS 0x64
169 #define FASTTRAP_PREFIX_GS 0x65
170 #define FASTTRAP_PREFIX_SS 0x36
171 #define FASTTRAP_PREFIX_LOCK 0xF0
172 #define FASTTRAP_PREFIX_REP 0xF3
173 #define FASTTRAP_PREFIX_REPNE 0xF2
174
175 #define FASTTRAP_NOREG 0xff
176
177 /*
178 * Map between instruction register encodings and the kernel constants which
179 * correspond to indicies into struct regs.
180 */
181
182 /*
183 * APPLE NOTE: We are cheating here. The regmap is used to decode which register
184 * a given instruction is trying to reference. OS X does not have extended registers
185 * for 32 bit apps, but the *order* is the same. So for 32 bit state, we will return:
186 *
187 * REG_RAX -> EAX
188 * REG_RCX -> ECX
189 * REG_RDX -> EDX
190 * REG_RBX -> EBX
191 * REG_RSP -> UESP
192 * REG_RBP -> EBP
193 * REG_RSI -> ESI
194 * REG_RDI -> EDI
195 *
196 * The fasttrap_getreg function knows how to make the correct transformation.
197 */
198 static const uint8_t regmap[16] = {
199 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
200 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
201 };
202
203 static user_addr_t fasttrap_getreg(x86_saved_state_t *, uint_t);
204
205 static uint64_t
fasttrap_anarg(x86_saved_state_t * regs,int function_entry,int argno)206 fasttrap_anarg(x86_saved_state_t *regs, int function_entry, int argno)
207 {
208 uint64_t value;
209 int shift = function_entry ? 1 : 0;
210
211 x86_saved_state64_t *regs64;
212 x86_saved_state32_t *regs32;
213 unsigned int p_model;
214
215 if (is_saved_state64(regs)) {
216 regs64 = saved_state64(regs);
217 regs32 = NULL;
218 p_model = DATAMODEL_LP64;
219 } else {
220 regs64 = NULL;
221 regs32 = saved_state32(regs);
222 p_model = DATAMODEL_ILP32;
223 }
224
225 if (p_model == DATAMODEL_LP64) {
226 user_addr_t stack;
227
228 /*
229 * In 64-bit mode, the first six arguments are stored in
230 * registers.
231 */
232 if (argno < 6)
233 return ((®s64->rdi)[argno]);
234
235 stack = regs64->isf.rsp + sizeof(uint64_t) * (argno - 6 + shift);
236 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
237 value = dtrace_fuword64(stack);
238 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
239 } else {
240 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
241 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
242 value = dtrace_fuword32((user_addr_t)(unsigned long)&stack[argno + shift]);
243 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
244 }
245
246 return (value);
247 }
248
249 /*ARGSUSED*/
250 int
fasttrap_tracepoint_init(proc_t * p,fasttrap_tracepoint_t * tp,user_addr_t pc,fasttrap_probe_type_t type)251 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, user_addr_t pc,
252 fasttrap_probe_type_t type)
253 {
254 #pragma unused(type)
255 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
256 size_t len = FASTTRAP_MAX_INSTR_SIZE;
257 size_t first = MIN(len, PAGE_SIZE - (pc & PAGE_MASK));
258 uint_t start = 0;
259 size_t size;
260 int rmindex;
261 uint8_t seg, rex = 0;
262 unsigned int p_model = (p->p_flag & P_LP64) ? DATAMODEL_LP64 : DATAMODEL_ILP32;
263
264 /*
265 * Read the instruction at the given address out of the process's
266 * address space. We don't have to worry about a debugger
267 * changing this instruction before we overwrite it with our trap
268 * instruction since P_PR_LOCK is set. Since instructions can span
269 * pages, we potentially read the instruction in two parts. If the
270 * second part fails, we just zero out that part of the instruction.
271 */
272 /*
273 * APPLE NOTE: Of course, we do not have a P_PR_LOCK, so this is racey...
274 */
275 if (uread(p, &instr[0], first, pc) != 0)
276 return (-1);
277 if (len > first &&
278 uread(p, &instr[first], len - first, pc + first) != 0) {
279 bzero(&instr[first], len - first);
280 len = first;
281 }
282
283 /*
284 * If the disassembly fails, then we have a malformed instruction.
285 */
286 if ((size = dtrace_instr_size_isa(instr, p_model, &rmindex)) <= 0)
287 return (-1);
288
289 /*
290 * Make sure the disassembler isn't completely broken.
291 */
292 ASSERT(-1 <= rmindex && rmindex < (int)size);
293
294 /*
295 * If the computed size is greater than the number of bytes read,
296 * then it was a malformed instruction possibly because it fell on a
297 * page boundary and the subsequent page was missing or because of
298 * some malicious user.
299 */
300 if (size > len)
301 return (-1);
302
303 tp->ftt_size = (uint8_t)size;
304 tp->ftt_segment = FASTTRAP_SEG_NONE;
305
306 /*
307 * Find the start of the instruction's opcode by processing any
308 * legacy prefixes.
309 */
310 for (;;) {
311 seg = 0;
312 switch (instr[start]) {
313 case FASTTRAP_PREFIX_SS:
314 seg++;
315 OS_FALLTHROUGH;
316 case FASTTRAP_PREFIX_GS:
317 seg++;
318 OS_FALLTHROUGH;
319 case FASTTRAP_PREFIX_FS:
320 seg++;
321 OS_FALLTHROUGH;
322 case FASTTRAP_PREFIX_ES:
323 seg++;
324 OS_FALLTHROUGH;
325 case FASTTRAP_PREFIX_DS:
326 seg++;
327 OS_FALLTHROUGH;
328 case FASTTRAP_PREFIX_CS:
329 seg++;
330 OS_FALLTHROUGH;
331 case FASTTRAP_PREFIX_OPERAND:
332 case FASTTRAP_PREFIX_ADDRESS:
333 case FASTTRAP_PREFIX_LOCK:
334 case FASTTRAP_PREFIX_REP:
335 case FASTTRAP_PREFIX_REPNE:
336 if (seg != 0) {
337 /*
338 * It's illegal for an instruction to specify
339 * two segment prefixes -- give up on this
340 * illegal instruction.
341 */
342 if (tp->ftt_segment != FASTTRAP_SEG_NONE)
343 return (-1);
344
345 tp->ftt_segment = seg;
346 }
347 start++;
348 continue;
349 }
350 break;
351 }
352
353 /*
354 * Identify the REX prefix on 64-bit processes.
355 */
356 if (p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
357 rex = instr[start++];
358
359 /*
360 * Now that we're pretty sure that the instruction is okay, copy the
361 * valid part to the tracepoint.
362 */
363 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
364
365 tp->ftt_type = FASTTRAP_T_COMMON;
366 if (instr[start] == FASTTRAP_2_BYTE_OP) {
367 switch (instr[start + 1]) {
368 case FASTTRAP_0F_JO:
369 case FASTTRAP_0F_JNO:
370 case FASTTRAP_0F_JB:
371 case FASTTRAP_0F_JAE:
372 case FASTTRAP_0F_JE:
373 case FASTTRAP_0F_JNE:
374 case FASTTRAP_0F_JBE:
375 case FASTTRAP_0F_JA:
376 case FASTTRAP_0F_JS:
377 case FASTTRAP_0F_JNS:
378 case FASTTRAP_0F_JP:
379 case FASTTRAP_0F_JNP:
380 case FASTTRAP_0F_JL:
381 case FASTTRAP_0F_JGE:
382 case FASTTRAP_0F_JLE:
383 case FASTTRAP_0F_JG:
384 tp->ftt_type = FASTTRAP_T_JCC;
385 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
386 tp->ftt_dest = pc + tp->ftt_size +
387 /* LINTED - alignment */
388 *(int32_t *)&instr[start + 2];
389 break;
390 }
391 } else if (instr[start] == FASTTRAP_GROUP5_OP) {
392 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
393 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
394 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
395
396 if (reg == 2 || reg == 4) {
397 uint_t i, sz;
398
399 if (reg == 2)
400 tp->ftt_type = FASTTRAP_T_CALL;
401 else
402 tp->ftt_type = FASTTRAP_T_JMP;
403
404 if (mod == 3)
405 tp->ftt_code = 2;
406 else
407 tp->ftt_code = 1;
408
409 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
410
411 /*
412 * See AMD x86-64 Architecture Programmer's Manual
413 * Volume 3, Section 1.2.7, Table 1-12, and
414 * Appendix A.3.1, Table A-15.
415 */
416 if (mod != 3 && rm == 4) {
417 uint8_t sib = instr[start + 2];
418 uint_t index = FASTTRAP_SIB_INDEX(sib);
419 uint_t base = FASTTRAP_SIB_BASE(sib);
420
421 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
422
423 tp->ftt_index = (index == 4) ?
424 FASTTRAP_NOREG :
425 regmap[index | (FASTTRAP_REX_X(rex) << 3)];
426 tp->ftt_base = (mod == 0 && base == 5) ?
427 FASTTRAP_NOREG :
428 regmap[base | (FASTTRAP_REX_B(rex) << 3)];
429
430 i = 3;
431 sz = mod == 1 ? 1 : 4;
432 } else {
433 /*
434 * In 64-bit mode, mod == 0 and r/m == 5
435 * denotes %rip-relative addressing; in 32-bit
436 * mode, the base register isn't used. In both
437 * modes, there is a 32-bit operand.
438 */
439 if (mod == 0 && rm == 5) {
440 if (p_model == DATAMODEL_LP64)
441 tp->ftt_base = REG_RIP;
442 else
443 tp->ftt_base = FASTTRAP_NOREG;
444 sz = 4;
445 } else {
446 uint8_t base = rm |
447 (FASTTRAP_REX_B(rex) << 3);
448
449 tp->ftt_base = regmap[base];
450 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
451 }
452 tp->ftt_index = FASTTRAP_NOREG;
453 i = 2;
454 }
455
456 if (sz == 1) {
457 tp->ftt_dest = *(int8_t *)&instr[start + i];
458 } else if (sz == 4) {
459 /* LINTED - alignment */
460 tp->ftt_dest = *(int32_t *)&instr[start + i];
461 } else {
462 tp->ftt_dest = 0;
463 }
464 }
465 } else {
466 switch (instr[start]) {
467 case FASTTRAP_RET:
468 tp->ftt_type = FASTTRAP_T_RET;
469 break;
470
471 case FASTTRAP_RET16:
472 tp->ftt_type = FASTTRAP_T_RET16;
473 /* LINTED - alignment */
474 tp->ftt_dest = *(uint16_t *)&instr[start + 1];
475 break;
476
477 case FASTTRAP_JO:
478 case FASTTRAP_JNO:
479 case FASTTRAP_JB:
480 case FASTTRAP_JAE:
481 case FASTTRAP_JE:
482 case FASTTRAP_JNE:
483 case FASTTRAP_JBE:
484 case FASTTRAP_JA:
485 case FASTTRAP_JS:
486 case FASTTRAP_JNS:
487 case FASTTRAP_JP:
488 case FASTTRAP_JNP:
489 case FASTTRAP_JL:
490 case FASTTRAP_JGE:
491 case FASTTRAP_JLE:
492 case FASTTRAP_JG:
493 tp->ftt_type = FASTTRAP_T_JCC;
494 tp->ftt_code = instr[start];
495 tp->ftt_dest = pc + tp->ftt_size +
496 (int8_t)instr[start + 1];
497 break;
498
499 case FASTTRAP_LOOPNZ:
500 case FASTTRAP_LOOPZ:
501 case FASTTRAP_LOOP:
502 tp->ftt_type = FASTTRAP_T_LOOP;
503 tp->ftt_code = instr[start];
504 tp->ftt_dest = pc + tp->ftt_size +
505 (int8_t)instr[start + 1];
506 break;
507
508 case FASTTRAP_JCXZ:
509 tp->ftt_type = FASTTRAP_T_JCXZ;
510 tp->ftt_dest = pc + tp->ftt_size +
511 (int8_t)instr[start + 1];
512 break;
513
514 case FASTTRAP_CALL:
515 tp->ftt_type = FASTTRAP_T_CALL;
516 tp->ftt_dest = pc + tp->ftt_size +
517 /* LINTED - alignment */
518 *(int32_t *)&instr[start + 1];
519 tp->ftt_code = 0;
520 break;
521
522 case FASTTRAP_JMP32:
523 tp->ftt_type = FASTTRAP_T_JMP;
524 tp->ftt_dest = pc + tp->ftt_size +
525 /* LINTED - alignment */
526 *(int32_t *)&instr[start + 1];
527 break;
528 case FASTTRAP_JMP8:
529 tp->ftt_type = FASTTRAP_T_JMP;
530 tp->ftt_dest = pc + tp->ftt_size +
531 (int8_t)instr[start + 1];
532 break;
533
534 case FASTTRAP_PUSHL_EBP:
535 if (start == 0)
536 tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
537 break;
538
539 case FASTTRAP_NOP:
540 ASSERT(p_model == DATAMODEL_LP64 || rex == 0);
541
542 /*
543 * On sol64 we have to be careful not to confuse a nop
544 * (actually xchgl %eax, %eax) with an instruction using
545 * the same opcode, but that does something different
546 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
547 */
548 if (FASTTRAP_REX_B(rex) == 0)
549 tp->ftt_type = FASTTRAP_T_NOP;
550 break;
551
552 case FASTTRAP_INT3:
553 /*
554 * The pid provider shares the int3 trap with debugger
555 * breakpoints so we can't instrument them.
556 */
557 ASSERT(instr[start] == FASTTRAP_INSTR);
558 return (-1);
559
560 case FASTTRAP_INT:
561 /*
562 * Interrupts seem like they could be traced with
563 * no negative implications, but it's possible that
564 * a thread could be redirected by the trap handling
565 * code which would eventually return to the
566 * instruction after the interrupt. If the interrupt
567 * were in our scratch space, the subsequent
568 * instruction might be overwritten before we return.
569 * Accordingly we refuse to instrument any interrupt.
570 */
571 return (-1);
572 }
573 }
574
575 if (p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
576 /*
577 * If the process is 64-bit and the instruction type is still
578 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
579 * execute it -- we need to watch for %rip-relative
580 * addressing mode. See the portion of fasttrap_pid_probe()
581 * below where we handle tracepoints with type
582 * FASTTRAP_T_COMMON for how we emulate instructions that
583 * employ %rip-relative addressing.
584 */
585 if (rmindex != -1) {
586 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
587 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
588 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
589
590 ASSERT(rmindex > (int)start);
591
592 if (mod == 0 && rm == 5) {
593 /*
594 * We need to be sure to avoid other
595 * registers used by this instruction. While
596 * the reg field may determine the op code
597 * rather than denoting a register, assuming
598 * that it denotes a register is always safe.
599 * We leave the REX field intact and use
600 * whatever value's there for simplicity.
601 */
602 if (reg != 0) {
603 tp->ftt_ripmode = FASTTRAP_RIP_1 |
604 (FASTTRAP_RIP_X *
605 FASTTRAP_REX_B(rex));
606 rm = 0;
607 } else {
608 tp->ftt_ripmode = FASTTRAP_RIP_2 |
609 (FASTTRAP_RIP_X *
610 FASTTRAP_REX_B(rex));
611 rm = 1;
612 }
613
614 tp->ftt_modrm = tp->ftt_instr[rmindex];
615 tp->ftt_instr[rmindex] =
616 FASTTRAP_MODRM(2, reg, rm);
617 }
618 }
619 }
620
621 return (0);
622 }
623
624 int
fasttrap_tracepoint_install(proc_t * p,fasttrap_tracepoint_t * tp)625 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
626 {
627 fasttrap_instr_t instr = FASTTRAP_INSTR;
628
629 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
630 return (-1);
631
632 tp->ftt_installed = 1;
633
634 return (0);
635 }
636
637 int
fasttrap_tracepoint_remove(proc_t * p,fasttrap_tracepoint_t * tp)638 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
639 {
640 uint8_t instr;
641
642 /*
643 * Distinguish between read or write failures and a changed
644 * instruction.
645 */
646 if (uread(p, &instr, 1, tp->ftt_pc) != 0)
647 goto end;
648 if (instr != FASTTRAP_INSTR)
649 goto end;
650 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
651 return (-1);
652 end:
653 tp->ftt_installed = 0;
654
655 return (0);
656 }
657
658 static void
fasttrap_return_common(x86_saved_state_t * regs,user_addr_t pc,pid_t pid,user_addr_t new_pc)659 fasttrap_return_common(x86_saved_state_t *regs, user_addr_t pc, pid_t pid,
660 user_addr_t new_pc)
661 {
662 x86_saved_state64_t *regs64;
663 x86_saved_state32_t *regs32;
664 unsigned int p_model;
665 int retire_tp = 1;
666
667 dtrace_icookie_t cookie;
668
669 if (is_saved_state64(regs)) {
670 regs64 = saved_state64(regs);
671 regs32 = NULL;
672 p_model = DATAMODEL_LP64;
673 } else {
674 regs64 = NULL;
675 regs32 = saved_state32(regs);
676 p_model = DATAMODEL_ILP32;
677 }
678
679 fasttrap_tracepoint_t *tp;
680 fasttrap_bucket_t *bucket;
681 fasttrap_id_t *id;
682 lck_mtx_t *pid_mtx;
683
684 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
685 lck_mtx_lock(pid_mtx);
686 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
687
688 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
689 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
690 tp->ftt_proc->ftpc_acount != 0)
691 break;
692 }
693
694 /*
695 * Don't sweat it if we can't find the tracepoint again; unlike
696 * when we're in fasttrap_pid_probe(), finding the tracepoint here
697 * is not essential to the correct execution of the process.
698 */
699 if (tp == NULL) {
700 lck_mtx_unlock(pid_mtx);
701 return;
702 }
703
704 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
705 fasttrap_probe_t *probe = id->fti_probe;
706 /*
707 * If there's a branch that could act as a return site, we
708 * need to trace it, and check here if the program counter is
709 * external to the function.
710 */
711 if (tp->ftt_type != FASTTRAP_T_RET &&
712 tp->ftt_type != FASTTRAP_T_RET16 &&
713 new_pc - probe->ftp_faddr < probe->ftp_fsize)
714 continue;
715
716 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
717 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
718 /* already triggered */
719 continue;
720 }
721 }
722 /*
723 * If we have at least one probe associated that
724 * is not a oneshot probe, don't remove the
725 * tracepoint
726 */
727 else {
728 retire_tp = 0;
729 }
730 /*
731 * Provide a hint to the stack trace functions to add the
732 * following pc to the top of the stack since it's missing
733 * on a return probe yet highly desirable for consistency.
734 */
735 cookie = dtrace_interrupt_disable();
736 cpu_core[CPU->cpu_id].cpuc_missing_tos = pc;
737 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
738 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
739 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
740 } else if (p_model == DATAMODEL_LP64) {
741 dtrace_probe(probe->ftp_id,
742 pc - id->fti_probe->ftp_faddr,
743 regs64->rax, regs64->rdx, 0, 0);
744 } else {
745 dtrace_probe(probe->ftp_id,
746 pc - id->fti_probe->ftp_faddr,
747 regs32->eax, regs32->edx, 0, 0);
748 }
749 /* remove the hint */
750 cpu_core[CPU->cpu_id].cpuc_missing_tos = 0;
751 dtrace_interrupt_enable(cookie);
752 }
753
754 lck_mtx_unlock(pid_mtx);
755 }
756
757 static void
fasttrap_sigsegv(proc_t * p,uthread_t t,user_addr_t addr)758 fasttrap_sigsegv(proc_t *p, uthread_t t, user_addr_t addr)
759 {
760 proc_lock(p);
761
762 /* Set fault address and mark signal */
763 t->uu_code = addr;
764 t->uu_siglist |= sigmask(SIGSEGV);
765
766 /*
767 * XXX These two line may be redundant; if not, then we need
768 * XXX to potentially set the data address in the machine
769 * XXX specific thread state structure to indicate the address.
770 */
771 t->uu_exception = KERN_INVALID_ADDRESS; /* SIGSEGV */
772 t->uu_subcode = 0; /* XXX pad */
773
774 proc_unlock(p);
775
776 /* raise signal */
777 signal_setast(get_machthread(t));
778 }
779
780 static void
fasttrap_usdt_args64(fasttrap_probe_t * probe,x86_saved_state64_t * regs64,int argc,uint64_t * argv)781 fasttrap_usdt_args64(fasttrap_probe_t *probe, x86_saved_state64_t *regs64, int argc,
782 uint64_t *argv)
783 {
784 int i, x, cap = MIN(argc, probe->ftp_nargs);
785 user_addr_t stack = (user_addr_t)regs64->isf.rsp;
786
787 for (i = 0; i < cap; i++) {
788 x = probe->ftp_argmap[i];
789
790 if (x < 6) {
791 /* FIXME! This may be broken, needs testing */
792 argv[i] = (®s64->rdi)[x];
793 } else {
794 fasttrap_fuword64_noerr(stack + (x * sizeof(uint64_t)), &argv[i]);
795 }
796 }
797
798 for (; i < argc; i++) {
799 argv[i] = 0;
800 }
801 }
802
803 static void
fasttrap_usdt_args32(fasttrap_probe_t * probe,x86_saved_state32_t * regs32,int argc,uint32_t * argv)804 fasttrap_usdt_args32(fasttrap_probe_t *probe, x86_saved_state32_t *regs32, int argc,
805 uint32_t *argv)
806 {
807 int i, x, cap = MIN(argc, probe->ftp_nargs);
808 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
809
810 for (i = 0; i < cap; i++) {
811 x = probe->ftp_argmap[i];
812
813 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[x], &argv[i]);
814 }
815
816 for (; i < argc; i++) {
817 argv[i] = 0;
818 }
819 }
820
821 /*
822 * FIXME!
823 */
824 static int
fasttrap_do_seg(fasttrap_tracepoint_t * tp,x86_saved_state_t * rp,user_addr_t * addr)825 fasttrap_do_seg(fasttrap_tracepoint_t *tp, x86_saved_state_t *rp, user_addr_t *addr) // 64 bit
826 {
827 #pragma unused(tp, rp, addr)
828 printf("fasttrap_do_seg() called while unimplemented.\n");
829 #if 0
830 proc_t *p = curproc;
831 user_desc_t *desc;
832 uint16_t sel, ndx, type;
833 uintptr_t limit;
834
835 switch (tp->ftt_segment) {
836 case FASTTRAP_SEG_CS:
837 sel = rp->r_cs;
838 break;
839 case FASTTRAP_SEG_DS:
840 sel = rp->r_ds;
841 break;
842 case FASTTRAP_SEG_ES:
843 sel = rp->r_es;
844 break;
845 case FASTTRAP_SEG_FS:
846 sel = rp->r_fs;
847 break;
848 case FASTTRAP_SEG_GS:
849 sel = rp->r_gs;
850 break;
851 case FASTTRAP_SEG_SS:
852 sel = rp->r_ss;
853 break;
854 }
855
856 /*
857 * Make sure the given segment register specifies a user priority
858 * selector rather than a kernel selector.
859 */
860 if (!SELISUPL(sel))
861 return (-1);
862
863 ndx = SELTOIDX(sel);
864
865 /*
866 * Check the bounds and grab the descriptor out of the specified
867 * descriptor table.
868 */
869 if (SELISLDT(sel)) {
870 if (ndx > p->p_ldtlimit)
871 return (-1);
872
873 desc = p->p_ldt + ndx;
874
875 } else {
876 if (ndx >= NGDT)
877 return (-1);
878
879 desc = cpu_get_gdt() + ndx;
880 }
881
882 /*
883 * The descriptor must have user privilege level and it must be
884 * present in memory.
885 */
886 if (desc->usd_dpl != SEL_UPL || desc->usd_p != 1)
887 return (-1);
888
889 type = desc->usd_type;
890
891 /*
892 * If the S bit in the type field is not set, this descriptor can
893 * only be used in system context.
894 */
895 if ((type & 0x10) != 0x10)
896 return (-1);
897
898 limit = USEGD_GETLIMIT(desc) * (desc->usd_gran ? PAGESIZE : 1);
899
900 if (tp->ftt_segment == FASTTRAP_SEG_CS) {
901 /*
902 * The code/data bit and readable bit must both be set.
903 */
904 if ((type & 0xa) != 0xa)
905 return (-1);
906
907 if (*addr > limit)
908 return (-1);
909 } else {
910 /*
911 * The code/data bit must be clear.
912 */
913 if ((type & 0x8) != 0)
914 return (-1);
915
916 /*
917 * If the expand-down bit is clear, we just check the limit as
918 * it would naturally be applied. Otherwise, we need to check
919 * that the address is the range [limit + 1 .. 0xffff] or
920 * [limit + 1 ... 0xffffffff] depending on if the default
921 * operand size bit is set.
922 */
923 if ((type & 0x4) == 0) {
924 if (*addr > limit)
925 return (-1);
926 } else if (desc->usd_def32) {
927 if (*addr < limit + 1 || 0xffff < *addr)
928 return (-1);
929 } else {
930 if (*addr < limit + 1 || 0xffffffff < *addr)
931 return (-1);
932 }
933 }
934
935 *addr += USEGD_GETBASE(desc);
936 #endif /* 0 */
937 return (0);
938 }
939
940 /*
941 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
942 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
943 * call other methods that require a x86_saved_state_t.
944 *
945 * NOTE!!!!
946 *
947 * Any changes made to this method must be echo'd in fasttrap_pid_probe64!
948 *
949 */
950 static int
fasttrap_pid_probe32(x86_saved_state_t * regs)951 fasttrap_pid_probe32(x86_saved_state_t *regs)
952 {
953 ASSERT(is_saved_state32(regs));
954
955 x86_saved_state32_t *regs32 = saved_state32(regs);
956 user_addr_t pc = regs32->eip - 1;
957 proc_t *p = current_proc();
958 user_addr_t new_pc = 0;
959 fasttrap_bucket_t *bucket;
960 lck_mtx_t *pid_mtx;
961 fasttrap_tracepoint_t *tp, tp_local;
962 pid_t pid;
963 dtrace_icookie_t cookie;
964 uint_t is_enabled = 0, retire_tp = 1;
965
966 uthread_t uthread = current_uthread();
967
968 /*
969 * It's possible that a user (in a veritable orgy of bad planning)
970 * could redirect this thread's flow of control before it reached the
971 * return probe fasttrap. In this case we need to kill the process
972 * since it's in a unrecoverable state.
973 */
974 if (uthread->t_dtrace_step) {
975 ASSERT(uthread->t_dtrace_on);
976 fasttrap_sigtrap(p, uthread, pc);
977 return (0);
978 }
979
980 /*
981 * Clear all user tracing flags.
982 */
983 uthread->t_dtrace_ft = 0;
984 uthread->t_dtrace_pc = 0;
985 uthread->t_dtrace_npc = 0;
986 uthread->t_dtrace_scrpc = 0;
987 uthread->t_dtrace_astpc = 0;
988
989
990 pid = proc_getpid(p);
991 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
992 lck_mtx_lock(pid_mtx);
993 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
994
995 /*
996 * Lookup the tracepoint that the process just hit.
997 */
998 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
999 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1000 tp->ftt_proc->ftpc_acount != 0)
1001 break;
1002 }
1003
1004 /*
1005 * If we couldn't find a matching tracepoint, either a tracepoint has
1006 * been inserted without using the pid<pid> ioctl interface (see
1007 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1008 */
1009 if (tp == NULL) {
1010 lck_mtx_unlock(pid_mtx);
1011 return (-1);
1012 }
1013
1014 /*
1015 * Set the program counter to the address of the traced instruction
1016 * so that it looks right in ustack() output.
1017 */
1018 regs32->eip = pc;
1019
1020 if (tp->ftt_ids != NULL) {
1021 fasttrap_id_t *id;
1022
1023 uint32_t s0, s1, s2, s3, s4, s5;
1024 uint32_t *stack = (uint32_t *)(uintptr_t)(regs32->uesp);
1025
1026 /*
1027 * In 32-bit mode, all arguments are passed on the
1028 * stack. If this is a function entry probe, we need
1029 * to skip the first entry on the stack as it
1030 * represents the return address rather than a
1031 * parameter to the function.
1032 */
1033 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[0], &s0);
1034 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[1], &s1);
1035 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[2], &s2);
1036 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[3], &s3);
1037 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[4], &s4);
1038 fasttrap_fuword32_noerr((user_addr_t)(unsigned long)&stack[5], &s5);
1039
1040 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1041 fasttrap_probe_t *probe = id->fti_probe;
1042
1043 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1044 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1045 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1046 } else {
1047 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1048 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
1049 /* already triggered */
1050 continue;
1051 }
1052 }
1053 /*
1054 * If we have at least one probe associated that
1055 * is not a oneshot probe, don't remove the
1056 * tracepoint
1057 */
1058 else {
1059 retire_tp = 0;
1060 }
1061 if (id->fti_ptype == DTFTP_ENTRY) {
1062 /*
1063 * We note that this was an entry
1064 * probe to help ustack() find the
1065 * first caller.
1066 */
1067 cookie = dtrace_interrupt_disable();
1068 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1069 dtrace_probe(probe->ftp_id, s1, s2,
1070 s3, s4, s5);
1071 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1072 dtrace_interrupt_enable(cookie);
1073 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1074 /*
1075 * Note that in this case, we don't
1076 * call dtrace_probe() since it's only
1077 * an artificial probe meant to change
1078 * the flow of control so that it
1079 * encounters the true probe.
1080 */
1081 is_enabled = 1;
1082 } else if (probe->ftp_argmap == NULL) {
1083 dtrace_probe(probe->ftp_id, s0, s1,
1084 s2, s3, s4);
1085 } else {
1086 uint32_t t[5];
1087
1088 fasttrap_usdt_args32(probe, regs32,
1089 sizeof (t) / sizeof (t[0]), t);
1090
1091 dtrace_probe(probe->ftp_id, t[0], t[1],
1092 t[2], t[3], t[4]);
1093 }
1094 }
1095 }
1096 if (retire_tp) {
1097 fasttrap_tracepoint_retire(p, tp);
1098 }
1099 }
1100
1101 /*
1102 * We're about to do a bunch of work so we cache a local copy of
1103 * the tracepoint to emulate the instruction, and then find the
1104 * tracepoint again later if we need to light up any return probes.
1105 */
1106 tp_local = *tp;
1107 lck_mtx_unlock(pid_mtx);
1108 tp = &tp_local;
1109
1110 /*
1111 * Set the program counter to appear as though the traced instruction
1112 * had completely executed. This ensures that fasttrap_getreg() will
1113 * report the expected value for REG_RIP.
1114 */
1115 regs32->eip = pc + tp->ftt_size;
1116
1117 /*
1118 * If there's an is-enabled probe connected to this tracepoint it
1119 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1120 * instruction that was placed there by DTrace when the binary was
1121 * linked. As this probe is, in fact, enabled, we need to stuff 1
1122 * into %eax or %rax. Accordingly, we can bypass all the instruction
1123 * emulation logic since we know the inevitable result. It's possible
1124 * that a user could construct a scenario where the 'is-enabled'
1125 * probe was on some other instruction, but that would be a rather
1126 * exotic way to shoot oneself in the foot.
1127 */
1128 if (is_enabled) {
1129 regs32->eax = 1;
1130 new_pc = regs32->eip;
1131 goto done;
1132 }
1133
1134 /*
1135 * We emulate certain types of instructions to ensure correctness
1136 * (in the case of position dependent instructions) or optimize
1137 * common cases. The rest we have the thread execute back in user-
1138 * land.
1139 */
1140 switch (tp->ftt_type) {
1141 case FASTTRAP_T_RET:
1142 case FASTTRAP_T_RET16:
1143 {
1144 user_addr_t dst;
1145 user_addr_t addr;
1146 int ret;
1147
1148 /*
1149 * We have to emulate _every_ facet of the behavior of a ret
1150 * instruction including what happens if the load from %esp
1151 * fails; in that case, we send a SIGSEGV.
1152 */
1153 uint32_t dst32;
1154 ret = fasttrap_fuword32((user_addr_t)regs32->uesp, &dst32);
1155 dst = dst32;
1156 addr = regs32->uesp + sizeof (uint32_t);
1157
1158 if (ret == -1) {
1159 fasttrap_sigsegv(p, uthread, (user_addr_t)regs32->uesp);
1160 new_pc = pc;
1161 break;
1162 }
1163
1164 if (tp->ftt_type == FASTTRAP_T_RET16)
1165 addr += tp->ftt_dest;
1166
1167 regs32->uesp = addr;
1168 new_pc = dst;
1169 break;
1170 }
1171
1172 case FASTTRAP_T_JCC:
1173 {
1174 uint_t taken;
1175
1176 switch (tp->ftt_code) {
1177 case FASTTRAP_JO:
1178 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) != 0;
1179 break;
1180 case FASTTRAP_JNO:
1181 taken = (regs32->efl & FASTTRAP_EFLAGS_OF) == 0;
1182 break;
1183 case FASTTRAP_JB:
1184 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0;
1185 break;
1186 case FASTTRAP_JAE:
1187 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0;
1188 break;
1189 case FASTTRAP_JE:
1190 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1191 break;
1192 case FASTTRAP_JNE:
1193 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1194 break;
1195 case FASTTRAP_JBE:
1196 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) != 0 ||
1197 (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0;
1198 break;
1199 case FASTTRAP_JA:
1200 taken = (regs32->efl & FASTTRAP_EFLAGS_CF) == 0 &&
1201 (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0;
1202 break;
1203 case FASTTRAP_JS:
1204 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) != 0;
1205 break;
1206 case FASTTRAP_JNS:
1207 taken = (regs32->efl & FASTTRAP_EFLAGS_SF) == 0;
1208 break;
1209 case FASTTRAP_JP:
1210 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) != 0;
1211 break;
1212 case FASTTRAP_JNP:
1213 taken = (regs32->efl & FASTTRAP_EFLAGS_PF) == 0;
1214 break;
1215 case FASTTRAP_JL:
1216 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1217 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1218 break;
1219 case FASTTRAP_JGE:
1220 taken = ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1221 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1222 break;
1223 case FASTTRAP_JLE:
1224 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 ||
1225 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) !=
1226 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1227 break;
1228 case FASTTRAP_JG:
1229 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1230 ((regs32->efl & FASTTRAP_EFLAGS_SF) == 0) ==
1231 ((regs32->efl & FASTTRAP_EFLAGS_OF) == 0);
1232 break;
1233 default:
1234 taken = FALSE;
1235 }
1236
1237 if (taken)
1238 new_pc = tp->ftt_dest;
1239 else
1240 new_pc = pc + tp->ftt_size;
1241 break;
1242 }
1243
1244 case FASTTRAP_T_LOOP:
1245 {
1246 uint_t taken;
1247 greg_t cx = regs32->ecx--;
1248
1249 switch (tp->ftt_code) {
1250 case FASTTRAP_LOOPNZ:
1251 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) == 0 &&
1252 cx != 0;
1253 break;
1254 case FASTTRAP_LOOPZ:
1255 taken = (regs32->efl & FASTTRAP_EFLAGS_ZF) != 0 &&
1256 cx != 0;
1257 break;
1258 case FASTTRAP_LOOP:
1259 taken = (cx != 0);
1260 break;
1261 default:
1262 taken = FALSE;
1263 }
1264
1265 if (taken)
1266 new_pc = tp->ftt_dest;
1267 else
1268 new_pc = pc + tp->ftt_size;
1269 break;
1270 }
1271
1272 case FASTTRAP_T_JCXZ:
1273 {
1274 greg_t cx = regs32->ecx;
1275
1276 if (cx == 0)
1277 new_pc = tp->ftt_dest;
1278 else
1279 new_pc = pc + tp->ftt_size;
1280 break;
1281 }
1282
1283 case FASTTRAP_T_PUSHL_EBP:
1284 {
1285 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1286 int ret = fasttrap_suword32(addr, (uint32_t)regs32->ebp);
1287
1288 if (ret == -1) {
1289 fasttrap_sigsegv(p, uthread, addr);
1290 new_pc = pc;
1291 break;
1292 }
1293
1294 regs32->uesp = addr;
1295 new_pc = pc + tp->ftt_size;
1296 break;
1297 }
1298
1299 case FASTTRAP_T_NOP:
1300 new_pc = pc + tp->ftt_size;
1301 break;
1302
1303 case FASTTRAP_T_JMP:
1304 case FASTTRAP_T_CALL:
1305 if (tp->ftt_code == 0) {
1306 new_pc = tp->ftt_dest;
1307 } else {
1308 user_addr_t /* value ,*/ addr = tp->ftt_dest;
1309
1310 if (tp->ftt_base != FASTTRAP_NOREG)
1311 addr += fasttrap_getreg(regs, tp->ftt_base);
1312 if (tp->ftt_index != FASTTRAP_NOREG)
1313 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1314 tp->ftt_scale;
1315
1316 if (tp->ftt_code == 1) {
1317 /*
1318 * If there's a segment prefix for this
1319 * instruction, we'll need to check permissions
1320 * and bounds on the given selector, and adjust
1321 * the address accordingly.
1322 */
1323 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1324 fasttrap_do_seg(tp, regs, &addr) != 0) {
1325 fasttrap_sigsegv(p, uthread, addr);
1326 new_pc = pc;
1327 break;
1328 }
1329
1330 uint32_t value32;
1331 addr = (user_addr_t)(uint32_t)addr;
1332 if (fasttrap_fuword32(addr, &value32) == -1) {
1333 fasttrap_sigsegv(p, uthread, addr);
1334 new_pc = pc;
1335 break;
1336 }
1337 new_pc = value32;
1338 } else {
1339 new_pc = addr;
1340 }
1341 }
1342
1343 /*
1344 * If this is a call instruction, we need to push the return
1345 * address onto the stack. If this fails, we send the process
1346 * a SIGSEGV and reset the pc to emulate what would happen if
1347 * this instruction weren't traced.
1348 */
1349 if (tp->ftt_type == FASTTRAP_T_CALL) {
1350 user_addr_t addr = regs32->uesp - sizeof (uint32_t);
1351 int ret = fasttrap_suword32(addr, (uint32_t)(pc + tp->ftt_size));
1352
1353 if (ret == -1) {
1354 fasttrap_sigsegv(p, uthread, addr);
1355 new_pc = pc;
1356 break;
1357 }
1358
1359 regs32->uesp = addr;
1360 }
1361 break;
1362
1363 case FASTTRAP_T_COMMON:
1364 {
1365 user_addr_t addr, write_addr;
1366 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1367 uint_t i = 0;
1368
1369 /*
1370 * Generic Instruction Tracing
1371 * ---------------------------
1372 *
1373 * This is the layout of the scratch space in the user-land
1374 * thread structure for our generated instructions.
1375 *
1376 * 32-bit mode bytes
1377 * ------------------------ -----
1378 * a: <original instruction> <= 15
1379 * jmp <pc + tp->ftt_size> 5
1380 * b: <original instrction> <= 15
1381 * int T_DTRACE_RET 2
1382 * -----
1383 * <= 37
1384 *
1385 * 64-bit mode bytes
1386 * ------------------------ -----
1387 * a: <original instruction> <= 15
1388 * jmp 0(%rip) 6
1389 * <pc + tp->ftt_size> 8
1390 * b: <original instruction> <= 15
1391 * int T_DTRACE_RET 2
1392 * -----
1393 * <= 46
1394 *
1395 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1396 * to b. If we encounter a signal on the way out of the
1397 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1398 * so that we execute the original instruction and re-enter
1399 * the kernel rather than redirecting to the next instruction.
1400 *
1401 * If there are return probes (so we know that we're going to
1402 * need to reenter the kernel after executing the original
1403 * instruction), the scratch space will just contain the
1404 * original instruction followed by an interrupt -- the same
1405 * data as at b.
1406 */
1407
1408 addr = uthread->t_dtrace_scratch->addr;
1409 write_addr = uthread->t_dtrace_scratch->write_addr;
1410
1411 if (addr == 0LL || write_addr == 0LL) {
1412 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
1413 new_pc = pc;
1414 break;
1415 }
1416
1417 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1418
1419 uthread->t_dtrace_scrpc = addr;
1420 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1421 i += tp->ftt_size;
1422
1423 /*
1424 * Set up the jmp to the next instruction; note that
1425 * the size of the traced instruction cancels out.
1426 */
1427 scratch[i++] = FASTTRAP_JMP32;
1428 /* LINTED - alignment */
1429 *(uint32_t *)&scratch[i] = pc - addr - 5;
1430 i += sizeof (uint32_t);
1431
1432 uthread->t_dtrace_astpc = addr + i;
1433 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1434 i += tp->ftt_size;
1435 scratch[i++] = FASTTRAP_INT;
1436 scratch[i++] = T_DTRACE_RET;
1437
1438 ASSERT(i <= sizeof (scratch));
1439
1440 if (fasttrap_copyout(scratch, write_addr, i)) {
1441 fasttrap_sigtrap(p, uthread, pc);
1442 new_pc = pc;
1443 break;
1444 }
1445
1446 if (tp->ftt_retids != NULL) {
1447 uthread->t_dtrace_step = 1;
1448 uthread->t_dtrace_ret = 1;
1449 new_pc = uthread->t_dtrace_astpc;
1450 } else {
1451 new_pc = uthread->t_dtrace_scrpc;
1452 }
1453
1454 uthread->t_dtrace_pc = pc;
1455 uthread->t_dtrace_npc = pc + tp->ftt_size;
1456 uthread->t_dtrace_on = 1;
1457 break;
1458 }
1459
1460 default:
1461 panic("fasttrap: mishandled an instruction");
1462 }
1463
1464 done:
1465 /*
1466 * APPLE NOTE:
1467 *
1468 * We're setting this earlier than Solaris does, to get a "correct"
1469 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
1470 * reported at: d, b, a. The new way gives c, b, a, which is closer
1471 * to correct, as the return instruction has already exectued.
1472 */
1473 regs32->eip = new_pc;
1474
1475 /*
1476 * If there were no return probes when we first found the tracepoint,
1477 * we should feel no obligation to honor any return probes that were
1478 * subsequently enabled -- they'll just have to wait until the next
1479 * time around.
1480 */
1481 if (tp->ftt_retids != NULL) {
1482 /*
1483 * We need to wait until the results of the instruction are
1484 * apparent before invoking any return probes. If this
1485 * instruction was emulated we can just call
1486 * fasttrap_return_common(); if it needs to be executed, we
1487 * need to wait until the user thread returns to the kernel.
1488 */
1489 if (tp->ftt_type != FASTTRAP_T_COMMON) {
1490 fasttrap_return_common(regs, pc, pid, new_pc);
1491 } else {
1492 ASSERT(uthread->t_dtrace_ret != 0);
1493 ASSERT(uthread->t_dtrace_pc == pc);
1494 ASSERT(uthread->t_dtrace_scrpc != 0);
1495 ASSERT(new_pc == uthread->t_dtrace_astpc);
1496 }
1497 }
1498
1499 return (0);
1500 }
1501
1502 /*
1503 * Due to variances between Solaris and xnu, I have split this into a 32 bit and 64 bit
1504 * code path. It still takes an x86_saved_state_t* argument, because it must sometimes
1505 * call other methods that require a x86_saved_state_t.
1506 *
1507 * NOTE!!!!
1508 *
1509 * Any changes made to this method must be echo'd in fasttrap_pid_probe32!
1510 *
1511 */
1512 static int
fasttrap_pid_probe64(x86_saved_state_t * regs)1513 fasttrap_pid_probe64(x86_saved_state_t *regs)
1514 {
1515 ASSERT(is_saved_state64(regs));
1516
1517 x86_saved_state64_t *regs64 = saved_state64(regs);
1518 user_addr_t pc = regs64->isf.rip - 1;
1519 proc_t *p = current_proc();
1520 user_addr_t new_pc = 0;
1521 fasttrap_bucket_t *bucket;
1522 lck_mtx_t *pid_mtx;
1523 fasttrap_tracepoint_t *tp, tp_local;
1524 pid_t pid;
1525 dtrace_icookie_t cookie;
1526 uint_t is_enabled = 0;
1527 int retire_tp = 1;
1528
1529 uthread_t uthread = current_uthread();
1530
1531 /*
1532 * It's possible that a user (in a veritable orgy of bad planning)
1533 * could redirect this thread's flow of control before it reached the
1534 * return probe fasttrap. In this case we need to kill the process
1535 * since it's in a unrecoverable state.
1536 */
1537 if (uthread->t_dtrace_step) {
1538 ASSERT(uthread->t_dtrace_on);
1539 fasttrap_sigtrap(p, uthread, pc);
1540 return (0);
1541 }
1542
1543 /*
1544 * Clear all user tracing flags.
1545 */
1546 uthread->t_dtrace_ft = 0;
1547 uthread->t_dtrace_pc = 0;
1548 uthread->t_dtrace_npc = 0;
1549 uthread->t_dtrace_scrpc = 0;
1550 uthread->t_dtrace_astpc = 0;
1551 uthread->t_dtrace_regv = 0;
1552
1553
1554 pid = proc_getpid(p);
1555 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1556 lck_mtx_lock(pid_mtx);
1557 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1558
1559 /*
1560 * Lookup the tracepoint that the process just hit.
1561 */
1562 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1563 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1564 tp->ftt_proc->ftpc_acount != 0)
1565 break;
1566 }
1567
1568 /*
1569 * If we couldn't find a matching tracepoint, either a tracepoint has
1570 * been inserted without using the pid<pid> ioctl interface (see
1571 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1572 */
1573 if (tp == NULL) {
1574 lck_mtx_unlock(pid_mtx);
1575 return (-1);
1576 }
1577
1578 /*
1579 * Set the program counter to the address of the traced instruction
1580 * so that it looks right in ustack() output.
1581 */
1582 regs64->isf.rip = pc;
1583
1584 if (tp->ftt_ids != NULL) {
1585 fasttrap_id_t *id;
1586
1587 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1588 fasttrap_probe_t *probe = id->fti_probe;
1589
1590 if (probe->ftp_prov->ftp_provider_type == DTFTP_PROVIDER_ONESHOT) {
1591 if (os_atomic_xchg(&probe->ftp_triggered, 1, relaxed)) {
1592 /* already triggered */
1593 continue;
1594 }
1595 }
1596 /*
1597 * If we have at least probe associated that
1598 * is not a oneshot probe, don't remove the
1599 * tracepoint
1600 */
1601 else {
1602 retire_tp = 0;
1603 }
1604 if (ISSET(current_proc()->p_lflag, P_LNOATTACH)) {
1605 dtrace_probe(dtrace_probeid_error, 0 /* state */, probe->ftp_id,
1606 1 /* ndx */, -1 /* offset */, DTRACEFLT_UPRIV);
1607 } else if (id->fti_ptype == DTFTP_ENTRY) {
1608 /*
1609 * We note that this was an entry
1610 * probe to help ustack() find the
1611 * first caller.
1612 */
1613 cookie = dtrace_interrupt_disable();
1614 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1615 dtrace_probe(probe->ftp_id, regs64->rdi,
1616 regs64->rsi, regs64->rdx, regs64->rcx,
1617 regs64->r8);
1618 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1619 dtrace_interrupt_enable(cookie);
1620 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1621 /*
1622 * Note that in this case, we don't
1623 * call dtrace_probe() since it's only
1624 * an artificial probe meant to change
1625 * the flow of control so that it
1626 * encounters the true probe.
1627 */
1628 is_enabled = 1;
1629 } else if (probe->ftp_argmap == NULL) {
1630 dtrace_probe(probe->ftp_id, regs64->rdi,
1631 regs64->rsi, regs64->rdx, regs64->rcx,
1632 regs64->r8);
1633 } else {
1634 uint64_t t[5];
1635
1636 fasttrap_usdt_args64(probe, regs64,
1637 sizeof (t) / sizeof (t[0]), t);
1638
1639 dtrace_probe(probe->ftp_id, t[0], t[1],
1640 t[2], t[3], t[4]);
1641 }
1642
1643 }
1644 if (retire_tp) {
1645 fasttrap_tracepoint_retire(p, tp);
1646 }
1647 }
1648
1649 /*
1650 * We're about to do a bunch of work so we cache a local copy of
1651 * the tracepoint to emulate the instruction, and then find the
1652 * tracepoint again later if we need to light up any return probes.
1653 */
1654 tp_local = *tp;
1655 lck_mtx_unlock(pid_mtx);
1656 tp = &tp_local;
1657
1658 /*
1659 * Set the program counter to appear as though the traced instruction
1660 * had completely executed. This ensures that fasttrap_getreg() will
1661 * report the expected value for REG_RIP.
1662 */
1663 regs64->isf.rip = pc + tp->ftt_size;
1664
1665 /*
1666 * If there's an is-enabled probe connected to this tracepoint it
1667 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1668 * instruction that was placed there by DTrace when the binary was
1669 * linked. As this probe is, in fact, enabled, we need to stuff 1
1670 * into %eax or %rax. Accordingly, we can bypass all the instruction
1671 * emulation logic since we know the inevitable result. It's possible
1672 * that a user could construct a scenario where the 'is-enabled'
1673 * probe was on some other instruction, but that would be a rather
1674 * exotic way to shoot oneself in the foot.
1675 */
1676 if (is_enabled) {
1677 regs64->rax = 1;
1678 new_pc = regs64->isf.rip;
1679 goto done;
1680 }
1681
1682 /*
1683 * We emulate certain types of instructions to ensure correctness
1684 * (in the case of position dependent instructions) or optimize
1685 * common cases. The rest we have the thread execute back in user-
1686 * land.
1687 */
1688 switch (tp->ftt_type) {
1689 case FASTTRAP_T_RET:
1690 case FASTTRAP_T_RET16:
1691 {
1692 user_addr_t dst;
1693 user_addr_t addr;
1694 int ret;
1695
1696 /*
1697 * We have to emulate _every_ facet of the behavior of a ret
1698 * instruction including what happens if the load from %esp
1699 * fails; in that case, we send a SIGSEGV.
1700 */
1701 ret = fasttrap_fuword64((user_addr_t)regs64->isf.rsp, &dst);
1702 addr = regs64->isf.rsp + sizeof (uint64_t);
1703
1704 if (ret == -1) {
1705 fasttrap_sigsegv(p, uthread, (user_addr_t)regs64->isf.rsp);
1706 new_pc = pc;
1707 break;
1708 }
1709
1710 if (tp->ftt_type == FASTTRAP_T_RET16)
1711 addr += tp->ftt_dest;
1712
1713 regs64->isf.rsp = addr;
1714 new_pc = dst;
1715 break;
1716 }
1717
1718 case FASTTRAP_T_JCC:
1719 {
1720 uint_t taken;
1721
1722 switch (tp->ftt_code) {
1723 case FASTTRAP_JO:
1724 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) != 0;
1725 break;
1726 case FASTTRAP_JNO:
1727 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0;
1728 break;
1729 case FASTTRAP_JB:
1730 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0;
1731 break;
1732 case FASTTRAP_JAE:
1733 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0;
1734 break;
1735 case FASTTRAP_JE:
1736 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1737 break;
1738 case FASTTRAP_JNE:
1739 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1740 break;
1741 case FASTTRAP_JBE:
1742 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1743 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0;
1744 break;
1745 case FASTTRAP_JA:
1746 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1747 (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0;
1748 break;
1749 case FASTTRAP_JS:
1750 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) != 0;
1751 break;
1752 case FASTTRAP_JNS:
1753 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0;
1754 break;
1755 case FASTTRAP_JP:
1756 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) != 0;
1757 break;
1758 case FASTTRAP_JNP:
1759 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_PF) == 0;
1760 break;
1761 case FASTTRAP_JL:
1762 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1763 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1764 break;
1765 case FASTTRAP_JGE:
1766 taken = ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1767 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1768 break;
1769 case FASTTRAP_JLE:
1770 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1771 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1772 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1773 break;
1774 case FASTTRAP_JG:
1775 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1776 ((regs64->isf.rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1777 ((regs64->isf.rflags & FASTTRAP_EFLAGS_OF) == 0);
1778 break;
1779 default:
1780 taken = FALSE;
1781 }
1782
1783 if (taken)
1784 new_pc = tp->ftt_dest;
1785 else
1786 new_pc = pc + tp->ftt_size;
1787 break;
1788 }
1789
1790 case FASTTRAP_T_LOOP:
1791 {
1792 uint_t taken;
1793 uint64_t cx = regs64->rcx--;
1794
1795 switch (tp->ftt_code) {
1796 case FASTTRAP_LOOPNZ:
1797 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1798 cx != 0;
1799 break;
1800 case FASTTRAP_LOOPZ:
1801 taken = (regs64->isf.rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1802 cx != 0;
1803 break;
1804 case FASTTRAP_LOOP:
1805 taken = (cx != 0);
1806 break;
1807 default:
1808 taken = FALSE;
1809 }
1810
1811 if (taken)
1812 new_pc = tp->ftt_dest;
1813 else
1814 new_pc = pc + tp->ftt_size;
1815 break;
1816 }
1817
1818 case FASTTRAP_T_JCXZ:
1819 {
1820 uint64_t cx = regs64->rcx;
1821
1822 if (cx == 0)
1823 new_pc = tp->ftt_dest;
1824 else
1825 new_pc = pc + tp->ftt_size;
1826 break;
1827 }
1828
1829 case FASTTRAP_T_PUSHL_EBP:
1830 {
1831 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1832 int ret = fasttrap_suword64(addr, (uint64_t)regs64->rbp);
1833
1834 if (ret == -1) {
1835 fasttrap_sigsegv(p, uthread, addr);
1836 new_pc = pc;
1837 break;
1838 }
1839
1840 regs64->isf.rsp = addr;
1841 new_pc = pc + tp->ftt_size;
1842 break;
1843 }
1844
1845 case FASTTRAP_T_NOP:
1846 new_pc = pc + tp->ftt_size;
1847 break;
1848
1849 case FASTTRAP_T_JMP:
1850 case FASTTRAP_T_CALL:
1851 if (tp->ftt_code == 0) {
1852 new_pc = tp->ftt_dest;
1853 } else {
1854 user_addr_t value, addr = tp->ftt_dest;
1855
1856 if (tp->ftt_base != FASTTRAP_NOREG)
1857 addr += fasttrap_getreg(regs, tp->ftt_base);
1858 if (tp->ftt_index != FASTTRAP_NOREG)
1859 addr += fasttrap_getreg(regs, tp->ftt_index) <<
1860 tp->ftt_scale;
1861
1862 if (tp->ftt_code == 1) {
1863 /*
1864 * If there's a segment prefix for this
1865 * instruction, we'll need to check permissions
1866 * and bounds on the given selector, and adjust
1867 * the address accordingly.
1868 */
1869 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1870 fasttrap_do_seg(tp, regs, &addr) != 0) {
1871 fasttrap_sigsegv(p, uthread, addr);
1872 new_pc = pc;
1873 break;
1874 }
1875
1876 if (fasttrap_fuword64(addr, &value) == -1) {
1877 fasttrap_sigsegv(p, uthread, addr);
1878 new_pc = pc;
1879 break;
1880 }
1881 new_pc = value;
1882 } else {
1883 new_pc = addr;
1884 }
1885 }
1886
1887 /*
1888 * If this is a call instruction, we need to push the return
1889 * address onto the stack. If this fails, we send the process
1890 * a SIGSEGV and reset the pc to emulate what would happen if
1891 * this instruction weren't traced.
1892 */
1893 if (tp->ftt_type == FASTTRAP_T_CALL) {
1894 user_addr_t addr = regs64->isf.rsp - sizeof (uint64_t);
1895 int ret = fasttrap_suword64(addr, pc + tp->ftt_size);
1896
1897 if (ret == -1) {
1898 fasttrap_sigsegv(p, uthread, addr);
1899 new_pc = pc;
1900 break;
1901 }
1902
1903 regs64->isf.rsp = addr;
1904 }
1905 break;
1906
1907 case FASTTRAP_T_COMMON:
1908 {
1909 user_addr_t addr, write_addr;
1910 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1911 uint_t i = 0;
1912
1913 /*
1914 * Generic Instruction Tracing
1915 * ---------------------------
1916 *
1917 * This is the layout of the scratch space in the user-land
1918 * thread structure for our generated instructions.
1919 *
1920 * 32-bit mode bytes
1921 * ------------------------ -----
1922 * a: <original instruction> <= 15
1923 * jmp <pc + tp->ftt_size> 5
1924 * b: <original instrction> <= 15
1925 * int T_DTRACE_RET 2
1926 * -----
1927 * <= 37
1928 *
1929 * 64-bit mode bytes
1930 * ------------------------ -----
1931 * a: <original instruction> <= 15
1932 * jmp 0(%rip) 6
1933 * <pc + tp->ftt_size> 8
1934 * b: <original instruction> <= 15
1935 * int T_DTRACE_RET 2
1936 * -----
1937 * <= 46
1938 *
1939 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1940 * to b. If we encounter a signal on the way out of the
1941 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1942 * so that we execute the original instruction and re-enter
1943 * the kernel rather than redirecting to the next instruction.
1944 *
1945 * If there are return probes (so we know that we're going to
1946 * need to reenter the kernel after executing the original
1947 * instruction), the scratch space will just contain the
1948 * original instruction followed by an interrupt -- the same
1949 * data as at b.
1950 *
1951 * %rip-relative Addressing
1952 * ------------------------
1953 *
1954 * There's a further complication in 64-bit mode due to %rip-
1955 * relative addressing. While this is clearly a beneficial
1956 * architectural decision for position independent code, it's
1957 * hard not to see it as a personal attack against the pid
1958 * provider since before there was a relatively small set of
1959 * instructions to emulate; with %rip-relative addressing,
1960 * almost every instruction can potentially depend on the
1961 * address at which it's executed. Rather than emulating
1962 * the broad spectrum of instructions that can now be
1963 * position dependent, we emulate jumps and others as in
1964 * 32-bit mode, and take a different tack for instructions
1965 * using %rip-relative addressing.
1966 *
1967 * For every instruction that uses the ModRM byte, the
1968 * in-kernel disassembler reports its location. We use the
1969 * ModRM byte to identify that an instruction uses
1970 * %rip-relative addressing and to see what other registers
1971 * the instruction uses. To emulate those instructions,
1972 * we modify the instruction to be %rax-relative rather than
1973 * %rip-relative (or %rcx-relative if the instruction uses
1974 * %rax; or %r8- or %r9-relative if the REX.B is present so
1975 * we don't have to rewrite the REX prefix). We then load
1976 * the value that %rip would have been into the scratch
1977 * register and generate an instruction to reset the scratch
1978 * register back to its original value. The instruction
1979 * sequence looks like this:
1980 *
1981 * 64-mode %rip-relative bytes
1982 * ------------------------ -----
1983 * a: <modified instruction> <= 15
1984 * movq $<value>, %<scratch> 6
1985 * jmp 0(%rip) 6
1986 * <pc + tp->ftt_size> 8
1987 * b: <modified instruction> <= 15
1988 * int T_DTRACE_RET 2
1989 * -----
1990 * 52
1991 *
1992 * We set curthread->t_dtrace_regv so that upon receiving
1993 * a signal we can reset the value of the scratch register.
1994 */
1995
1996 addr = uthread->t_dtrace_scratch->addr;
1997 write_addr = uthread->t_dtrace_scratch->write_addr;
1998
1999 if (addr == 0LL || write_addr == 0LL) {
2000 fasttrap_sigtrap(p, uthread, pc); // Should be killing target proc
2001 new_pc = pc;
2002 break;
2003 }
2004
2005 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
2006
2007 uthread->t_dtrace_scrpc = addr;
2008 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2009 i += tp->ftt_size;
2010
2011 if (tp->ftt_ripmode != 0) {
2012 uint64_t* reg;
2013
2014 ASSERT(tp->ftt_ripmode &
2015 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
2016
2017 /*
2018 * If this was a %rip-relative instruction, we change
2019 * it to be either a %rax- or %rcx-relative
2020 * instruction (depending on whether those registers
2021 * are used as another operand; or %r8- or %r9-
2022 * relative depending on the value of REX.B). We then
2023 * set that register and generate a movq instruction
2024 * to reset the value.
2025 */
2026 if (tp->ftt_ripmode & FASTTRAP_RIP_X)
2027 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
2028 else
2029 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
2030
2031 if (tp->ftt_ripmode & FASTTRAP_RIP_1)
2032 scratch[i++] = FASTTRAP_MOV_EAX;
2033 else
2034 scratch[i++] = FASTTRAP_MOV_ECX;
2035
2036 switch (tp->ftt_ripmode) {
2037 case FASTTRAP_RIP_1:
2038 reg = ®s64->rax;
2039 uthread->t_dtrace_reg = REG_RAX;
2040 break;
2041 case FASTTRAP_RIP_2:
2042 reg = ®s64->rcx;
2043 uthread->t_dtrace_reg = REG_RCX;
2044 break;
2045 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
2046 reg = ®s64->r8;
2047 uthread->t_dtrace_reg = REG_R8;
2048 break;
2049 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
2050 reg = ®s64->r9;
2051 uthread->t_dtrace_reg = REG_R9;
2052 break;
2053 default:
2054 reg = NULL;
2055 panic("unhandled ripmode in fasttrap_pid_probe64");
2056 }
2057
2058 /* LINTED - alignment */
2059 *(uint64_t *)&scratch[i] = *reg;
2060 uthread->t_dtrace_regv = *reg;
2061 *reg = pc + tp->ftt_size;
2062 i += sizeof (uint64_t);
2063 }
2064
2065 /*
2066 * Generate the branch instruction to what would have
2067 * normally been the subsequent instruction. In 32-bit mode,
2068 * this is just a relative branch; in 64-bit mode this is a
2069 * %rip-relative branch that loads the 64-bit pc value
2070 * immediately after the jmp instruction.
2071 */
2072 scratch[i++] = FASTTRAP_GROUP5_OP;
2073 scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
2074 /* LINTED - alignment */
2075 *(uint32_t *)&scratch[i] = 0;
2076 i += sizeof (uint32_t);
2077 /* LINTED - alignment */
2078 *(uint64_t *)&scratch[i] = pc + tp->ftt_size;
2079 i += sizeof (uint64_t);
2080
2081 uthread->t_dtrace_astpc = addr + i;
2082 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
2083 i += tp->ftt_size;
2084 scratch[i++] = FASTTRAP_INT;
2085 scratch[i++] = T_DTRACE_RET;
2086
2087 ASSERT(i <= sizeof (scratch));
2088
2089 if (fasttrap_copyout(scratch, write_addr, i)) {
2090 fasttrap_sigtrap(p, uthread, pc);
2091 new_pc = pc;
2092 break;
2093 }
2094
2095 if (tp->ftt_retids != NULL) {
2096 uthread->t_dtrace_step = 1;
2097 uthread->t_dtrace_ret = 1;
2098 new_pc = uthread->t_dtrace_astpc;
2099 } else {
2100 new_pc = uthread->t_dtrace_scrpc;
2101 }
2102
2103 uthread->t_dtrace_pc = pc;
2104 uthread->t_dtrace_npc = pc + tp->ftt_size;
2105 uthread->t_dtrace_on = 1;
2106 break;
2107 }
2108
2109 default:
2110 panic("fasttrap: mishandled an instruction");
2111 }
2112
2113 done:
2114 /*
2115 * APPLE NOTE:
2116 *
2117 * We're setting this earlier than Solaris does, to get a "correct"
2118 * ustack() output. In the Sun code, a() -> b() -> c() -> d() is
2119 * reported at: d, b, a. The new way gives c, b, a, which is closer
2120 * to correct, as the return instruction has already exectued.
2121 */
2122 regs64->isf.rip = new_pc;
2123
2124
2125 /*
2126 * If there were no return probes when we first found the tracepoint,
2127 * we should feel no obligation to honor any return probes that were
2128 * subsequently enabled -- they'll just have to wait until the next
2129 * time around.
2130 */
2131 if (tp->ftt_retids != NULL) {
2132 /*
2133 * We need to wait until the results of the instruction are
2134 * apparent before invoking any return probes. If this
2135 * instruction was emulated we can just call
2136 * fasttrap_return_common(); if it needs to be executed, we
2137 * need to wait until the user thread returns to the kernel.
2138 */
2139 if (tp->ftt_type != FASTTRAP_T_COMMON) {
2140 fasttrap_return_common(regs, pc, pid, new_pc);
2141 } else {
2142 ASSERT(uthread->t_dtrace_ret != 0);
2143 ASSERT(uthread->t_dtrace_pc == pc);
2144 ASSERT(uthread->t_dtrace_scrpc != 0);
2145 ASSERT(new_pc == uthread->t_dtrace_astpc);
2146 }
2147 }
2148
2149 return (0);
2150 }
2151
2152 int
fasttrap_pid_probe(x86_saved_state_t * regs)2153 fasttrap_pid_probe(x86_saved_state_t *regs)
2154 {
2155 if (is_saved_state64(regs))
2156 return fasttrap_pid_probe64(regs);
2157
2158 return fasttrap_pid_probe32(regs);
2159 }
2160
2161 int
fasttrap_return_probe(x86_saved_state_t * regs)2162 fasttrap_return_probe(x86_saved_state_t *regs)
2163 {
2164 x86_saved_state64_t *regs64;
2165 x86_saved_state32_t *regs32;
2166 unsigned int p_model;
2167
2168 if (is_saved_state64(regs)) {
2169 regs64 = saved_state64(regs);
2170 regs32 = NULL;
2171 p_model = DATAMODEL_LP64;
2172 } else {
2173 regs64 = NULL;
2174 regs32 = saved_state32(regs);
2175 p_model = DATAMODEL_ILP32;
2176 }
2177
2178 proc_t *p = current_proc();
2179 uthread_t uthread = current_uthread();
2180 user_addr_t pc = uthread->t_dtrace_pc;
2181 user_addr_t npc = uthread->t_dtrace_npc;
2182
2183 uthread->t_dtrace_pc = 0;
2184 uthread->t_dtrace_npc = 0;
2185 uthread->t_dtrace_scrpc = 0;
2186 uthread->t_dtrace_astpc = 0;
2187
2188
2189 /*
2190 * We set rp->r_pc to the address of the traced instruction so
2191 * that it appears to dtrace_probe() that we're on the original
2192 * instruction, and so that the user can't easily detect our
2193 * complex web of lies. dtrace_return_probe() (our caller)
2194 * will correctly set %pc after we return.
2195 */
2196 if (p_model == DATAMODEL_LP64)
2197 regs64->isf.rip = pc;
2198 else
2199 regs32->eip = pc;
2200
2201 fasttrap_return_common(regs, pc, proc_getpid(p), npc);
2202
2203 return (0);
2204 }
2205
2206 uint64_t
fasttrap_pid_getarg(void * arg,dtrace_id_t id,void * parg,int argno,int aframes)2207 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2208 int aframes)
2209 {
2210 pal_register_cache_state(current_thread(), VALID);
2211 #pragma unused(arg, id, parg, aframes)
2212 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 1, argno));
2213 }
2214
2215 uint64_t
fasttrap_usdt_getarg(void * arg,dtrace_id_t id,void * parg,int argno,int aframes)2216 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
2217 int aframes)
2218 {
2219 pal_register_cache_state(current_thread(), VALID);
2220 #pragma unused(arg, id, parg, aframes)
2221 return (fasttrap_anarg((x86_saved_state_t *)find_user_regs(current_thread()), 0, argno));
2222 }
2223
2224 /*
2225 * APPLE NOTE: See comments by regmap array definition. We are cheating
2226 * when returning 32 bit registers.
2227 */
2228 static user_addr_t
fasttrap_getreg(x86_saved_state_t * regs,uint_t reg)2229 fasttrap_getreg(x86_saved_state_t *regs, uint_t reg)
2230 {
2231 if (is_saved_state64(regs)) {
2232 x86_saved_state64_t *regs64 = saved_state64(regs);
2233
2234 switch (reg) {
2235 case REG_RAX: return regs64->rax;
2236 case REG_RCX: return regs64->rcx;
2237 case REG_RDX: return regs64->rdx;
2238 case REG_RBX: return regs64->rbx;
2239 case REG_RSP: return regs64->isf.rsp;
2240 case REG_RBP: return regs64->rbp;
2241 case REG_RSI: return regs64->rsi;
2242 case REG_RDI: return regs64->rdi;
2243 case REG_R8: return regs64->r8;
2244 case REG_R9: return regs64->r9;
2245 case REG_R10: return regs64->r10;
2246 case REG_R11: return regs64->r11;
2247 case REG_R12: return regs64->r12;
2248 case REG_R13: return regs64->r13;
2249 case REG_R14: return regs64->r14;
2250 case REG_R15: return regs64->r15;
2251 case REG_TRAPNO: return regs64->isf.trapno;
2252 case REG_ERR: return regs64->isf.err;
2253 case REG_RIP: return regs64->isf.rip;
2254 case REG_CS: return regs64->isf.cs;
2255 case REG_RFL: return regs64->isf.rflags;
2256 case REG_SS: return regs64->isf.ss;
2257 case REG_FS: return regs64->fs;
2258 case REG_GS: return regs64->gs;
2259 case REG_ES:
2260 case REG_DS:
2261 case REG_FSBASE:
2262 case REG_GSBASE:
2263 // Important to distinguish these requests (which should be legal) from other values.
2264 panic("dtrace: unimplemented x86_64 getreg()");
2265 }
2266
2267 panic("dtrace: unhandled x86_64 getreg() constant");
2268 } else {
2269 x86_saved_state32_t *regs32 = saved_state32(regs);
2270
2271 switch (reg) {
2272 case REG_RAX: return regs32->eax;
2273 case REG_RCX: return regs32->ecx;
2274 case REG_RDX: return regs32->edx;
2275 case REG_RBX: return regs32->ebx;
2276 case REG_RSP: return regs32->uesp;
2277 case REG_RBP: return regs32->ebp;
2278 case REG_RSI: return regs32->esi;
2279 case REG_RDI: return regs32->edi;
2280 }
2281
2282 panic("dtrace: unhandled i386 getreg() constant");
2283 }
2284
2285 return 0;
2286 }
2287