xref: /xnu-11417.121.6/pexpert/pexpert/arm/dockchannel.h (revision a1e26a70f38d1d7daa7b49b258e2f8538ad81650) !
1 /*
2  * Copyright (c) 2024 Apple Inc. All rights reserved.
3  *
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8  * Version 2.0 (the 'License'). You may not use this file except in
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27  */
28 #ifndef _PEXPERT_ARM_DOCKCHANNEL_H
29 #define _PEXPERT_ARM_DOCKCHANNEL_H
30 
31 #define DOCKCHANNEL_UART                        (1)
32 #define DOCKCHANNEL_STRIDE                      (0x10000)
33 
34 // Channel index
35 #define DOCKCHANNEL_UART_CHANNEL                (0)
36 
37 /* Dock Agent Interrupt Control Register */
38 #define rDOCKCHANNELS_AGENT_AP_INTR_CTRL(_agent_base)        ((uintptr_t) ((_agent_base) + 0x00))
39 
40 /* When this bit is set, the write watermark interrupt of Dock Channel 0 on the device side is enabled */
41 #define DC0_WR_DEVICE_EN        (1U << 0)
42 /* When this bit is set, the read watermark interrupt of Dock Channel 0 on the device side is enabled */
43 #define DC0_RD_DEVICE_EN        (1U << 1)
44 
45 /* Dock Agent Interrupt Status Register */
46 #define rDOCKCHANNELS_AGENT_AP_INTR_STATUS(_agent_base)      ((uintptr_t) ((_agent_base) + 0x04))
47 
48 /**
49  * This bit is set when the write watermark interrupt of Dock Channel 0 on the device side is
50  * asserted. This bit remains set until cleared by SW by writing a 1.
51  */
52 #define DC0_WR_DEVICE_STAT      (1U << 0)
53 /**
54  * This bit is set when the read watermark interrupt of Dock Channel 0 on the device side is
55  * asserted. This bit remains set until cleared by SW by writing a 1.
56  */
57 #define DC0_RD_DEVICE_STAT      (1U << 1)
58 
59 /* Dock Agent Error Interrupt Control Register */
60 #define rDOCKCHANNELS_AGENT_AP_ERR_INTR_CTRL(_agent_base)    ((uintptr_t) ((_agent_base) + 0x08))
61 
62 /* When this bit is set, the error interrupt of Dock Channel 0 on the device side is enabled */
63 #define DC0_ERROR_DEVICE_EN     (1U << 0)
64 /* When this bit is set, the error interrupt of Dock Channel 0 on the dock side is enabled */
65 #define DC0_ERROR_DOCK_EN       (1U << 1)
66 
67 /* Dock Agent Error Interrupt Status Register */
68 #define rDOCKCHANNELS_AGENT_AP_ERR_INTR_STATUS(_agent_base)  ((uintptr_t) ((_agent_base) + 0x0c))
69 /**
70  * This bit is set when the error interrupt of Dock Channel 0 on the device side is asserted.
71  * This bit remains set until cleared by SW by writing a 1.
72  */
73 #define DC0_ERR_DEVICE_STAT     (1U << 0)
74 /**
75  * This bit is set when the error interrupt of Dock Channel 0 on the dock side is asserted.
76  * This bit remains set until cleared by SW by writing a 1.
77  */
78 #define DC0_ERR_DOCK_STAT       (1U << 1)
79 
80 #define rDOCKCHANNELS_DEV_WR_WATERMARK(_base, _ch)     ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x0000))
81 #define rDOCKCHANNELS_DEV_RD_WATERMARK(_base, _ch)     ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x0004))
82 #define rDOCKCHANNELS_DEV_DRAIN_CFG(_base, _ch)        ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x0008))
83 
84 #define rDOCKCHANNELS_DEV_WDATA1(_base, _ch)           ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x4004))
85 #define rDOCKCHANNELS_DEV_WSTAT(_base, _ch)            ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x4014))
86 #define rDOCKCHANNELS_DEV_RDATA0(_base, _ch)           ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x4018))
87 #define rDOCKCHANNELS_DEV_RDATA1(_base, _ch)           ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0x401c))
88 
89 #define rDOCKCHANNELS_DOCK_RDATA1(_base, _ch)          ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0xc01c))
90 #define rDOCKCHANNELS_DOCK_RDATA3(_base, _ch)          ((uintptr_t) ((_base) + ((_ch) * DOCKCHANNEL_STRIDE) + 0xc024))
91 
92 #endif  /* !_PEXPERT_ARM_DOCKCHANNEL_H */
93