1 /*
2 * Copyright (c) 2007-2010 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 #include <mach/machine.h>
30 #include <mach/processor.h>
31 #include <kern/kalloc.h>
32 #include <i386/cpu_affinity.h>
33 #include <i386/cpu_topology.h>
34 #include <i386/cpu_threads.h>
35 #include <i386/machine_cpu.h>
36 #include <i386/bit_routines.h>
37 #include <i386/cpu_data.h>
38 #include <i386/lapic.h>
39 #include <i386/machine_routines.h>
40 #include <stddef.h>
41
42 __private_extern__ void qsort(
43 void * array,
44 size_t nmembers,
45 size_t member_size,
46 int (*)(const void *, const void *));
47
48 static int lapicid_cmp(const void *x, const void *y);
49 static x86_affinity_set_t *find_cache_affinity(x86_cpu_cache_t *L2_cachep);
50
51 x86_affinity_set_t *x86_affinities = NULL;
52 static int x86_affinity_count = 0;
53
54 extern cpu_data_t cpshadows[];
55
56 #if DEVELOPMENT || DEBUG
57 void traptrace_init(void);
58 #endif /* DEVELOPMENT || DEBUG */
59
60
61 /* Re-sort double-mapped CPU data shadows after topology discovery sorts the
62 * primary CPU data structures by physical/APIC CPU ID.
63 */
64 static void
cpu_shadow_sort(int ncpus)65 cpu_shadow_sort(int ncpus)
66 {
67 for (int i = 0; i < ncpus; i++) {
68 cpu_data_t *cpup = cpu_datap(i);
69 ptrdiff_t coff = cpup - cpu_datap(0);
70
71 cpup->cd_shadow = &cpshadows[coff];
72 }
73 }
74
75 /*
76 * cpu_topology_sort() is called after all processors have been registered but
77 * before any non-boot processor is started. We establish canonical logical
78 * processor numbering - logical cpus must be contiguous, zero-based and
79 * assigned in physical (local apic id) order. This step is required because
80 * the discovery/registration order is non-deterministic - cores are registered
81 * in differing orders over boots. Enforcing canonical numbering simplifies
82 * identification of processors.
83 */
84 void
cpu_topology_sort(int ncpus)85 cpu_topology_sort(int ncpus)
86 {
87 int i;
88 boolean_t istate;
89 processor_t lprim = NULL;
90
91 assert(machine_info.physical_cpu == 1);
92 assert(machine_info.logical_cpu == 1);
93 assert(master_cpu == 0);
94 assert(cpu_number() == 0);
95 assert(cpu_datap(0)->cpu_number == 0);
96
97 uint32_t cpus_per_pset = 0;
98
99 #if DEVELOPMENT || DEBUG
100 PE_parse_boot_argn("cpus_per_pset", &cpus_per_pset, sizeof(cpus_per_pset));
101 #endif
102
103 /* Lights out for this */
104 istate = ml_set_interrupts_enabled(FALSE);
105
106 if (topo_dbg) {
107 TOPO_DBG("cpu_topology_start() %d cpu%s registered\n",
108 ncpus, (ncpus > 1) ? "s" : "");
109 for (i = 0; i < ncpus; i++) {
110 cpu_data_t *cpup = cpu_datap(i);
111 TOPO_DBG("\tcpu_data[%d]:%p local apic 0x%x\n",
112 i, (void *) cpup, cpup->cpu_phys_number);
113 }
114 }
115
116 /*
117 * Re-order the cpu_data_ptr vector sorting by physical id.
118 * Skip the boot processor, it's required to be correct.
119 */
120 if (ncpus > 1) {
121 qsort((void *) &cpu_data_ptr[1],
122 ncpus - 1,
123 sizeof(cpu_data_t *),
124 lapicid_cmp);
125 }
126 if (topo_dbg) {
127 TOPO_DBG("cpu_topology_start() after sorting:\n");
128 for (i = 0; i < ncpus; i++) {
129 cpu_data_t *cpup = cpu_datap(i);
130 TOPO_DBG("\tcpu_data[%d]:%p local apic 0x%x\n",
131 i, (void *) cpup, cpup->cpu_phys_number);
132 }
133 }
134
135 /*
136 * Finalize logical numbers and map kept by the lapic code.
137 */
138 for (i = 0; i < ncpus; i++) {
139 cpu_data_t *cpup = cpu_datap(i);
140
141 if (cpup->cpu_number != i) {
142 kprintf("cpu_datap(%d):%p local apic id 0x%x "
143 "remapped from %d\n",
144 i, cpup, cpup->cpu_phys_number,
145 cpup->cpu_number);
146 }
147 cpup->cpu_number = i;
148 lapic_cpu_map(cpup->cpu_phys_number, i);
149 x86_set_logical_topology(&cpup->lcpu, cpup->cpu_phys_number, i);
150 }
151
152 cpu_shadow_sort(ncpus);
153 x86_validate_topology();
154
155 ml_set_interrupts_enabled(istate);
156 TOPO_DBG("cpu_topology_start() LLC is L%d\n", topoParms.LLCDepth + 1);
157
158 #if DEVELOPMENT || DEBUG
159 traptrace_init();
160 #endif /* DEVELOPMENT || DEBUG */
161
162 /*
163 * Let the CPU Power Management know that the topology is stable.
164 */
165 topoParms.stable = TRUE;
166 pmCPUStateInit();
167
168 /*
169 * Iterate over all logical cpus finding or creating the affinity set
170 * for their LLC cache. Each affinity set possesses a processor set
171 * into which each logical processor is added.
172 */
173 TOPO_DBG("cpu_topology_start() creating affinity sets:ncpus=%d max_cpus=%d\n", ncpus, machine_info.max_cpus);
174
175 uint32_t pset_cluster_id = 0;
176 for (i = 0; i < machine_info.max_cpus; i++) {
177 cpu_data_t *cpup = cpu_datap(i);
178 x86_lcpu_t *lcpup = cpu_to_lcpu(i);
179 x86_cpu_cache_t *LLC_cachep;
180 x86_affinity_set_t *aset;
181
182 LLC_cachep = lcpup->caches[topoParms.LLCDepth];
183 assert(LLC_cachep->type == CPU_CACHE_TYPE_UNIF);
184 aset = find_cache_affinity(LLC_cachep);
185 if ((aset == NULL) || ((cpus_per_pset != 0) && (i % cpus_per_pset) == 0)) {
186 aset = kalloc_type(x86_affinity_set_t, Z_WAITOK | Z_NOFAIL);
187 aset->next = x86_affinities;
188 x86_affinities = aset;
189 aset->num = x86_affinity_count++;
190 aset->cache = LLC_cachep;
191 if (i == master_cpu) {
192 aset->pset = processor_pset(master_processor);
193 } else {
194 pset_cluster_id++;
195 aset->pset = pset_create(pset_node_root(), PSET_SMP, pset_cluster_id, pset_cluster_id);
196 if (aset->pset == PROCESSOR_SET_NULL) {
197 panic("cpu_topology_start: pset_create");
198 }
199 }
200 TOPO_DBG("\tnew set %p(%d) pset %p for cache %p\n",
201 aset, aset->num, aset->pset, aset->cache);
202 }
203
204 TOPO_DBG("\tprocessor_init set %p(%d) lcpup %p(%d) cpu %p processor %p\n",
205 aset, aset->num, lcpup, lcpup->cpu_num, cpup, cpup->cpu_processor);
206
207 if (i != master_cpu) {
208 processor_init(cpup->cpu_processor, i, aset->pset);
209 }
210
211 if (lcpup->core->num_lcpus > 1) {
212 if (lcpup->lnum == 0) {
213 lprim = cpup->cpu_processor;
214 }
215
216 processor_set_primary(cpup->cpu_processor, lprim);
217 }
218 }
219
220 if (machine_info.max_cpus < machine_info.logical_cpu_max) {
221 /* boot-args cpus=n is set, so adjust max numbers to match */
222 int logical_max = machine_info.max_cpus;
223 int physical_max = logical_max;
224 if (machine_info.logical_cpu_max != machine_info.physical_cpu_max) {
225 physical_max = (logical_max + 1) / 2;
226 }
227 machine_info.logical_cpu_max = logical_max;
228 machine_info.physical_cpu_max = physical_max;
229 }
230 }
231
232 /* We got a request to start a CPU. Check that this CPU is within the
233 * max cpu limit set before we do.
234 */
235 kern_return_t
cpu_topology_start_cpu(int cpunum)236 cpu_topology_start_cpu( int cpunum )
237 {
238 int ncpus = machine_info.max_cpus;
239 int i = cpunum;
240
241 /* Decide whether to start a CPU, and actually start it */
242 TOPO_DBG("cpu_topology_start() processor_start():\n");
243 if (i < ncpus) {
244 TOPO_DBG("\tlcpu %d\n", cpu_datap(i)->cpu_number);
245 processor_start(cpu_datap(i)->cpu_processor);
246 return KERN_SUCCESS;
247 } else {
248 return KERN_FAILURE;
249 }
250 }
251
252 static int
lapicid_cmp(const void * x,const void * y)253 lapicid_cmp(const void *x, const void *y)
254 {
255 cpu_data_t *cpu_x = *((cpu_data_t **)(uintptr_t)x);
256 cpu_data_t *cpu_y = *((cpu_data_t **)(uintptr_t)y);
257
258 TOPO_DBG("lapicid_cmp(%p,%p) (%d,%d)\n",
259 x, y, cpu_x->cpu_phys_number, cpu_y->cpu_phys_number);
260 if (cpu_x->cpu_phys_number < cpu_y->cpu_phys_number) {
261 return -1;
262 }
263 if (cpu_x->cpu_phys_number == cpu_y->cpu_phys_number) {
264 return 0;
265 }
266 return 1;
267 }
268
269 static x86_affinity_set_t *
find_cache_affinity(x86_cpu_cache_t * l2_cachep)270 find_cache_affinity(x86_cpu_cache_t *l2_cachep)
271 {
272 x86_affinity_set_t *aset;
273
274 for (aset = x86_affinities; aset != NULL; aset = aset->next) {
275 if (l2_cachep == aset->cache) {
276 break;
277 }
278 }
279 return aset;
280 }
281
282 int
ml_get_max_affinity_sets(void)283 ml_get_max_affinity_sets(void)
284 {
285 return x86_affinity_count;
286 }
287
288 processor_set_t
ml_affinity_to_pset(uint32_t affinity_num)289 ml_affinity_to_pset(uint32_t affinity_num)
290 {
291 x86_affinity_set_t *aset;
292
293 for (aset = x86_affinities; aset != NULL; aset = aset->next) {
294 if (affinity_num == aset->num) {
295 break;
296 }
297 }
298 return (aset == NULL) ? PROCESSOR_SET_NULL : aset->pset;
299 }
300
301 uint64_t
ml_cpu_cache_size(unsigned int level)302 ml_cpu_cache_size(unsigned int level)
303 {
304 x86_cpu_cache_t *cachep;
305
306 if (level == 0) {
307 return machine_info.max_mem;
308 } else if (1 <= level && level <= MAX_CACHE_DEPTH) {
309 cachep = current_cpu_datap()->lcpu.caches[level - 1];
310 return cachep ? cachep->cache_size : 0;
311 } else {
312 return 0;
313 }
314 }
315
316 unsigned int
ml_cpu_cache_sharing(unsigned int level,cluster_type_t cluster_type __unused,bool include_all_cpu_types __unused)317 ml_cpu_cache_sharing(unsigned int level, cluster_type_t cluster_type __unused, bool include_all_cpu_types __unused)
318 {
319 x86_cpu_cache_t *cachep;
320
321 if (level == 0) {
322 return machine_info.max_cpus;
323 } else if (1 <= level && level <= MAX_CACHE_DEPTH) {
324 cachep = current_cpu_datap()->lcpu.caches[level - 1];
325 return cachep ? cachep->nlcpus : 0;
326 } else {
327 return 0;
328 }
329 }
330
331 #if DEVELOPMENT || DEBUG
332
333 volatile int traptrace_enabled = 1;
334 uint32_t traptrace_entries_per_cpu = 0;
335 uint32_t PERCPU_DATA(traptrace_next);
336 traptrace_entry_t *PERCPU_DATA(traptrace_ring);
337
338 static void
init_traptrace_bufs(int entries_per_cpu)339 init_traptrace_bufs(int entries_per_cpu)
340 {
341 size_t size = entries_per_cpu * sizeof(traptrace_entry_t);
342
343 percpu_foreach(ring, traptrace_ring) {
344 *ring = zalloc_permanent_tag(size, 63, VM_KERN_MEMORY_DIAG);
345 };
346
347 traptrace_entries_per_cpu = entries_per_cpu;
348 }
349
350 static void
gentrace_configure_from_bootargs(const char * ena_prop,int * ena_valp,const char * epc_prop,int * epcp,int max_epc,int def_epc,int override)351 gentrace_configure_from_bootargs(const char *ena_prop, int *ena_valp, const char *epc_prop,
352 int *epcp, int max_epc, int def_epc, int override)
353 {
354 if (kern_feature_override(override)) {
355 *ena_valp = 0;
356 }
357
358 (void) PE_parse_boot_argn(ena_prop, ena_valp, sizeof(*ena_valp));
359
360 if (*ena_valp == 0) {
361 return;
362 }
363
364 if (PE_parse_boot_argn(epc_prop, epcp, sizeof(*epcp)) &&
365 (*epcp < 1 || *epcp > max_epc)) {
366 *epcp = def_epc;
367 }
368 }
369
370 void
traptrace_init(void)371 traptrace_init(void)
372 {
373 int entries_per_cpu = DEFAULT_TRAPTRACE_ENTRIES_PER_CPU;
374 int enable = traptrace_enabled;
375
376 gentrace_configure_from_bootargs("traptrace", &enable, "traptrace_epc", &entries_per_cpu,
377 TRAPTRACE_MAX_ENTRIES_PER_CPU, DEFAULT_TRAPTRACE_ENTRIES_PER_CPU, KF_TRAPTRACE_OVRD);
378
379 traptrace_enabled = enable;
380
381 if (traptrace_enabled) {
382 init_traptrace_bufs(entries_per_cpu);
383 }
384 }
385
386 #endif /* DEVELOPMENT || DEBUG */
387