1 /*
2 * Copyright (c) 2000-2024 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31 /*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or [email protected]
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56
57 #include <mach_ldebug.h>
58
59 #include <sys/kdebug.h>
60
61 #include <mach/kern_return.h>
62 #include <mach/thread_status.h>
63 #include <mach/vm_param.h>
64
65 #include <kern/kalloc.h>
66 #include <kern/mach_param.h>
67 #include <kern/processor.h>
68 #include <kern/cpu_data.h>
69 #include <kern/cpu_number.h>
70 #include <kern/task.h>
71 #include <kern/thread.h>
72 #include <kern/sched_prim.h>
73 #include <kern/misc_protos.h>
74 #include <kern/assert.h>
75 #include <kern/spl.h>
76 #include <kern/machine.h>
77 #include <kern/kpc.h>
78 #include <ipc/ipc_port.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_map_xnu.h>
81 #include <vm/pmap.h>
82 #include <vm/vm_protos.h>
83
84 #include <i386/cpu_data.h>
85 #include <i386/cpu_number.h>
86 #include <i386/eflags.h>
87 #include <i386/proc_reg.h>
88 #include <i386/fpu.h>
89 #include <i386/misc_protos.h>
90 #include <i386/mp_desc.h>
91 #include <i386/thread.h>
92 #include <i386/machine_routines.h>
93 #include <i386/lapic.h> /* LAPIC_PMC_SWI_VECTOR */
94 #include <i386/seg.h>
95
96 #if HYPERVISOR
97 #include <kern/hv_support.h>
98 #endif
99
100 #include <san/kcov_stksz.h>
101
102
103 /*
104 * Maps state flavor to number of words in the state:
105 */
106 unsigned int _MachineStateCount[THREAD_STATE_FLAVORS] = {
107 [x86_THREAD_STATE32] = x86_THREAD_STATE32_COUNT,
108 [x86_THREAD_STATE64] = x86_THREAD_STATE64_COUNT,
109 [x86_THREAD_FULL_STATE64] = x86_THREAD_FULL_STATE64_COUNT,
110 [x86_THREAD_STATE] = x86_THREAD_STATE_COUNT,
111 [x86_FLOAT_STATE32] = x86_FLOAT_STATE32_COUNT,
112 [x86_FLOAT_STATE64] = x86_FLOAT_STATE64_COUNT,
113 [x86_FLOAT_STATE] = x86_FLOAT_STATE_COUNT,
114 [x86_EXCEPTION_STATE32] = x86_EXCEPTION_STATE32_COUNT,
115 [x86_EXCEPTION_STATE64] = x86_EXCEPTION_STATE64_COUNT,
116 [x86_EXCEPTION_STATE] = x86_EXCEPTION_STATE_COUNT,
117 [x86_DEBUG_STATE32] = x86_DEBUG_STATE32_COUNT,
118 [x86_DEBUG_STATE64] = x86_DEBUG_STATE64_COUNT,
119 [x86_DEBUG_STATE] = x86_DEBUG_STATE_COUNT,
120 [x86_AVX_STATE32] = x86_AVX_STATE32_COUNT,
121 [x86_AVX_STATE64] = x86_AVX_STATE64_COUNT,
122 [x86_AVX_STATE] = x86_AVX_STATE_COUNT,
123 [x86_AVX512_STATE32] = x86_AVX512_STATE32_COUNT,
124 [x86_AVX512_STATE64] = x86_AVX512_STATE64_COUNT,
125 [x86_AVX512_STATE] = x86_AVX512_STATE_COUNT,
126 [x86_PAGEIN_STATE] = x86_PAGEIN_STATE_COUNT,
127 [x86_INSTRUCTION_STATE] = x86_INSTRUCTION_STATE_COUNT,
128 [x86_LAST_BRANCH_STATE] = x86_LAST_BRANCH_STATE_COUNT
129 };
130
131 ZONE_DEFINE_TYPE(iss_zone, "x86_64 saved state",
132 x86_saved_state_t, ZC_NONE);
133
134 ZONE_DEFINE_TYPE(ids_zone, "x86_64 debug state",
135 x86_debug_state64_t, ZC_NONE);
136
137 /* Forward */
138
139 extern void Thread_continue(void);
140 extern void Load_context(
141 thread_t thread) __attribute__((noreturn));
142
143 static void
144 get_exception_state32(thread_t thread, x86_exception_state32_t *es);
145
146 static void
147 get_exception_state64(thread_t thread, x86_exception_state64_t *es);
148
149 static void
150 get_thread_state32(thread_t thread, x86_thread_state32_t *ts);
151
152 static void
153 get_thread_state64(thread_t thread, void *ts, boolean_t full);
154
155 static int
156 set_thread_state32(thread_t thread, x86_thread_state32_t *ts);
157
158 static int
159 set_thread_state64(thread_t thread, void *ts, boolean_t full);
160
161 /*
162 * Don't let an illegal value for the lower 32-bits of dr7 get set.
163 * Specifically, check for undefined settings. Setting these bit patterns
164 * result in undefined behaviour and can lead to an unexpected
165 * TRCTRAP.
166 */
167 static boolean_t
dr7d_is_valid(uint32_t * dr7d)168 dr7d_is_valid(uint32_t *dr7d)
169 {
170 int i;
171 uint32_t mask1, mask2;
172
173 /*
174 * If the DE bit is set in CR4, R/W0-3 can be pattern
175 * "10B" to indicate i/o reads and write
176 */
177 if (!(get_cr4() & CR4_DE)) {
178 for (i = 0, mask1 = 0x3 << 16, mask2 = 0x2 << 16; i < 4;
179 i++, mask1 <<= 4, mask2 <<= 4) {
180 if ((*dr7d & mask1) == mask2) {
181 return FALSE;
182 }
183 }
184 }
185
186 /*
187 * if we are doing an instruction execution break (indicated
188 * by r/w[x] being "00B"), then the len[x] must also be set
189 * to "00B"
190 */
191 for (i = 0; i < 4; i++) {
192 if (((((*dr7d >> (16 + i * 4))) & 0x3) == 0) &&
193 ((((*dr7d >> (18 + i * 4))) & 0x3) != 0)) {
194 return FALSE;
195 }
196 }
197
198 /*
199 * Intel docs have these bits fixed.
200 */
201 *dr7d |= 0x1 << 10; /* set bit 10 to 1 */
202 *dr7d &= ~(0x1 << 11); /* set bit 11 to 0 */
203 *dr7d &= ~(0x1 << 12); /* set bit 12 to 0 */
204 *dr7d &= ~(0x1 << 14); /* set bit 14 to 0 */
205 *dr7d &= ~(0x1 << 15); /* set bit 15 to 0 */
206
207 /*
208 * We don't allow anything to set the global breakpoints.
209 */
210
211 if (*dr7d & 0x2) {
212 return FALSE;
213 }
214
215 if (*dr7d & (0x2 << 2)) {
216 return FALSE;
217 }
218
219 if (*dr7d & (0x2 << 4)) {
220 return FALSE;
221 }
222
223 if (*dr7d & (0x2 << 6)) {
224 return FALSE;
225 }
226
227 return TRUE;
228 }
229
230 extern void set_64bit_debug_regs(x86_debug_state64_t *ds);
231
232 boolean_t
debug_state_is_valid32(x86_debug_state32_t * ds)233 debug_state_is_valid32(x86_debug_state32_t *ds)
234 {
235 if (!dr7d_is_valid(&ds->dr7)) {
236 return FALSE;
237 }
238
239 return TRUE;
240 }
241
242 boolean_t
debug_state_is_valid64(x86_debug_state64_t * ds)243 debug_state_is_valid64(x86_debug_state64_t *ds)
244 {
245 if (!dr7d_is_valid((uint32_t *)&ds->dr7)) {
246 return FALSE;
247 }
248
249 /*
250 * Don't allow the user to set debug addresses above their max
251 * value
252 */
253 if (ds->dr7 & 0x1) {
254 if (ds->dr0 >= VM_MAX_PAGE_ADDRESS) {
255 return FALSE;
256 }
257 }
258
259 if (ds->dr7 & (0x1 << 2)) {
260 if (ds->dr1 >= VM_MAX_PAGE_ADDRESS) {
261 return FALSE;
262 }
263 }
264
265 if (ds->dr7 & (0x1 << 4)) {
266 if (ds->dr2 >= VM_MAX_PAGE_ADDRESS) {
267 return FALSE;
268 }
269 }
270
271 if (ds->dr7 & (0x1 << 6)) {
272 if (ds->dr3 >= VM_MAX_PAGE_ADDRESS) {
273 return FALSE;
274 }
275 }
276
277 /* For x86-64, we must ensure the upper 32-bits of DR7 are clear */
278 ds->dr7 &= 0xffffffffULL;
279
280 return TRUE;
281 }
282
283
284 static kern_return_t
set_debug_state32(thread_t thread,x86_debug_state32_t * ds)285 set_debug_state32(thread_t thread, x86_debug_state32_t *ds)
286 {
287 x86_debug_state32_t *new_ids;
288 pcb_t pcb;
289
290 pcb = THREAD_TO_PCB(thread);
291
292 if (debug_state_is_valid32(ds) != TRUE) {
293 return KERN_INVALID_ARGUMENT;
294 }
295
296 if (pcb->ids == NULL) {
297 new_ids = zalloc_flags(ids_zone, Z_WAITOK | Z_ZERO);
298
299 simple_lock(&pcb->lock, LCK_GRP_NULL);
300 /* make sure it wasn't already alloc()'d elsewhere */
301 if (pcb->ids == NULL) {
302 pcb->ids = new_ids;
303 simple_unlock(&pcb->lock);
304 } else {
305 simple_unlock(&pcb->lock);
306 zfree(ids_zone, new_ids);
307 }
308 }
309
310
311 copy_debug_state32(ds, pcb->ids, FALSE);
312
313 return KERN_SUCCESS;
314 }
315
316 static kern_return_t
set_debug_state64(thread_t thread,x86_debug_state64_t * ds)317 set_debug_state64(thread_t thread, x86_debug_state64_t *ds)
318 {
319 x86_debug_state64_t *new_ids;
320 pcb_t pcb;
321
322 pcb = THREAD_TO_PCB(thread);
323
324 if (debug_state_is_valid64(ds) != TRUE) {
325 return KERN_INVALID_ARGUMENT;
326 }
327
328 if (pcb->ids == NULL) {
329 new_ids = zalloc_flags(ids_zone, Z_WAITOK | Z_ZERO);
330
331 #if HYPERVISOR
332 if (thread->hv_thread_target) {
333 hv_callbacks.volatile_state(thread->hv_thread_target,
334 HV_DEBUG_STATE);
335 }
336 #endif
337
338 simple_lock(&pcb->lock, LCK_GRP_NULL);
339 /* make sure it wasn't already alloc()'d elsewhere */
340 if (pcb->ids == NULL) {
341 pcb->ids = new_ids;
342 simple_unlock(&pcb->lock);
343 } else {
344 simple_unlock(&pcb->lock);
345 zfree(ids_zone, new_ids);
346 }
347 }
348
349 copy_debug_state64(ds, pcb->ids, FALSE);
350
351 return KERN_SUCCESS;
352 }
353
354 static void
get_debug_state32(thread_t thread,x86_debug_state32_t * ds)355 get_debug_state32(thread_t thread, x86_debug_state32_t *ds)
356 {
357 x86_debug_state32_t *saved_state;
358
359 saved_state = thread->machine.ids;
360
361 if (saved_state) {
362 copy_debug_state32(saved_state, ds, TRUE);
363 } else {
364 bzero(ds, sizeof *ds);
365 }
366 }
367
368 static void
get_debug_state64(thread_t thread,x86_debug_state64_t * ds)369 get_debug_state64(thread_t thread, x86_debug_state64_t *ds)
370 {
371 x86_debug_state64_t *saved_state;
372
373 saved_state = (x86_debug_state64_t *)thread->machine.ids;
374
375 if (saved_state) {
376 copy_debug_state64(saved_state, ds, TRUE);
377 } else {
378 bzero(ds, sizeof *ds);
379 }
380 }
381
382 /*
383 * consider_machine_collect:
384 *
385 * Try to collect machine-dependent pages
386 */
387 void
consider_machine_collect(void)388 consider_machine_collect(void)
389 {
390 }
391
392 void
consider_machine_adjust(void)393 consider_machine_adjust(void)
394 {
395 }
396
397 /*
398 * Switch to the first thread on a CPU.
399 */
400 void
machine_load_context(thread_t new)401 machine_load_context(
402 thread_t new)
403 {
404 new->machine.specFlags |= OnProc;
405 act_machine_switch_pcb(NULL, new);
406 Load_context(new);
407 }
408
409 static void
machine_rsb_stuff(void)410 machine_rsb_stuff(void)
411 {
412 #define RSB_STUFF_SPACE_REQD (256 + 16) /* 256 bytes plus a buffer of another 16 for misc. */
413
414 asm volatile (
415 ".macro RSBST from=0, to=15\n"
416 " call 1f\n"
417 "2:\n"
418 " pause\n"
419 " lfence\n"
420 " jmp 2b\n"
421 "1:\n"
422 " call 1f\n"
423 "2:\n"
424 " pause\n"
425 " lfence\n"
426 " jmp 2b\n"
427 "1:\n"
428 " .if \\to - \\from \n"
429 " RSBST \"(\\from + 1)\", \\to \n"
430 " .endif \n"
431 ".endmacro \n"
432 "\n"
433 "L_rsbst:\n"
434 " RSBST \n"
435 " addq $(16 * 2 * 8), %%rsp\n"
436 ::: "memory", "cc");
437 }
438
439 static inline void
pmap_switch_context(thread_t ot,thread_t nt,int cnum)440 pmap_switch_context(thread_t ot, thread_t nt, int cnum)
441 {
442 pmap_assert(ml_get_interrupts_enabled() == FALSE);
443 vm_map_t nmap = nt->map, omap = ot->map;
444 if ((omap != nmap) || (nmap->pmap->pagezero_accessible)) {
445 PMAP_DEACTIVATE_MAP(omap, ot, cnum);
446 PMAP_ACTIVATE_MAP(nmap, nt, cnum);
447 if (__improbable((nt->machine.mthr_do_segchk & MTHR_RSBST) &&
448 (current_kernel_stack_depth() + RSB_STUFF_SPACE_REQD) < kernel_stack_size)) {
449 machine_rsb_stuff();
450 }
451 }
452 }
453
454 /*
455 * Switch to a new thread.
456 * Save the old thread`s kernel state or continuation,
457 * and return it.
458 */
459 thread_t
machine_switch_context(thread_t old,thread_continue_t continuation,thread_t new)460 machine_switch_context(
461 thread_t old,
462 thread_continue_t continuation,
463 thread_t new)
464 {
465 assert(current_cpu_datap()->cpu_active_stack == old->kernel_stack);
466
467 #if HYPERVISOR
468 if (old->hv_thread_target) {
469 hv_callbacks.preempt(old->hv_thread_target);
470 }
471 #endif
472
473 #if CONFIG_CPU_COUNTERS
474 kpc_off_cpu(old);
475 #endif /* CONFIG_CPU_COUNTERS */
476
477 /*
478 * Save FP registers if in use.
479 */
480 fpu_switch_context(old, new);
481
482 old->machine.specFlags &= ~OnProc;
483 new->machine.specFlags |= OnProc;
484
485 /*
486 * Monitor the stack depth and report new max,
487 * not worrying about races.
488 */
489 vm_offset_t depth = current_kernel_stack_depth();
490 if (depth > kernel_stack_depth_max) {
491 kernel_stack_depth_max = depth;
492 KERNEL_DEBUG_CONSTANT(
493 MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_DEPTH),
494 (long) depth, 0, 0, 0, 0);
495 }
496
497 /*
498 * Switch address maps if need be, even if not switching tasks.
499 * (A server activation may be "borrowing" a client map.)
500 */
501 pmap_switch_context(old, new, cpu_number());
502
503 /*
504 * Load the rest of the user state for the new thread
505 */
506 act_machine_switch_pcb(old, new);
507
508 #if HYPERVISOR
509 if (new->hv_thread_target) {
510 hv_callbacks.dispatch(new->hv_thread_target);
511 }
512 #endif
513
514 return Switch_context(old, continuation, new);
515 }
516
517 boolean_t
machine_thread_on_core(thread_t thread)518 machine_thread_on_core(thread_t thread)
519 {
520 return thread->machine.specFlags & OnProc;
521 }
522
523 boolean_t
machine_thread_on_core_allow_invalid(thread_t thread)524 machine_thread_on_core_allow_invalid(thread_t thread)
525 {
526 extern int _copyin_atomic32(const char *src, uint32_t *dst);
527 uint32_t flags;
528
529 /*
530 * Utilize that the thread zone is sequestered which means
531 * that this kernel-to-kernel copyin can't read data
532 * from anything but a thread, zeroed or freed memory.
533 */
534 assert(get_preemption_level() > 0);
535 if (thread == THREAD_NULL) {
536 return false;
537 }
538 thread_require(thread);
539 if (_copyin_atomic32((void *)&thread->machine.specFlags, &flags) == 0) {
540 return flags & OnProc;
541 }
542 return false;
543 }
544
545 thread_t
machine_processor_shutdown(thread_t thread,void (* doshutdown)(processor_t),processor_t processor)546 machine_processor_shutdown(
547 thread_t thread,
548 void (*doshutdown)(processor_t),
549 processor_t processor)
550 {
551 #if CONFIG_VMX
552 vmx_suspend();
553 #endif
554 fpu_switch_context(thread, NULL);
555 pmap_switch_context(thread, processor->idle_thread, cpu_number());
556 return Shutdown_context(thread, doshutdown, processor);
557 }
558
559
560 /*
561 * This is where registers that are not normally specified by the mach-o
562 * file on an execve would be nullified, perhaps to avoid a covert channel.
563 */
564 void
machine_thread_state_initialize(thread_t thread)565 machine_thread_state_initialize(
566 thread_t thread)
567 {
568 /*
569 * If there's an fpu save area, free it.
570 * The initialized state will then be lazily faulted-in, if required.
571 * And if we're target, re-arm the no-fpu trap.
572 */
573 if (thread->machine.ifps) {
574 (void) fpu_set_fxstate(thread, NULL, x86_FLOAT_STATE64);
575
576 if (thread == current_thread()) {
577 clear_fpu();
578 }
579 }
580
581 if (thread->machine.ids) {
582 zfree(ids_zone, thread->machine.ids);
583 thread->machine.ids = NULL;
584 }
585 }
586
587 uint32_t
get_eflags_exportmask(void)588 get_eflags_exportmask(void)
589 {
590 return EFL_USER_SET;
591 }
592
593 /*
594 * x86_SAVED_STATE32 - internal save/restore general register state on 32/64 bit processors
595 * for 32bit tasks only
596 * x86_SAVED_STATE64 - internal save/restore general register state on 64 bit processors
597 * for 64bit tasks only
598 * x86_THREAD_STATE32 - external set/get general register state on 32/64 bit processors
599 * for 32bit tasks only
600 * x86_THREAD_STATE64 - external set/get general register state on 64 bit processors
601 * for 64bit tasks only
602 * x86_SAVED_STATE - external set/get general register state on 32/64 bit processors
603 * for either 32bit or 64bit tasks
604 * x86_FLOAT_STATE32 - internal/external save/restore float and xmm state on 32/64 bit processors
605 * for 32bit tasks only
606 * x86_FLOAT_STATE64 - internal/external save/restore float and xmm state on 64 bit processors
607 * for 64bit tasks only
608 * x86_FLOAT_STATE - external save/restore float and xmm state on 32/64 bit processors
609 * for either 32bit or 64bit tasks
610 * x86_EXCEPTION_STATE32 - external get exception state on 32/64 bit processors
611 * for 32bit tasks only
612 * x86_EXCEPTION_STATE64 - external get exception state on 64 bit processors
613 * for 64bit tasks only
614 * x86_EXCEPTION_STATE - external get exception state on 323/64 bit processors
615 * for either 32bit or 64bit tasks
616 */
617
618
619 static void
get_exception_state64(thread_t thread,x86_exception_state64_t * es)620 get_exception_state64(thread_t thread, x86_exception_state64_t *es)
621 {
622 x86_saved_state64_t *saved_state;
623
624 saved_state = USER_REGS64(thread);
625
626 es->trapno = saved_state->isf.trapno;
627 es->cpu = saved_state->isf.cpu;
628 es->err = (typeof(es->err))saved_state->isf.err;
629 es->faultvaddr = saved_state->cr2;
630 }
631
632 static void
get_exception_state32(thread_t thread,x86_exception_state32_t * es)633 get_exception_state32(thread_t thread, x86_exception_state32_t *es)
634 {
635 x86_saved_state32_t *saved_state;
636
637 saved_state = USER_REGS32(thread);
638
639 es->trapno = saved_state->trapno;
640 es->cpu = saved_state->cpu;
641 es->err = saved_state->err;
642 es->faultvaddr = saved_state->cr2;
643 }
644
645
646 static int
set_thread_state32(thread_t thread,x86_thread_state32_t * ts)647 set_thread_state32(thread_t thread, x86_thread_state32_t *ts)
648 {
649 x86_saved_state32_t *saved_state;
650
651 pal_register_cache_state(thread, DIRTY);
652
653 saved_state = USER_REGS32(thread);
654
655 /*
656 * Scrub segment selector values:
657 */
658 ts->cs = USER_CS;
659 /*
660 * On a 64 bit kernel, we always override the data segments,
661 * as the actual selector numbers have changed. This also
662 * means that we don't support setting the data segments
663 * manually any more.
664 */
665 ts->ss = USER_DS;
666 ts->ds = USER_DS;
667 ts->es = USER_DS;
668
669 /* Set GS to CTHREAD only if's been established */
670 ts->gs = thread->machine.cthread_self ? USER_CTHREAD : NULL_SEG;
671
672 /* Check segment selectors are safe */
673 if (!valid_user_segment_selectors(ts->cs,
674 ts->ss,
675 ts->ds,
676 ts->es,
677 ts->fs,
678 ts->gs)) {
679 return KERN_INVALID_ARGUMENT;
680 }
681
682 saved_state->eax = ts->eax;
683 saved_state->ebx = ts->ebx;
684 saved_state->ecx = ts->ecx;
685 saved_state->edx = ts->edx;
686 saved_state->edi = ts->edi;
687 saved_state->esi = ts->esi;
688 saved_state->ebp = ts->ebp;
689 saved_state->uesp = ts->esp;
690 saved_state->efl = (ts->eflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
691 saved_state->eip = ts->eip;
692 saved_state->cs = ts->cs;
693 saved_state->ss = ts->ss;
694 saved_state->ds = ts->ds;
695 saved_state->es = ts->es;
696 saved_state->fs = ts->fs;
697 saved_state->gs = ts->gs;
698
699 /*
700 * If the trace trap bit is being set,
701 * ensure that the user returns via iret
702 * - which is signaled thusly:
703 */
704 if ((saved_state->efl & EFL_TF) && saved_state->cs == SYSENTER_CS) {
705 saved_state->cs = SYSENTER_TF_CS;
706 }
707
708 return KERN_SUCCESS;
709 }
710
711 static int
set_thread_state64(thread_t thread,void * state,int full)712 set_thread_state64(thread_t thread, void *state, int full)
713 {
714 x86_thread_state64_t *ts;
715 x86_saved_state64_t *saved_state;
716
717 if (full == TRUE) {
718 ts = &((x86_thread_full_state64_t *)state)->ss64;
719 if (!valid_user_code_selector(((x86_thread_full_state64_t *)ts)->ss64.cs)) {
720 return KERN_INVALID_ARGUMENT;
721 }
722 } else {
723 ts = (x86_thread_state64_t *)state;
724 // In this case, ts->cs exists but is ignored, and
725 // CS is always set to USER_CS below instead.
726 }
727
728 pal_register_cache_state(thread, DIRTY);
729
730 saved_state = USER_REGS64(thread);
731
732 if (!IS_USERADDR64_CANONICAL(ts->rsp) ||
733 !IS_USERADDR64_CANONICAL(ts->rip)) {
734 return KERN_INVALID_ARGUMENT;
735 }
736
737 saved_state->r8 = ts->r8;
738 saved_state->r9 = ts->r9;
739 saved_state->r10 = ts->r10;
740 saved_state->r11 = ts->r11;
741 saved_state->r12 = ts->r12;
742 saved_state->r13 = ts->r13;
743 saved_state->r14 = ts->r14;
744 saved_state->r15 = ts->r15;
745 saved_state->rax = ts->rax;
746 saved_state->rbx = ts->rbx;
747 saved_state->rcx = ts->rcx;
748 saved_state->rdx = ts->rdx;
749 saved_state->rdi = ts->rdi;
750 saved_state->rsi = ts->rsi;
751 saved_state->rbp = ts->rbp;
752 saved_state->isf.rsp = ts->rsp;
753 saved_state->isf.rflags = (ts->rflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
754 saved_state->isf.rip = ts->rip;
755
756 if (full == FALSE) {
757 saved_state->isf.cs = USER64_CS;
758 } else {
759 saved_state->isf.cs = ((x86_thread_full_state64_t *)ts)->ss64.cs;
760 saved_state->isf.ss = ((x86_thread_full_state64_t *)ts)->ss;
761 saved_state->ds = (uint32_t)((x86_thread_full_state64_t *)ts)->ds;
762 saved_state->es = (uint32_t)((x86_thread_full_state64_t *)ts)->es;
763 machine_thread_set_tsd_base(thread,
764 ((x86_thread_full_state64_t *)ts)->gsbase);
765 }
766
767 saved_state->fs = (uint32_t)ts->fs;
768 saved_state->gs = (uint32_t)ts->gs;
769
770 return KERN_SUCCESS;
771 }
772
773
774
775 static void
get_thread_state32(thread_t thread,x86_thread_state32_t * ts)776 get_thread_state32(thread_t thread, x86_thread_state32_t *ts)
777 {
778 x86_saved_state32_t *saved_state;
779
780 pal_register_cache_state(thread, VALID);
781
782 saved_state = USER_REGS32(thread);
783
784 ts->eax = saved_state->eax;
785 ts->ebx = saved_state->ebx;
786 ts->ecx = saved_state->ecx;
787 ts->edx = saved_state->edx;
788 ts->edi = saved_state->edi;
789 ts->esi = saved_state->esi;
790 ts->ebp = saved_state->ebp;
791 ts->esp = saved_state->uesp;
792 ts->eflags = saved_state->efl;
793 ts->eip = saved_state->eip;
794 ts->cs = saved_state->cs;
795 ts->ss = saved_state->ss;
796 ts->ds = saved_state->ds;
797 ts->es = saved_state->es;
798 ts->fs = saved_state->fs;
799 ts->gs = saved_state->gs;
800 }
801
802
803 static void
get_thread_state64(thread_t thread,void * state,boolean_t full)804 get_thread_state64(thread_t thread, void *state, boolean_t full)
805 {
806 x86_thread_state64_t *ts;
807 x86_saved_state64_t *saved_state;
808
809 if (full == TRUE) {
810 ts = &((x86_thread_full_state64_t *)state)->ss64;
811 } else {
812 ts = (x86_thread_state64_t *)state;
813 }
814
815 pal_register_cache_state(thread, VALID);
816
817 saved_state = USER_REGS64(thread);
818
819 ts->r8 = saved_state->r8;
820 ts->r9 = saved_state->r9;
821 ts->r10 = saved_state->r10;
822 ts->r11 = saved_state->r11;
823 ts->r12 = saved_state->r12;
824 ts->r13 = saved_state->r13;
825 ts->r14 = saved_state->r14;
826 ts->r15 = saved_state->r15;
827 ts->rax = saved_state->rax;
828 ts->rbx = saved_state->rbx;
829 ts->rcx = saved_state->rcx;
830 ts->rdx = saved_state->rdx;
831 ts->rdi = saved_state->rdi;
832 ts->rsi = saved_state->rsi;
833 ts->rbp = saved_state->rbp;
834 ts->rsp = saved_state->isf.rsp;
835 ts->rflags = saved_state->isf.rflags;
836 ts->rip = saved_state->isf.rip;
837 ts->cs = saved_state->isf.cs;
838
839 if (full == TRUE) {
840 ((x86_thread_full_state64_t *)state)->ds = saved_state->ds;
841 ((x86_thread_full_state64_t *)state)->es = saved_state->es;
842 ((x86_thread_full_state64_t *)state)->ss = saved_state->isf.ss;
843 ((x86_thread_full_state64_t *)state)->gsbase =
844 thread->machine.cthread_self;
845 }
846
847 ts->fs = saved_state->fs;
848 ts->gs = saved_state->gs;
849 }
850
851 kern_return_t
machine_thread_state_convert_to_user(__unused thread_t thread,__unused thread_flavor_t flavor,__unused thread_state_t tstate,__unused mach_msg_type_number_t * count,__unused thread_set_status_flags_t tssf_flags)852 machine_thread_state_convert_to_user(
853 __unused thread_t thread,
854 __unused thread_flavor_t flavor,
855 __unused thread_state_t tstate,
856 __unused mach_msg_type_number_t *count,
857 __unused thread_set_status_flags_t tssf_flags)
858 {
859 // No conversion to userspace representation on this platform
860 return KERN_SUCCESS;
861 }
862
863 kern_return_t
machine_thread_state_convert_from_user(__unused thread_t thread,__unused thread_flavor_t flavor,__unused thread_state_t tstate,__unused mach_msg_type_number_t count,__unused thread_state_t old_tstate,__unused mach_msg_type_number_t old_count,__unused thread_set_status_flags_t tssf_flags)864 machine_thread_state_convert_from_user(
865 __unused thread_t thread,
866 __unused thread_flavor_t flavor,
867 __unused thread_state_t tstate,
868 __unused mach_msg_type_number_t count,
869 __unused thread_state_t old_tstate,
870 __unused mach_msg_type_number_t old_count,
871 __unused thread_set_status_flags_t tssf_flags)
872 {
873 // No conversion from userspace representation on this platform
874 return KERN_SUCCESS;
875 }
876
877 kern_return_t
machine_thread_siguctx_pointer_convert_to_user(__unused thread_t thread,__unused user_addr_t * uctxp)878 machine_thread_siguctx_pointer_convert_to_user(
879 __unused thread_t thread,
880 __unused user_addr_t *uctxp)
881 {
882 // No conversion to userspace representation on this platform
883 return KERN_SUCCESS;
884 }
885
886 kern_return_t
machine_thread_function_pointers_convert_from_user(__unused thread_t thread,__unused user_addr_t * fptrs,__unused uint32_t count)887 machine_thread_function_pointers_convert_from_user(
888 __unused thread_t thread,
889 __unused user_addr_t *fptrs,
890 __unused uint32_t count)
891 {
892 // No conversion from userspace representation on this platform
893 return KERN_SUCCESS;
894 }
895
896 /*
897 * act_machine_set_state:
898 *
899 * Set the status of the specified thread.
900 */
901
902 kern_return_t
machine_thread_set_state(thread_t thr_act,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t count)903 machine_thread_set_state(
904 thread_t thr_act,
905 thread_flavor_t flavor,
906 thread_state_t tstate,
907 mach_msg_type_number_t count)
908 {
909 switch (flavor) {
910 case x86_SAVED_STATE32:
911 {
912 x86_saved_state32_t *state;
913 x86_saved_state32_t *saved_state;
914
915 if (count < x86_SAVED_STATE32_COUNT) {
916 return KERN_INVALID_ARGUMENT;
917 }
918
919 state = (x86_saved_state32_t *) tstate;
920
921 /*
922 * Refuse to allow 64-bit processes to set
923 * 32-bit state.
924 */
925 if (thread_is_64bit_addr(thr_act)) {
926 return KERN_INVALID_ARGUMENT;
927 }
928
929 /* Check segment selectors are safe */
930 if (!valid_user_segment_selectors(state->cs,
931 state->ss,
932 state->ds,
933 state->es,
934 state->fs,
935 state->gs)) {
936 return KERN_INVALID_ARGUMENT;
937 }
938
939 pal_register_cache_state(thr_act, DIRTY);
940
941 saved_state = USER_REGS32(thr_act);
942
943 /*
944 * General registers
945 */
946 saved_state->edi = state->edi;
947 saved_state->esi = state->esi;
948 saved_state->ebp = state->ebp;
949 saved_state->uesp = state->uesp;
950 saved_state->ebx = state->ebx;
951 saved_state->edx = state->edx;
952 saved_state->ecx = state->ecx;
953 saved_state->eax = state->eax;
954 saved_state->eip = state->eip;
955
956 saved_state->efl = (state->efl & ~EFL_USER_CLEAR) | EFL_USER_SET;
957
958 /*
959 * If the trace trap bit is being set,
960 * ensure that the user returns via iret
961 * - which is signaled thusly:
962 */
963 if ((saved_state->efl & EFL_TF) && state->cs == SYSENTER_CS) {
964 state->cs = SYSENTER_TF_CS;
965 }
966
967 /*
968 * User setting segment registers.
969 * Code and stack selectors have already been
970 * checked. Others will be reset by 'iret'
971 * if they are not valid.
972 */
973 saved_state->cs = state->cs;
974 saved_state->ss = state->ss;
975 saved_state->ds = state->ds;
976 saved_state->es = state->es;
977 saved_state->fs = state->fs;
978 saved_state->gs = state->gs;
979
980 break;
981 }
982
983 case x86_SAVED_STATE64:
984 {
985 x86_saved_state64_t *state;
986 x86_saved_state64_t *saved_state;
987
988 if (count < x86_SAVED_STATE64_COUNT) {
989 return KERN_INVALID_ARGUMENT;
990 }
991
992 if (!thread_is_64bit_addr(thr_act)) {
993 return KERN_INVALID_ARGUMENT;
994 }
995
996 state = (x86_saved_state64_t *) tstate;
997
998 /* Verify that the supplied code segment selector is
999 * valid. In 64-bit mode, the FS and GS segment overrides
1000 * use the FS.base and GS.base MSRs to calculate
1001 * base addresses, and the trampolines don't directly
1002 * restore the segment registers--hence they are no
1003 * longer relevant for validation.
1004 */
1005 if (!valid_user_code_selector(state->isf.cs)) {
1006 return KERN_INVALID_ARGUMENT;
1007 }
1008
1009 /* Check pc and stack are canonical addresses */
1010 if (!IS_USERADDR64_CANONICAL(state->isf.rsp) ||
1011 !IS_USERADDR64_CANONICAL(state->isf.rip)) {
1012 return KERN_INVALID_ARGUMENT;
1013 }
1014
1015 pal_register_cache_state(thr_act, DIRTY);
1016
1017 saved_state = USER_REGS64(thr_act);
1018
1019 /*
1020 * General registers
1021 */
1022 saved_state->r8 = state->r8;
1023 saved_state->r9 = state->r9;
1024 saved_state->r10 = state->r10;
1025 saved_state->r11 = state->r11;
1026 saved_state->r12 = state->r12;
1027 saved_state->r13 = state->r13;
1028 saved_state->r14 = state->r14;
1029 saved_state->r15 = state->r15;
1030 saved_state->rdi = state->rdi;
1031 saved_state->rsi = state->rsi;
1032 saved_state->rbp = state->rbp;
1033 saved_state->rbx = state->rbx;
1034 saved_state->rdx = state->rdx;
1035 saved_state->rcx = state->rcx;
1036 saved_state->rax = state->rax;
1037 saved_state->isf.rsp = state->isf.rsp;
1038 saved_state->isf.rip = state->isf.rip;
1039
1040 saved_state->isf.rflags = (state->isf.rflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
1041
1042 /*
1043 * User setting segment registers.
1044 * Code and stack selectors have already been
1045 * checked. Others will be reset by 'sys'
1046 * if they are not valid.
1047 */
1048 saved_state->isf.cs = state->isf.cs;
1049 saved_state->isf.ss = state->isf.ss;
1050 saved_state->fs = state->fs;
1051 saved_state->gs = state->gs;
1052
1053 break;
1054 }
1055
1056 case x86_FLOAT_STATE32:
1057 case x86_AVX_STATE32:
1058 case x86_AVX512_STATE32:
1059 {
1060 if (count != _MachineStateCount[flavor]) {
1061 return KERN_INVALID_ARGUMENT;
1062 }
1063
1064 if (thread_is_64bit_addr(thr_act)) {
1065 return KERN_INVALID_ARGUMENT;
1066 }
1067
1068 return fpu_set_fxstate(thr_act, tstate, flavor);
1069 }
1070
1071 case x86_FLOAT_STATE64:
1072 case x86_AVX_STATE64:
1073 case x86_AVX512_STATE64:
1074 {
1075 if (count != _MachineStateCount[flavor]) {
1076 return KERN_INVALID_ARGUMENT;
1077 }
1078
1079 if (!thread_is_64bit_addr(thr_act)) {
1080 return KERN_INVALID_ARGUMENT;
1081 }
1082
1083 return fpu_set_fxstate(thr_act, tstate, flavor);
1084 }
1085
1086 case x86_FLOAT_STATE:
1087 {
1088 x86_float_state_t *state;
1089
1090 if (count != x86_FLOAT_STATE_COUNT) {
1091 return KERN_INVALID_ARGUMENT;
1092 }
1093
1094 state = (x86_float_state_t *)tstate;
1095 if (state->fsh.flavor == x86_FLOAT_STATE64 && state->fsh.count == x86_FLOAT_STATE64_COUNT &&
1096 thread_is_64bit_addr(thr_act)) {
1097 return fpu_set_fxstate(thr_act, (thread_state_t)&state->ufs.fs64, x86_FLOAT_STATE64);
1098 }
1099 if (state->fsh.flavor == x86_FLOAT_STATE32 && state->fsh.count == x86_FLOAT_STATE32_COUNT &&
1100 !thread_is_64bit_addr(thr_act)) {
1101 return fpu_set_fxstate(thr_act, (thread_state_t)&state->ufs.fs32, x86_FLOAT_STATE32);
1102 }
1103 return KERN_INVALID_ARGUMENT;
1104 }
1105
1106 case x86_AVX_STATE:
1107 case x86_AVX512_STATE:
1108 {
1109 x86_avx_state_t *state;
1110
1111 if (count != _MachineStateCount[flavor]) {
1112 return KERN_INVALID_ARGUMENT;
1113 }
1114
1115 state = (x86_avx_state_t *)tstate;
1116 /* Flavors are defined to have sequential values: 32-bit, 64-bit, non-specific */
1117 /* 64-bit flavor? */
1118 if (state->ash.flavor == (flavor - 1) &&
1119 state->ash.count == _MachineStateCount[flavor - 1] &&
1120 thread_is_64bit_addr(thr_act)) {
1121 return fpu_set_fxstate(thr_act,
1122 (thread_state_t)&state->ufs.as64,
1123 flavor - 1);
1124 }
1125 /* 32-bit flavor? */
1126 if (state->ash.flavor == (flavor - 2) &&
1127 state->ash.count == _MachineStateCount[flavor - 2] &&
1128 !thread_is_64bit_addr(thr_act)) {
1129 return fpu_set_fxstate(thr_act,
1130 (thread_state_t)&state->ufs.as32,
1131 flavor - 2);
1132 }
1133 return KERN_INVALID_ARGUMENT;
1134 }
1135
1136 case x86_THREAD_STATE32:
1137 {
1138 if (count != x86_THREAD_STATE32_COUNT) {
1139 return KERN_INVALID_ARGUMENT;
1140 }
1141
1142 if (thread_is_64bit_addr(thr_act)) {
1143 return KERN_INVALID_ARGUMENT;
1144 }
1145
1146 return set_thread_state32(thr_act, (x86_thread_state32_t *)tstate);
1147 }
1148
1149 case x86_THREAD_STATE64:
1150 {
1151 if (count != x86_THREAD_STATE64_COUNT) {
1152 return KERN_INVALID_ARGUMENT;
1153 }
1154
1155 if (!thread_is_64bit_addr(thr_act)) {
1156 return KERN_INVALID_ARGUMENT;
1157 }
1158
1159 return set_thread_state64(thr_act, tstate, FALSE);
1160 }
1161
1162 case x86_THREAD_FULL_STATE64:
1163 {
1164 if (count != x86_THREAD_FULL_STATE64_COUNT) {
1165 return KERN_INVALID_ARGUMENT;
1166 }
1167
1168 if (!thread_is_64bit_addr(thr_act)) {
1169 return KERN_INVALID_ARGUMENT;
1170 }
1171
1172 /* If this process does not have a custom LDT, return failure */
1173 if (get_threadtask(thr_act)->i386_ldt == 0) {
1174 return KERN_INVALID_ARGUMENT;
1175 }
1176
1177 return set_thread_state64(thr_act, tstate, TRUE);
1178 }
1179
1180 case x86_THREAD_STATE:
1181 {
1182 x86_thread_state_t *state;
1183
1184 if (count != x86_THREAD_STATE_COUNT) {
1185 return KERN_INVALID_ARGUMENT;
1186 }
1187
1188 state = (x86_thread_state_t *)tstate;
1189
1190 if (state->tsh.flavor == x86_THREAD_STATE64 &&
1191 state->tsh.count == x86_THREAD_STATE64_COUNT &&
1192 thread_is_64bit_addr(thr_act)) {
1193 return set_thread_state64(thr_act, &state->uts.ts64, FALSE);
1194 } else if (state->tsh.flavor == x86_THREAD_FULL_STATE64 &&
1195 state->tsh.count == x86_THREAD_FULL_STATE64_COUNT &&
1196 thread_is_64bit_addr(thr_act) && get_threadtask(thr_act)->i386_ldt != 0) {
1197 return set_thread_state64(thr_act, &state->uts.ts64, TRUE);
1198 } else if (state->tsh.flavor == x86_THREAD_STATE32 &&
1199 state->tsh.count == x86_THREAD_STATE32_COUNT &&
1200 !thread_is_64bit_addr(thr_act)) {
1201 return set_thread_state32(thr_act, &state->uts.ts32);
1202 } else {
1203 return KERN_INVALID_ARGUMENT;
1204 }
1205 }
1206 case x86_DEBUG_STATE32:
1207 {
1208 x86_debug_state32_t *state;
1209 kern_return_t ret;
1210
1211 if (thread_is_64bit_addr(thr_act)) {
1212 return KERN_INVALID_ARGUMENT;
1213 }
1214
1215 state = (x86_debug_state32_t *)tstate;
1216
1217 ret = set_debug_state32(thr_act, state);
1218
1219 return ret;
1220 }
1221 case x86_DEBUG_STATE64:
1222 {
1223 x86_debug_state64_t *state;
1224 kern_return_t ret;
1225
1226 if (!thread_is_64bit_addr(thr_act)) {
1227 return KERN_INVALID_ARGUMENT;
1228 }
1229
1230 state = (x86_debug_state64_t *)tstate;
1231
1232 ret = set_debug_state64(thr_act, state);
1233
1234 return ret;
1235 }
1236 case x86_DEBUG_STATE:
1237 {
1238 x86_debug_state_t *state;
1239 kern_return_t ret = KERN_INVALID_ARGUMENT;
1240
1241 if (count != x86_DEBUG_STATE_COUNT) {
1242 return KERN_INVALID_ARGUMENT;
1243 }
1244
1245 state = (x86_debug_state_t *)tstate;
1246 if (state->dsh.flavor == x86_DEBUG_STATE64 &&
1247 state->dsh.count == x86_DEBUG_STATE64_COUNT &&
1248 thread_is_64bit_addr(thr_act)) {
1249 ret = set_debug_state64(thr_act, &state->uds.ds64);
1250 } else if (state->dsh.flavor == x86_DEBUG_STATE32 &&
1251 state->dsh.count == x86_DEBUG_STATE32_COUNT &&
1252 !thread_is_64bit_addr(thr_act)) {
1253 ret = set_debug_state32(thr_act, &state->uds.ds32);
1254 }
1255 return ret;
1256 }
1257 default:
1258 return KERN_INVALID_ARGUMENT;
1259 }
1260
1261 return KERN_SUCCESS;
1262 }
1263
1264 mach_vm_address_t
machine_thread_pc(thread_t thr_act)1265 machine_thread_pc(thread_t thr_act)
1266 {
1267 if (thread_is_64bit_addr(thr_act)) {
1268 return (mach_vm_address_t)USER_REGS64(thr_act)->isf.rip;
1269 } else {
1270 return (mach_vm_address_t)USER_REGS32(thr_act)->eip;
1271 }
1272 }
1273
1274 void
machine_thread_reset_pc(thread_t thr_act,mach_vm_address_t pc)1275 machine_thread_reset_pc(thread_t thr_act, mach_vm_address_t pc)
1276 {
1277 pal_register_cache_state(thr_act, DIRTY);
1278
1279 if (thread_is_64bit_addr(thr_act)) {
1280 if (!IS_USERADDR64_CANONICAL(pc)) {
1281 pc = 0;
1282 }
1283 USER_REGS64(thr_act)->isf.rip = (uint64_t)pc;
1284 } else {
1285 USER_REGS32(thr_act)->eip = (uint32_t)pc;
1286 }
1287 }
1288
1289
1290 /*
1291 * thread_getstatus:
1292 *
1293 * Get the status of the specified thread.
1294 */
1295
1296 kern_return_t
machine_thread_get_state(thread_t thr_act,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t * count)1297 machine_thread_get_state(
1298 thread_t thr_act,
1299 thread_flavor_t flavor,
1300 thread_state_t tstate,
1301 mach_msg_type_number_t *count)
1302 {
1303 switch (flavor) {
1304 case THREAD_STATE_FLAVOR_LIST:
1305 {
1306 if (*count < 3) {
1307 return KERN_INVALID_ARGUMENT;
1308 }
1309
1310 tstate[0] = i386_THREAD_STATE;
1311 tstate[1] = i386_FLOAT_STATE;
1312 tstate[2] = i386_EXCEPTION_STATE;
1313
1314 *count = 3;
1315 break;
1316 }
1317
1318 case THREAD_STATE_FLAVOR_LIST_NEW:
1319 {
1320 if (*count < 4) {
1321 return KERN_INVALID_ARGUMENT;
1322 }
1323
1324 tstate[0] = x86_THREAD_STATE;
1325 tstate[1] = x86_FLOAT_STATE;
1326 tstate[2] = x86_EXCEPTION_STATE;
1327 tstate[3] = x86_DEBUG_STATE;
1328
1329 *count = 4;
1330 break;
1331 }
1332
1333 case THREAD_STATE_FLAVOR_LIST_10_9:
1334 {
1335 if (*count < 5) {
1336 return KERN_INVALID_ARGUMENT;
1337 }
1338
1339 tstate[0] = x86_THREAD_STATE;
1340 tstate[1] = x86_FLOAT_STATE;
1341 tstate[2] = x86_EXCEPTION_STATE;
1342 tstate[3] = x86_DEBUG_STATE;
1343 tstate[4] = x86_AVX_STATE;
1344
1345 *count = 5;
1346 break;
1347 }
1348
1349 case THREAD_STATE_FLAVOR_LIST_10_13:
1350 {
1351 if (*count < 6) {
1352 return KERN_INVALID_ARGUMENT;
1353 }
1354
1355 tstate[0] = x86_THREAD_STATE;
1356 tstate[1] = x86_FLOAT_STATE;
1357 tstate[2] = x86_EXCEPTION_STATE;
1358 tstate[3] = x86_DEBUG_STATE;
1359 tstate[4] = x86_AVX_STATE;
1360 tstate[5] = x86_AVX512_STATE;
1361
1362 *count = 6;
1363 break;
1364 }
1365
1366 case THREAD_STATE_FLAVOR_LIST_10_15:
1367 {
1368 if (*count < 7) {
1369 return KERN_INVALID_ARGUMENT;
1370 }
1371
1372 tstate[0] = x86_THREAD_STATE;
1373 tstate[1] = x86_FLOAT_STATE;
1374 tstate[2] = x86_EXCEPTION_STATE;
1375 tstate[3] = x86_DEBUG_STATE;
1376 tstate[4] = x86_AVX_STATE;
1377 tstate[5] = x86_AVX512_STATE;
1378 tstate[6] = x86_PAGEIN_STATE;
1379
1380 *count = 7;
1381 break;
1382 }
1383
1384 case x86_SAVED_STATE32:
1385 {
1386 x86_saved_state32_t *state;
1387 x86_saved_state32_t *saved_state;
1388
1389 if (*count < x86_SAVED_STATE32_COUNT) {
1390 return KERN_INVALID_ARGUMENT;
1391 }
1392
1393 if (thread_is_64bit_addr(thr_act)) {
1394 return KERN_INVALID_ARGUMENT;
1395 }
1396
1397 state = (x86_saved_state32_t *) tstate;
1398 saved_state = USER_REGS32(thr_act);
1399
1400 /*
1401 * First, copy everything:
1402 */
1403 *state = *saved_state;
1404 state->ds = saved_state->ds & 0xffff;
1405 state->es = saved_state->es & 0xffff;
1406 state->fs = saved_state->fs & 0xffff;
1407 state->gs = saved_state->gs & 0xffff;
1408
1409 *count = x86_SAVED_STATE32_COUNT;
1410 break;
1411 }
1412
1413 case x86_SAVED_STATE64:
1414 {
1415 x86_saved_state64_t *state;
1416 x86_saved_state64_t *saved_state;
1417
1418 if (*count < x86_SAVED_STATE64_COUNT) {
1419 return KERN_INVALID_ARGUMENT;
1420 }
1421
1422 if (!thread_is_64bit_addr(thr_act)) {
1423 return KERN_INVALID_ARGUMENT;
1424 }
1425
1426 state = (x86_saved_state64_t *)tstate;
1427 saved_state = USER_REGS64(thr_act);
1428
1429 /*
1430 * First, copy everything:
1431 */
1432 *state = *saved_state;
1433 state->ds = saved_state->ds & 0xffff;
1434 state->es = saved_state->es & 0xffff;
1435 state->fs = saved_state->fs & 0xffff;
1436 state->gs = saved_state->gs & 0xffff;
1437
1438 *count = x86_SAVED_STATE64_COUNT;
1439 break;
1440 }
1441
1442 case x86_FLOAT_STATE32:
1443 {
1444 if (*count < x86_FLOAT_STATE32_COUNT) {
1445 return KERN_INVALID_ARGUMENT;
1446 }
1447
1448 if (thread_is_64bit_addr(thr_act)) {
1449 return KERN_INVALID_ARGUMENT;
1450 }
1451
1452 *count = x86_FLOAT_STATE32_COUNT;
1453
1454 return fpu_get_fxstate(thr_act, tstate, flavor);
1455 }
1456
1457 case x86_FLOAT_STATE64:
1458 {
1459 if (*count < x86_FLOAT_STATE64_COUNT) {
1460 return KERN_INVALID_ARGUMENT;
1461 }
1462
1463 if (!thread_is_64bit_addr(thr_act)) {
1464 return KERN_INVALID_ARGUMENT;
1465 }
1466
1467 *count = x86_FLOAT_STATE64_COUNT;
1468
1469 return fpu_get_fxstate(thr_act, tstate, flavor);
1470 }
1471
1472 case x86_FLOAT_STATE:
1473 {
1474 x86_float_state_t *state;
1475 kern_return_t kret;
1476
1477 if (*count < x86_FLOAT_STATE_COUNT) {
1478 return KERN_INVALID_ARGUMENT;
1479 }
1480
1481 state = (x86_float_state_t *)tstate;
1482
1483 /*
1484 * no need to bzero... currently
1485 * x86_FLOAT_STATE64_COUNT == x86_FLOAT_STATE32_COUNT
1486 */
1487 if (thread_is_64bit_addr(thr_act)) {
1488 state->fsh.flavor = x86_FLOAT_STATE64;
1489 state->fsh.count = x86_FLOAT_STATE64_COUNT;
1490
1491 kret = fpu_get_fxstate(thr_act, (thread_state_t)&state->ufs.fs64, x86_FLOAT_STATE64);
1492 } else {
1493 state->fsh.flavor = x86_FLOAT_STATE32;
1494 state->fsh.count = x86_FLOAT_STATE32_COUNT;
1495
1496 kret = fpu_get_fxstate(thr_act, (thread_state_t)&state->ufs.fs32, x86_FLOAT_STATE32);
1497 }
1498 *count = x86_FLOAT_STATE_COUNT;
1499
1500 return kret;
1501 }
1502
1503 case x86_AVX_STATE32:
1504 case x86_AVX512_STATE32:
1505 {
1506 if (*count != _MachineStateCount[flavor]) {
1507 return KERN_INVALID_ARGUMENT;
1508 }
1509
1510 if (thread_is_64bit_addr(thr_act)) {
1511 return KERN_INVALID_ARGUMENT;
1512 }
1513
1514 *count = _MachineStateCount[flavor];
1515
1516 return fpu_get_fxstate(thr_act, tstate, flavor);
1517 }
1518
1519 case x86_AVX_STATE64:
1520 case x86_AVX512_STATE64:
1521 {
1522 if (*count != _MachineStateCount[flavor]) {
1523 return KERN_INVALID_ARGUMENT;
1524 }
1525
1526 if (!thread_is_64bit_addr(thr_act)) {
1527 return KERN_INVALID_ARGUMENT;
1528 }
1529
1530 *count = _MachineStateCount[flavor];
1531
1532 return fpu_get_fxstate(thr_act, tstate, flavor);
1533 }
1534
1535 case x86_AVX_STATE:
1536 case x86_AVX512_STATE:
1537 {
1538 x86_avx_state_t *state;
1539 thread_state_t fstate;
1540
1541 if (*count < _MachineStateCount[flavor]) {
1542 return KERN_INVALID_ARGUMENT;
1543 }
1544
1545 *count = _MachineStateCount[flavor];
1546 state = (x86_avx_state_t *)tstate;
1547
1548 bzero((char *)state, *count * sizeof(int));
1549
1550 if (thread_is_64bit_addr(thr_act)) {
1551 flavor -= 1; /* 64-bit flavor */
1552 fstate = (thread_state_t) &state->ufs.as64;
1553 } else {
1554 flavor -= 2; /* 32-bit flavor */
1555 fstate = (thread_state_t) &state->ufs.as32;
1556 }
1557 state->ash.flavor = flavor;
1558 state->ash.count = _MachineStateCount[flavor];
1559
1560 return fpu_get_fxstate(thr_act, fstate, flavor);
1561 }
1562
1563 case x86_THREAD_STATE32:
1564 {
1565 if (*count < x86_THREAD_STATE32_COUNT) {
1566 return KERN_INVALID_ARGUMENT;
1567 }
1568
1569 if (thread_is_64bit_addr(thr_act)) {
1570 return KERN_INVALID_ARGUMENT;
1571 }
1572
1573 *count = x86_THREAD_STATE32_COUNT;
1574
1575 get_thread_state32(thr_act, (x86_thread_state32_t *)tstate);
1576 break;
1577 }
1578
1579 case x86_THREAD_STATE64:
1580 {
1581 if (*count < x86_THREAD_STATE64_COUNT) {
1582 return KERN_INVALID_ARGUMENT;
1583 }
1584
1585 if (!thread_is_64bit_addr(thr_act)) {
1586 return KERN_INVALID_ARGUMENT;
1587 }
1588
1589 *count = x86_THREAD_STATE64_COUNT;
1590
1591 get_thread_state64(thr_act, tstate, FALSE);
1592 break;
1593 }
1594
1595 case x86_THREAD_FULL_STATE64:
1596 {
1597 if (*count < x86_THREAD_FULL_STATE64_COUNT) {
1598 return KERN_INVALID_ARGUMENT;
1599 }
1600
1601 if (!thread_is_64bit_addr(thr_act)) {
1602 return KERN_INVALID_ARGUMENT;
1603 }
1604
1605 /* If this process does not have a custom LDT, return failure */
1606 if (get_threadtask(thr_act)->i386_ldt == 0) {
1607 return KERN_INVALID_ARGUMENT;
1608 }
1609
1610 *count = x86_THREAD_FULL_STATE64_COUNT;
1611
1612 get_thread_state64(thr_act, tstate, TRUE);
1613 break;
1614 }
1615
1616 case x86_THREAD_STATE:
1617 {
1618 x86_thread_state_t *state;
1619
1620 if (*count < x86_THREAD_STATE_COUNT) {
1621 return KERN_INVALID_ARGUMENT;
1622 }
1623
1624 state = (x86_thread_state_t *)tstate;
1625
1626 bzero((char *)state, sizeof(x86_thread_state_t));
1627
1628 if (thread_is_64bit_addr(thr_act)) {
1629 state->tsh.flavor = x86_THREAD_STATE64;
1630 state->tsh.count = x86_THREAD_STATE64_COUNT;
1631
1632 get_thread_state64(thr_act, &state->uts.ts64, FALSE);
1633 } else {
1634 state->tsh.flavor = x86_THREAD_STATE32;
1635 state->tsh.count = x86_THREAD_STATE32_COUNT;
1636
1637 get_thread_state32(thr_act, &state->uts.ts32);
1638 }
1639 *count = x86_THREAD_STATE_COUNT;
1640
1641 break;
1642 }
1643
1644
1645 case x86_EXCEPTION_STATE32:
1646 {
1647 if (*count < x86_EXCEPTION_STATE32_COUNT) {
1648 return KERN_INVALID_ARGUMENT;
1649 }
1650
1651 if (thread_is_64bit_addr(thr_act)) {
1652 return KERN_INVALID_ARGUMENT;
1653 }
1654
1655 *count = x86_EXCEPTION_STATE32_COUNT;
1656
1657 get_exception_state32(thr_act, (x86_exception_state32_t *)tstate);
1658 /*
1659 * Suppress the cpu number for binary compatibility
1660 * of this deprecated state.
1661 */
1662 ((x86_exception_state32_t *)tstate)->cpu = 0;
1663 break;
1664 }
1665
1666 case x86_EXCEPTION_STATE64:
1667 {
1668 if (*count < x86_EXCEPTION_STATE64_COUNT) {
1669 return KERN_INVALID_ARGUMENT;
1670 }
1671
1672 if (!thread_is_64bit_addr(thr_act)) {
1673 return KERN_INVALID_ARGUMENT;
1674 }
1675
1676 *count = x86_EXCEPTION_STATE64_COUNT;
1677
1678 get_exception_state64(thr_act, (x86_exception_state64_t *)tstate);
1679 /*
1680 * Suppress the cpu number for binary compatibility
1681 * of this deprecated state.
1682 */
1683 ((x86_exception_state64_t *)tstate)->cpu = 0;
1684 break;
1685 }
1686
1687 case x86_EXCEPTION_STATE:
1688 {
1689 x86_exception_state_t *state;
1690
1691 if (*count < x86_EXCEPTION_STATE_COUNT) {
1692 return KERN_INVALID_ARGUMENT;
1693 }
1694
1695 state = (x86_exception_state_t *)tstate;
1696
1697 bzero((char *)state, sizeof(x86_exception_state_t));
1698
1699 if (thread_is_64bit_addr(thr_act)) {
1700 state->esh.flavor = x86_EXCEPTION_STATE64;
1701 state->esh.count = x86_EXCEPTION_STATE64_COUNT;
1702
1703 get_exception_state64(thr_act, &state->ues.es64);
1704 } else {
1705 state->esh.flavor = x86_EXCEPTION_STATE32;
1706 state->esh.count = x86_EXCEPTION_STATE32_COUNT;
1707
1708 get_exception_state32(thr_act, &state->ues.es32);
1709 }
1710 *count = x86_EXCEPTION_STATE_COUNT;
1711
1712 break;
1713 }
1714 case x86_DEBUG_STATE32:
1715 {
1716 if (*count < x86_DEBUG_STATE32_COUNT) {
1717 return KERN_INVALID_ARGUMENT;
1718 }
1719
1720 if (thread_is_64bit_addr(thr_act)) {
1721 return KERN_INVALID_ARGUMENT;
1722 }
1723
1724 get_debug_state32(thr_act, (x86_debug_state32_t *)tstate);
1725
1726 *count = x86_DEBUG_STATE32_COUNT;
1727
1728 break;
1729 }
1730 case x86_DEBUG_STATE64:
1731 {
1732 if (*count < x86_DEBUG_STATE64_COUNT) {
1733 return KERN_INVALID_ARGUMENT;
1734 }
1735
1736 if (!thread_is_64bit_addr(thr_act)) {
1737 return KERN_INVALID_ARGUMENT;
1738 }
1739
1740 get_debug_state64(thr_act, (x86_debug_state64_t *)tstate);
1741
1742 *count = x86_DEBUG_STATE64_COUNT;
1743
1744 break;
1745 }
1746 case x86_DEBUG_STATE:
1747 {
1748 x86_debug_state_t *state;
1749
1750 if (*count < x86_DEBUG_STATE_COUNT) {
1751 return KERN_INVALID_ARGUMENT;
1752 }
1753
1754 state = (x86_debug_state_t *)tstate;
1755
1756 bzero(state, sizeof *state);
1757
1758 if (thread_is_64bit_addr(thr_act)) {
1759 state->dsh.flavor = x86_DEBUG_STATE64;
1760 state->dsh.count = x86_DEBUG_STATE64_COUNT;
1761
1762 get_debug_state64(thr_act, &state->uds.ds64);
1763 } else {
1764 state->dsh.flavor = x86_DEBUG_STATE32;
1765 state->dsh.count = x86_DEBUG_STATE32_COUNT;
1766
1767 get_debug_state32(thr_act, &state->uds.ds32);
1768 }
1769 *count = x86_DEBUG_STATE_COUNT;
1770 break;
1771 }
1772
1773 case x86_PAGEIN_STATE:
1774 {
1775 if (*count < x86_PAGEIN_STATE_COUNT) {
1776 return KERN_INVALID_ARGUMENT;
1777 }
1778
1779 x86_pagein_state_t *state = (void *)tstate;
1780
1781 state->__pagein_error = thr_act->t_pagein_error;
1782
1783 *count = x86_PAGEIN_STATE_COUNT;
1784 break;
1785 }
1786
1787 case x86_INSTRUCTION_STATE:
1788 {
1789 if (*count < x86_INSTRUCTION_STATE_COUNT) {
1790 return KERN_INVALID_ARGUMENT;
1791 }
1792
1793 x86_instruction_state_t *state = (void *)tstate;
1794 x86_instruction_state_t *src_state = THREAD_TO_PCB(thr_act)->insn_state;
1795
1796 if (src_state != 0 && (src_state->insn_stream_valid_bytes > 0 || src_state->out_of_synch)) {
1797 #if DEVELOPMENT || DEBUG
1798 extern int insnstream_force_cacheline_mismatch;
1799 #endif
1800 size_t byte_count = (src_state->insn_stream_valid_bytes > x86_INSTRUCTION_STATE_MAX_INSN_BYTES)
1801 ? x86_INSTRUCTION_STATE_MAX_INSN_BYTES : src_state->insn_stream_valid_bytes;
1802 if (byte_count > 0) {
1803 bcopy(src_state->insn_bytes, state->insn_bytes, byte_count);
1804 }
1805 state->insn_offset = src_state->insn_offset;
1806 state->insn_stream_valid_bytes = byte_count;
1807 #if DEVELOPMENT || DEBUG
1808 state->out_of_synch = src_state->out_of_synch || insnstream_force_cacheline_mismatch;
1809 insnstream_force_cacheline_mismatch = 0; /* One-shot, reset after use */
1810
1811 if (state->out_of_synch) {
1812 bcopy(&src_state->insn_cacheline[0], &state->insn_cacheline[0],
1813 x86_INSTRUCTION_STATE_CACHELINE_SIZE);
1814 } else {
1815 bzero(&state->insn_cacheline[0], x86_INSTRUCTION_STATE_CACHELINE_SIZE);
1816 }
1817 #else
1818 state->out_of_synch = src_state->out_of_synch;
1819 #endif
1820 *count = x86_INSTRUCTION_STATE_COUNT;
1821 } else {
1822 *count = 0;
1823 }
1824 break;
1825 }
1826
1827 case x86_LAST_BRANCH_STATE:
1828 {
1829 if (last_branch_enabled_modes != LBR_ENABLED_USERMODE || *count < x86_LAST_BRANCH_STATE_COUNT) {
1830 return KERN_INVALID_ARGUMENT;
1831 }
1832
1833 /* Callers to this function are assumed to be from user space and the LBR values will be filtered accordingly */
1834 if (i386_filtered_lbr_state_to_mach_thread_state(thr_act, (last_branch_state_t *)tstate, true) < 0) {
1835 *count = 0;
1836 return KERN_INVALID_ARGUMENT;
1837 }
1838
1839 *count = x86_LAST_BRANCH_STATE_COUNT;
1840 break;
1841 }
1842
1843 default:
1844 return KERN_INVALID_ARGUMENT;
1845 }
1846
1847 return KERN_SUCCESS;
1848 }
1849
1850 kern_return_t
machine_thread_get_kern_state(thread_t thread,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t * count)1851 machine_thread_get_kern_state(
1852 thread_t thread,
1853 thread_flavor_t flavor,
1854 thread_state_t tstate,
1855 mach_msg_type_number_t *count)
1856 {
1857 x86_saved_state_t *int_state = current_cpu_datap()->cpu_int_state;
1858
1859 /*
1860 * This works only for an interrupted kernel thread
1861 */
1862 if (thread != current_thread() || int_state == NULL) {
1863 return KERN_FAILURE;
1864 }
1865
1866 switch (flavor) {
1867 case x86_THREAD_STATE32: {
1868 x86_thread_state32_t *state;
1869 x86_saved_state32_t *saved_state;
1870
1871 if (!is_saved_state32(int_state) ||
1872 *count < x86_THREAD_STATE32_COUNT) {
1873 return KERN_INVALID_ARGUMENT;
1874 }
1875
1876 state = (x86_thread_state32_t *) tstate;
1877
1878 saved_state = saved_state32(int_state);
1879 /*
1880 * General registers.
1881 */
1882 state->eax = saved_state->eax;
1883 state->ebx = saved_state->ebx;
1884 state->ecx = saved_state->ecx;
1885 state->edx = saved_state->edx;
1886 state->edi = saved_state->edi;
1887 state->esi = saved_state->esi;
1888 state->ebp = saved_state->ebp;
1889 state->esp = saved_state->uesp;
1890 state->eflags = saved_state->efl;
1891 state->eip = saved_state->eip;
1892 state->cs = saved_state->cs;
1893 state->ss = saved_state->ss;
1894 state->ds = saved_state->ds & 0xffff;
1895 state->es = saved_state->es & 0xffff;
1896 state->fs = saved_state->fs & 0xffff;
1897 state->gs = saved_state->gs & 0xffff;
1898
1899 *count = x86_THREAD_STATE32_COUNT;
1900
1901 return KERN_SUCCESS;
1902 }
1903
1904 case x86_THREAD_STATE64: {
1905 x86_thread_state64_t *state;
1906 x86_saved_state64_t *saved_state;
1907
1908 if (!is_saved_state64(int_state) ||
1909 *count < x86_THREAD_STATE64_COUNT) {
1910 return KERN_INVALID_ARGUMENT;
1911 }
1912
1913 state = (x86_thread_state64_t *) tstate;
1914
1915 saved_state = saved_state64(int_state);
1916 /*
1917 * General registers.
1918 */
1919 state->rax = saved_state->rax;
1920 state->rbx = saved_state->rbx;
1921 state->rcx = saved_state->rcx;
1922 state->rdx = saved_state->rdx;
1923 state->rdi = saved_state->rdi;
1924 state->rsi = saved_state->rsi;
1925 state->rbp = saved_state->rbp;
1926 state->rsp = saved_state->isf.rsp;
1927 state->r8 = saved_state->r8;
1928 state->r9 = saved_state->r9;
1929 state->r10 = saved_state->r10;
1930 state->r11 = saved_state->r11;
1931 state->r12 = saved_state->r12;
1932 state->r13 = saved_state->r13;
1933 state->r14 = saved_state->r14;
1934 state->r15 = saved_state->r15;
1935
1936 state->rip = saved_state->isf.rip;
1937 state->rflags = saved_state->isf.rflags;
1938 state->cs = saved_state->isf.cs;
1939 state->fs = saved_state->fs & 0xffff;
1940 state->gs = saved_state->gs & 0xffff;
1941 *count = x86_THREAD_STATE64_COUNT;
1942
1943 return KERN_SUCCESS;
1944 }
1945
1946 case x86_THREAD_STATE: {
1947 x86_thread_state_t *state = NULL;
1948
1949 if (*count < x86_THREAD_STATE_COUNT) {
1950 return KERN_INVALID_ARGUMENT;
1951 }
1952
1953 state = (x86_thread_state_t *) tstate;
1954
1955 if (is_saved_state32(int_state)) {
1956 x86_saved_state32_t *saved_state = saved_state32(int_state);
1957
1958 state->tsh.flavor = x86_THREAD_STATE32;
1959 state->tsh.count = x86_THREAD_STATE32_COUNT;
1960
1961 /*
1962 * General registers.
1963 */
1964 state->uts.ts32.eax = saved_state->eax;
1965 state->uts.ts32.ebx = saved_state->ebx;
1966 state->uts.ts32.ecx = saved_state->ecx;
1967 state->uts.ts32.edx = saved_state->edx;
1968 state->uts.ts32.edi = saved_state->edi;
1969 state->uts.ts32.esi = saved_state->esi;
1970 state->uts.ts32.ebp = saved_state->ebp;
1971 state->uts.ts32.esp = saved_state->uesp;
1972 state->uts.ts32.eflags = saved_state->efl;
1973 state->uts.ts32.eip = saved_state->eip;
1974 state->uts.ts32.cs = saved_state->cs;
1975 state->uts.ts32.ss = saved_state->ss;
1976 state->uts.ts32.ds = saved_state->ds & 0xffff;
1977 state->uts.ts32.es = saved_state->es & 0xffff;
1978 state->uts.ts32.fs = saved_state->fs & 0xffff;
1979 state->uts.ts32.gs = saved_state->gs & 0xffff;
1980 } else if (is_saved_state64(int_state)) {
1981 x86_saved_state64_t *saved_state = saved_state64(int_state);
1982
1983 state->tsh.flavor = x86_THREAD_STATE64;
1984 state->tsh.count = x86_THREAD_STATE64_COUNT;
1985
1986 /*
1987 * General registers.
1988 */
1989 state->uts.ts64.rax = saved_state->rax;
1990 state->uts.ts64.rbx = saved_state->rbx;
1991 state->uts.ts64.rcx = saved_state->rcx;
1992 state->uts.ts64.rdx = saved_state->rdx;
1993 state->uts.ts64.rdi = saved_state->rdi;
1994 state->uts.ts64.rsi = saved_state->rsi;
1995 state->uts.ts64.rbp = saved_state->rbp;
1996 state->uts.ts64.rsp = saved_state->isf.rsp;
1997 state->uts.ts64.r8 = saved_state->r8;
1998 state->uts.ts64.r9 = saved_state->r9;
1999 state->uts.ts64.r10 = saved_state->r10;
2000 state->uts.ts64.r11 = saved_state->r11;
2001 state->uts.ts64.r12 = saved_state->r12;
2002 state->uts.ts64.r13 = saved_state->r13;
2003 state->uts.ts64.r14 = saved_state->r14;
2004 state->uts.ts64.r15 = saved_state->r15;
2005
2006 state->uts.ts64.rip = saved_state->isf.rip;
2007 state->uts.ts64.rflags = saved_state->isf.rflags;
2008 state->uts.ts64.cs = saved_state->isf.cs;
2009 state->uts.ts64.fs = saved_state->fs & 0xffff;
2010 state->uts.ts64.gs = saved_state->gs & 0xffff;
2011 } else {
2012 panic("unknown thread state");
2013 }
2014
2015 *count = x86_THREAD_STATE_COUNT;
2016 return KERN_SUCCESS;
2017 }
2018 }
2019 return KERN_FAILURE;
2020 }
2021
2022
2023 void
machine_thread_switch_addrmode(thread_t thread)2024 machine_thread_switch_addrmode(thread_t thread)
2025 {
2026 task_t task = get_threadtask(thread);
2027
2028 /*
2029 * We don't want to be preempted until we're done
2030 * - particularly if we're switching the current thread
2031 */
2032 disable_preemption();
2033
2034 /*
2035 * Reset the state saveareas. As we're resetting, we anticipate no
2036 * memory allocations in this path.
2037 */
2038 machine_thread_create(thread, task, false);
2039
2040 /* Adjust FPU state */
2041 fpu_switch_addrmode(thread, task_has_64Bit_addr(task));
2042
2043 /* If we're switching ourselves, reset the pcb addresses etc. */
2044 if (thread == current_thread()) {
2045 boolean_t istate = ml_set_interrupts_enabled(FALSE);
2046 act_machine_switch_pcb(NULL, thread);
2047 ml_set_interrupts_enabled(istate);
2048 }
2049 enable_preemption();
2050 }
2051
2052
2053
2054 /*
2055 * This is used to set the current thr_act/thread
2056 * when starting up a new processor
2057 */
2058 void
machine_set_current_thread(thread_t thread)2059 machine_set_current_thread(thread_t thread)
2060 {
2061 current_cpu_datap()->cpu_active_thread = thread;
2062 }
2063
2064
2065 /*
2066 * Perform machine-dependent per-thread initializations
2067 */
2068 void
machine_thread_init(void)2069 machine_thread_init(void)
2070 {
2071 fpu_module_init();
2072 }
2073
2074 /*
2075 * machine_thread_template_init: Initialize machine-specific portion of
2076 * the thread template.
2077 */
2078 void
machine_thread_template_init(thread_t thr_template)2079 machine_thread_template_init(thread_t thr_template)
2080 {
2081 assert(fpu_default != UNDEFINED);
2082
2083 THREAD_TO_PCB(thr_template)->xstate = fpu_default;
2084 }
2085
2086 user_addr_t
get_useraddr(void)2087 get_useraddr(void)
2088 {
2089 thread_t thr_act = current_thread();
2090
2091 if (thread_is_64bit_addr(thr_act)) {
2092 x86_saved_state64_t *iss64;
2093
2094 iss64 = USER_REGS64(thr_act);
2095
2096 return iss64->isf.rip;
2097 } else {
2098 x86_saved_state32_t *iss32;
2099
2100 iss32 = USER_REGS32(thr_act);
2101
2102 return iss32->eip;
2103 }
2104 }
2105
2106 /*
2107 * detach and return a kernel stack from a thread
2108 */
2109
2110 vm_offset_t
machine_stack_detach(thread_t thread)2111 machine_stack_detach(thread_t thread)
2112 {
2113 vm_offset_t stack;
2114
2115 KERNEL_DEBUG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_DETACH),
2116 (uintptr_t)thread_tid(thread), thread->priority,
2117 thread->sched_pri, 0,
2118 0);
2119
2120 stack = thread->kernel_stack;
2121 #if CONFIG_STKSZ
2122 kcov_stksz_set_thread_stack(thread, stack);
2123 #endif
2124 thread->kernel_stack = 0;
2125
2126 return stack;
2127 }
2128
2129 /*
2130 * attach a kernel stack to a thread and initialize it
2131 */
2132
2133 void
machine_stack_attach(thread_t thread,vm_offset_t stack)2134 machine_stack_attach(
2135 thread_t thread,
2136 vm_offset_t stack)
2137 {
2138 struct x86_kernel_state *statep;
2139
2140 KERNEL_DEBUG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_ATTACH),
2141 (uintptr_t)thread_tid(thread), thread->priority,
2142 thread->sched_pri, 0, 0);
2143
2144 assert(stack);
2145 thread->kernel_stack = stack;
2146 #if CONFIG_STKSZ
2147 kcov_stksz_set_thread_stack(thread, 0);
2148 #endif
2149 thread_initialize_kernel_state(thread);
2150
2151 statep = STACK_IKS(stack);
2152
2153 /*
2154 * Reset the state of the thread to resume from a continuation,
2155 * including resetting the stack and frame pointer to avoid backtracers
2156 * seeing this temporary state and attempting to walk the defunct stack.
2157 */
2158 statep->k_rbp = (uint64_t) 0;
2159 statep->k_rip = (uint64_t) Thread_continue;
2160 statep->k_rbx = (uint64_t) thread_continue;
2161 statep->k_rsp = (uint64_t) STACK_IKS(stack);
2162
2163 return;
2164 }
2165
2166 /*
2167 * move a stack from old to new thread
2168 */
2169
2170 void
machine_stack_handoff(thread_t old,thread_t new)2171 machine_stack_handoff(thread_t old,
2172 thread_t new)
2173 {
2174 vm_offset_t stack;
2175
2176 assert(new);
2177 assert(old);
2178
2179 #if HYPERVISOR
2180 if (old->hv_thread_target) {
2181 hv_callbacks.preempt(old->hv_thread_target);
2182 }
2183 #endif
2184
2185 kpc_off_cpu(old);
2186
2187 stack = old->kernel_stack;
2188 if (stack == old->reserved_stack) {
2189 assert(new->reserved_stack);
2190 old->reserved_stack = new->reserved_stack;
2191 new->reserved_stack = stack;
2192 }
2193 #if CONFIG_STKSZ
2194 kcov_stksz_set_thread_stack(old, old->kernel_stack);
2195 #endif
2196 old->kernel_stack = 0;
2197 /*
2198 * A full call to machine_stack_attach() is unnecessry
2199 * because old stack is already initialized.
2200 */
2201 new->kernel_stack = stack;
2202 #if CONFIG_STKSZ
2203 kcov_stksz_set_thread_stack(new, 0);
2204 #endif
2205
2206 fpu_switch_context(old, new);
2207
2208 old->machine.specFlags &= ~OnProc;
2209 new->machine.specFlags |= OnProc;
2210
2211 pmap_switch_context(old, new, cpu_number());
2212 act_machine_switch_pcb(old, new);
2213
2214 #if HYPERVISOR
2215 if (new->hv_thread_target) {
2216 hv_callbacks.dispatch(new->hv_thread_target);
2217 }
2218 #endif
2219
2220 machine_set_current_thread(new);
2221 thread_initialize_kernel_state(new);
2222
2223 return;
2224 }
2225
2226
2227
2228
2229 struct x86_act_context32 {
2230 x86_saved_state32_t ss;
2231 x86_float_state32_t fs;
2232 x86_debug_state32_t ds;
2233 };
2234
2235 struct x86_act_context64 {
2236 x86_saved_state64_t ss;
2237 x86_float_state64_t fs;
2238 x86_debug_state64_t ds;
2239 };
2240
2241
2242
2243 void *
act_thread_csave(void)2244 act_thread_csave(void)
2245 {
2246 kern_return_t kret;
2247 mach_msg_type_number_t val;
2248 thread_t thr_act = current_thread();
2249
2250 if (thread_is_64bit_addr(thr_act)) {
2251 struct x86_act_context64 *ic64;
2252
2253 ic64 = kalloc_data(sizeof(struct x86_act_context64), Z_WAITOK);
2254
2255 if (ic64 == (struct x86_act_context64 *)NULL) {
2256 return (void *)0;
2257 }
2258
2259 val = x86_SAVED_STATE64_COUNT;
2260 kret = machine_thread_get_state(thr_act, x86_SAVED_STATE64,
2261 (thread_state_t) &ic64->ss, &val);
2262 if (kret != KERN_SUCCESS) {
2263 kfree_data(ic64, sizeof(struct x86_act_context64));
2264 return (void *)0;
2265 }
2266 val = x86_FLOAT_STATE64_COUNT;
2267 kret = machine_thread_get_state(thr_act, x86_FLOAT_STATE64,
2268 (thread_state_t) &ic64->fs, &val);
2269 if (kret != KERN_SUCCESS) {
2270 kfree_data(ic64, sizeof(struct x86_act_context64));
2271 return (void *)0;
2272 }
2273
2274 val = x86_DEBUG_STATE64_COUNT;
2275 kret = machine_thread_get_state(thr_act,
2276 x86_DEBUG_STATE64,
2277 (thread_state_t)&ic64->ds,
2278 &val);
2279 if (kret != KERN_SUCCESS) {
2280 kfree_data(ic64, sizeof(struct x86_act_context64));
2281 return (void *)0;
2282 }
2283 return ic64;
2284 } else {
2285 struct x86_act_context32 *ic32;
2286
2287 ic32 = kalloc_data(sizeof(struct x86_act_context32), Z_WAITOK);
2288
2289 if (ic32 == (struct x86_act_context32 *)NULL) {
2290 return (void *)0;
2291 }
2292
2293 val = x86_SAVED_STATE32_COUNT;
2294 kret = machine_thread_get_state(thr_act, x86_SAVED_STATE32,
2295 (thread_state_t) &ic32->ss, &val);
2296 if (kret != KERN_SUCCESS) {
2297 kfree_data(ic32, sizeof(struct x86_act_context32));
2298 return (void *)0;
2299 }
2300 val = x86_FLOAT_STATE32_COUNT;
2301 kret = machine_thread_get_state(thr_act, x86_FLOAT_STATE32,
2302 (thread_state_t) &ic32->fs, &val);
2303 if (kret != KERN_SUCCESS) {
2304 kfree_data(ic32, sizeof(struct x86_act_context32));
2305 return (void *)0;
2306 }
2307
2308 val = x86_DEBUG_STATE32_COUNT;
2309 kret = machine_thread_get_state(thr_act,
2310 x86_DEBUG_STATE32,
2311 (thread_state_t)&ic32->ds,
2312 &val);
2313 if (kret != KERN_SUCCESS) {
2314 kfree_data(ic32, sizeof(struct x86_act_context32));
2315 return (void *)0;
2316 }
2317 return ic32;
2318 }
2319 }
2320
2321
2322 void
act_thread_catt(void * ctx)2323 act_thread_catt(void *ctx)
2324 {
2325 thread_t thr_act = current_thread();
2326 kern_return_t kret;
2327
2328 if (ctx == (void *)NULL) {
2329 return;
2330 }
2331
2332 if (thread_is_64bit_addr(thr_act)) {
2333 struct x86_act_context64 *ic64;
2334
2335 ic64 = (struct x86_act_context64 *)ctx;
2336
2337 kret = machine_thread_set_state(thr_act, x86_SAVED_STATE64,
2338 (thread_state_t) &ic64->ss, x86_SAVED_STATE64_COUNT);
2339 if (kret == KERN_SUCCESS) {
2340 machine_thread_set_state(thr_act, x86_FLOAT_STATE64,
2341 (thread_state_t) &ic64->fs, x86_FLOAT_STATE64_COUNT);
2342 }
2343 kfree_data(ic64, sizeof(struct x86_act_context64));
2344 } else {
2345 struct x86_act_context32 *ic32;
2346
2347 ic32 = (struct x86_act_context32 *)ctx;
2348
2349 kret = machine_thread_set_state(thr_act, x86_SAVED_STATE32,
2350 (thread_state_t) &ic32->ss, x86_SAVED_STATE32_COUNT);
2351 if (kret == KERN_SUCCESS) {
2352 (void) machine_thread_set_state(thr_act, x86_FLOAT_STATE32,
2353 (thread_state_t) &ic32->fs, x86_FLOAT_STATE32_COUNT);
2354 }
2355 kfree_data(ic32, sizeof(struct x86_act_context32));
2356 }
2357 }
2358
2359
2360 void
act_thread_cfree(__unused void * ctx)2361 act_thread_cfree(__unused void *ctx)
2362 {
2363 /* XXX - Unused */
2364 }
2365
2366 /*
2367 * Duplicate one x86_debug_state32_t to another. "all" parameter
2368 * chooses whether dr4 and dr5 are copied (they are never meant
2369 * to be installed when we do machine_task_set_state() or
2370 * machine_thread_set_state()).
2371 */
2372 void
copy_debug_state32(x86_debug_state32_t * src,x86_debug_state32_t * target,boolean_t all)2373 copy_debug_state32(
2374 x86_debug_state32_t *src,
2375 x86_debug_state32_t *target,
2376 boolean_t all)
2377 {
2378 if (all) {
2379 target->dr4 = src->dr4;
2380 target->dr5 = src->dr5;
2381 }
2382
2383 target->dr0 = src->dr0;
2384 target->dr1 = src->dr1;
2385 target->dr2 = src->dr2;
2386 target->dr3 = src->dr3;
2387 target->dr6 = src->dr6;
2388 target->dr7 = src->dr7;
2389 }
2390
2391 /*
2392 * Duplicate one x86_debug_state64_t to another. "all" parameter
2393 * chooses whether dr4 and dr5 are copied (they are never meant
2394 * to be installed when we do machine_task_set_state() or
2395 * machine_thread_set_state()).
2396 */
2397 void
copy_debug_state64(x86_debug_state64_t * src,x86_debug_state64_t * target,boolean_t all)2398 copy_debug_state64(
2399 x86_debug_state64_t *src,
2400 x86_debug_state64_t *target,
2401 boolean_t all)
2402 {
2403 if (all) {
2404 target->dr4 = src->dr4;
2405 target->dr5 = src->dr5;
2406 }
2407
2408 target->dr0 = src->dr0;
2409 target->dr1 = src->dr1;
2410 target->dr2 = src->dr2;
2411 target->dr3 = src->dr3;
2412 target->dr6 = src->dr6;
2413 target->dr7 = src->dr7;
2414 }
2415