1 /*
2 * Copyright (c) 2000-2024 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 */
31 /*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or [email protected]
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56
57 #include <mach_ldebug.h>
58
59 #include <sys/kdebug.h>
60
61 #include <mach/kern_return.h>
62 #include <mach/thread_status.h>
63 #include <mach/vm_param.h>
64
65 #include <kern/kalloc.h>
66 #include <kern/mach_param.h>
67 #include <kern/processor.h>
68 #include <kern/cpu_data.h>
69 #include <kern/cpu_number.h>
70 #include <kern/task.h>
71 #include <kern/thread.h>
72 #include <kern/sched_prim.h>
73 #include <kern/misc_protos.h>
74 #include <kern/assert.h>
75 #include <kern/spl.h>
76 #include <kern/machine.h>
77 #include <kern/kpc.h>
78 #include <ipc/ipc_port.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_map_xnu.h>
81 #include <vm/pmap.h>
82 #include <vm/vm_protos.h>
83
84 #include <i386/cpu_data.h>
85 #include <i386/cpu_number.h>
86 #include <i386/eflags.h>
87 #include <i386/proc_reg.h>
88 #include <i386/fpu.h>
89 #include <i386/misc_protos.h>
90 #include <i386/mp_desc.h>
91 #include <i386/thread.h>
92 #include <i386/machine_routines.h>
93 #include <i386/lapic.h> /* LAPIC_PMC_SWI_VECTOR */
94 #include <i386/seg.h>
95
96 #if HYPERVISOR
97 #include <kern/hv_support.h>
98 #endif
99
100 #include <san/kcov_stksz.h>
101
102
103 /*
104 * Maps state flavor to number of words in the state:
105 */
106 unsigned int _MachineStateCount[THREAD_STATE_FLAVORS] = {
107 [x86_THREAD_STATE32] = x86_THREAD_STATE32_COUNT,
108 [x86_THREAD_STATE64] = x86_THREAD_STATE64_COUNT,
109 [x86_THREAD_FULL_STATE64] = x86_THREAD_FULL_STATE64_COUNT,
110 [x86_THREAD_STATE] = x86_THREAD_STATE_COUNT,
111 [x86_FLOAT_STATE32] = x86_FLOAT_STATE32_COUNT,
112 [x86_FLOAT_STATE64] = x86_FLOAT_STATE64_COUNT,
113 [x86_FLOAT_STATE] = x86_FLOAT_STATE_COUNT,
114 [x86_EXCEPTION_STATE32] = x86_EXCEPTION_STATE32_COUNT,
115 [x86_EXCEPTION_STATE64] = x86_EXCEPTION_STATE64_COUNT,
116 [x86_EXCEPTION_STATE] = x86_EXCEPTION_STATE_COUNT,
117 [x86_DEBUG_STATE32] = x86_DEBUG_STATE32_COUNT,
118 [x86_DEBUG_STATE64] = x86_DEBUG_STATE64_COUNT,
119 [x86_DEBUG_STATE] = x86_DEBUG_STATE_COUNT,
120 [x86_AVX_STATE32] = x86_AVX_STATE32_COUNT,
121 [x86_AVX_STATE64] = x86_AVX_STATE64_COUNT,
122 [x86_AVX_STATE] = x86_AVX_STATE_COUNT,
123 [x86_AVX512_STATE32] = x86_AVX512_STATE32_COUNT,
124 [x86_AVX512_STATE64] = x86_AVX512_STATE64_COUNT,
125 [x86_AVX512_STATE] = x86_AVX512_STATE_COUNT,
126 [x86_PAGEIN_STATE] = x86_PAGEIN_STATE_COUNT,
127 [x86_INSTRUCTION_STATE] = x86_INSTRUCTION_STATE_COUNT,
128 [x86_LAST_BRANCH_STATE] = x86_LAST_BRANCH_STATE_COUNT
129 };
130
131 ZONE_DEFINE_TYPE(iss_zone, "x86_64 saved state",
132 x86_saved_state_t, ZC_NONE);
133
134 ZONE_DEFINE_TYPE(ids_zone, "x86_64 debug state",
135 x86_debug_state64_t, ZC_NONE);
136
137 /* Forward */
138
139 extern void Thread_continue(void);
140 extern void Load_context(
141 thread_t thread) __attribute__((noreturn));
142
143 static void
144 get_exception_state32(thread_t thread, x86_exception_state32_t *es);
145
146 static void
147 get_exception_state64(thread_t thread, x86_exception_state64_t *es);
148
149 static void
150 get_thread_state32(thread_t thread, x86_thread_state32_t *ts);
151
152 static void
153 get_thread_state64(thread_t thread, void *ts, boolean_t full);
154
155 static int
156 set_thread_state32(thread_t thread, x86_thread_state32_t *ts);
157
158 static int
159 set_thread_state64(thread_t thread, void *ts, boolean_t full);
160
161 /*
162 * Don't let an illegal value for the lower 32-bits of dr7 get set.
163 * Specifically, check for undefined settings. Setting these bit patterns
164 * result in undefined behaviour and can lead to an unexpected
165 * TRCTRAP.
166 */
167 static boolean_t
dr7d_is_valid(uint32_t * dr7d)168 dr7d_is_valid(uint32_t *dr7d)
169 {
170 int i;
171 uint32_t mask1, mask2;
172
173 /*
174 * If the DE bit is set in CR4, R/W0-3 can be pattern
175 * "10B" to indicate i/o reads and write
176 */
177 if (!(get_cr4() & CR4_DE)) {
178 for (i = 0, mask1 = 0x3 << 16, mask2 = 0x2 << 16; i < 4;
179 i++, mask1 <<= 4, mask2 <<= 4) {
180 if ((*dr7d & mask1) == mask2) {
181 return FALSE;
182 }
183 }
184 }
185
186 /*
187 * if we are doing an instruction execution break (indicated
188 * by r/w[x] being "00B"), then the len[x] must also be set
189 * to "00B"
190 */
191 for (i = 0; i < 4; i++) {
192 if (((((*dr7d >> (16 + i * 4))) & 0x3) == 0) &&
193 ((((*dr7d >> (18 + i * 4))) & 0x3) != 0)) {
194 return FALSE;
195 }
196 }
197
198 /*
199 * Intel docs have these bits fixed.
200 */
201 *dr7d |= 0x1 << 10; /* set bit 10 to 1 */
202 *dr7d &= ~(0x1 << 11); /* set bit 11 to 0 */
203 *dr7d &= ~(0x1 << 12); /* set bit 12 to 0 */
204 *dr7d &= ~(0x1 << 14); /* set bit 14 to 0 */
205 *dr7d &= ~(0x1 << 15); /* set bit 15 to 0 */
206
207 /*
208 * We don't allow anything to set the global breakpoints.
209 */
210
211 if (*dr7d & 0x2) {
212 return FALSE;
213 }
214
215 if (*dr7d & (0x2 << 2)) {
216 return FALSE;
217 }
218
219 if (*dr7d & (0x2 << 4)) {
220 return FALSE;
221 }
222
223 if (*dr7d & (0x2 << 6)) {
224 return FALSE;
225 }
226
227 return TRUE;
228 }
229
230 extern void set_64bit_debug_regs(x86_debug_state64_t *ds);
231
232 boolean_t
debug_state_is_valid32(x86_debug_state32_t * ds)233 debug_state_is_valid32(x86_debug_state32_t *ds)
234 {
235 if (!dr7d_is_valid(&ds->dr7)) {
236 return FALSE;
237 }
238
239 return TRUE;
240 }
241
242 boolean_t
debug_state_is_valid64(x86_debug_state64_t * ds)243 debug_state_is_valid64(x86_debug_state64_t *ds)
244 {
245 if (!dr7d_is_valid((uint32_t *)&ds->dr7)) {
246 return FALSE;
247 }
248
249 /*
250 * Don't allow the user to set debug addresses above their max
251 * value
252 */
253 if (ds->dr7 & 0x1) {
254 if (ds->dr0 >= VM_MAX_PAGE_ADDRESS) {
255 return FALSE;
256 }
257 }
258
259 if (ds->dr7 & (0x1 << 2)) {
260 if (ds->dr1 >= VM_MAX_PAGE_ADDRESS) {
261 return FALSE;
262 }
263 }
264
265 if (ds->dr7 & (0x1 << 4)) {
266 if (ds->dr2 >= VM_MAX_PAGE_ADDRESS) {
267 return FALSE;
268 }
269 }
270
271 if (ds->dr7 & (0x1 << 6)) {
272 if (ds->dr3 >= VM_MAX_PAGE_ADDRESS) {
273 return FALSE;
274 }
275 }
276
277 /* For x86-64, we must ensure the upper 32-bits of DR7 are clear */
278 ds->dr7 &= 0xffffffffULL;
279
280 return TRUE;
281 }
282
283
284 static kern_return_t
set_debug_state32(thread_t thread,x86_debug_state32_t * ds)285 set_debug_state32(thread_t thread, x86_debug_state32_t *ds)
286 {
287 x86_debug_state32_t *new_ids;
288 pcb_t pcb;
289
290 pcb = THREAD_TO_PCB(thread);
291
292 if (debug_state_is_valid32(ds) != TRUE) {
293 return KERN_INVALID_ARGUMENT;
294 }
295
296 if (pcb->ids == NULL) {
297 new_ids = zalloc_flags(ids_zone, Z_WAITOK | Z_ZERO);
298
299 simple_lock(&pcb->lock, LCK_GRP_NULL);
300 /* make sure it wasn't already alloc()'d elsewhere */
301 if (pcb->ids == NULL) {
302 pcb->ids = new_ids;
303 simple_unlock(&pcb->lock);
304 } else {
305 simple_unlock(&pcb->lock);
306 zfree(ids_zone, new_ids);
307 }
308 }
309
310
311 copy_debug_state32(ds, pcb->ids, FALSE);
312
313 return KERN_SUCCESS;
314 }
315
316 static kern_return_t
set_debug_state64(thread_t thread,x86_debug_state64_t * ds)317 set_debug_state64(thread_t thread, x86_debug_state64_t *ds)
318 {
319 x86_debug_state64_t *new_ids;
320 pcb_t pcb;
321
322 pcb = THREAD_TO_PCB(thread);
323
324 if (debug_state_is_valid64(ds) != TRUE) {
325 return KERN_INVALID_ARGUMENT;
326 }
327
328 if (pcb->ids == NULL) {
329 new_ids = zalloc_flags(ids_zone, Z_WAITOK | Z_ZERO);
330
331 #if HYPERVISOR
332 if (thread->hv_thread_target) {
333 hv_callbacks.volatile_state(thread->hv_thread_target,
334 HV_DEBUG_STATE);
335 }
336 #endif
337
338 simple_lock(&pcb->lock, LCK_GRP_NULL);
339 /* make sure it wasn't already alloc()'d elsewhere */
340 if (pcb->ids == NULL) {
341 pcb->ids = new_ids;
342 simple_unlock(&pcb->lock);
343 } else {
344 simple_unlock(&pcb->lock);
345 zfree(ids_zone, new_ids);
346 }
347 }
348
349 copy_debug_state64(ds, pcb->ids, FALSE);
350
351 return KERN_SUCCESS;
352 }
353
354 static void
get_debug_state32(thread_t thread,x86_debug_state32_t * ds)355 get_debug_state32(thread_t thread, x86_debug_state32_t *ds)
356 {
357 x86_debug_state32_t *saved_state;
358
359 saved_state = thread->machine.ids;
360
361 if (saved_state) {
362 copy_debug_state32(saved_state, ds, TRUE);
363 } else {
364 bzero(ds, sizeof *ds);
365 }
366 }
367
368 static void
get_debug_state64(thread_t thread,x86_debug_state64_t * ds)369 get_debug_state64(thread_t thread, x86_debug_state64_t *ds)
370 {
371 x86_debug_state64_t *saved_state;
372
373 saved_state = (x86_debug_state64_t *)thread->machine.ids;
374
375 if (saved_state) {
376 copy_debug_state64(saved_state, ds, TRUE);
377 } else {
378 bzero(ds, sizeof *ds);
379 }
380 }
381
382 /*
383 * consider_machine_collect:
384 *
385 * Try to collect machine-dependent pages
386 */
387 void
consider_machine_collect(void)388 consider_machine_collect(void)
389 {
390 }
391
392 void
consider_machine_adjust(void)393 consider_machine_adjust(void)
394 {
395 }
396
397 /*
398 * Switch to the first thread on a CPU.
399 */
400 void
machine_load_context(thread_t new)401 machine_load_context(
402 thread_t new)
403 {
404 new->machine.specFlags |= OnProc;
405 act_machine_switch_pcb(NULL, new);
406 Load_context(new);
407 }
408
409 static void
machine_rsb_stuff(void)410 machine_rsb_stuff(void)
411 {
412 #define RSB_STUFF_SPACE_REQD (256 + 16) /* 256 bytes plus a buffer of another 16 for misc. */
413
414 asm volatile (
415 ".macro RSBST from=0, to=15\n"
416 " call 1f\n"
417 "2:\n"
418 " pause\n"
419 " lfence\n"
420 " jmp 2b\n"
421 "1:\n"
422 " call 1f\n"
423 "2:\n"
424 " pause\n"
425 " lfence\n"
426 " jmp 2b\n"
427 "1:\n"
428 " .if \\to - \\from \n"
429 " RSBST \"(\\from + 1)\", \\to \n"
430 " .endif \n"
431 ".endmacro \n"
432 "\n"
433 "L_rsbst:\n"
434 " RSBST \n"
435 " addq $(16 * 2 * 8), %%rsp\n"
436 ::: "memory", "cc");
437 }
438
439 static inline void
pmap_switch_context(thread_t ot,thread_t nt,int cnum)440 pmap_switch_context(thread_t ot, thread_t nt, int cnum)
441 {
442 pmap_assert(ml_get_interrupts_enabled() == FALSE);
443 vm_map_t nmap = nt->map, omap = ot->map;
444 if ((omap != nmap) || (nmap->pmap->pagezero_accessible)) {
445 PMAP_DEACTIVATE_MAP(omap, ot, cnum);
446 PMAP_ACTIVATE_MAP(nmap, nt, cnum);
447 if (__improbable((nt->machine.mthr_do_segchk & MTHR_RSBST) &&
448 (current_kernel_stack_depth() + RSB_STUFF_SPACE_REQD) < kernel_stack_size)) {
449 machine_rsb_stuff();
450 }
451 }
452 }
453
454 /*
455 * Switch to a new thread.
456 * Save the old thread`s kernel state or continuation,
457 * and return it.
458 */
459 thread_t
machine_switch_context(thread_t old,thread_continue_t continuation,thread_t new)460 machine_switch_context(
461 thread_t old,
462 thread_continue_t continuation,
463 thread_t new)
464 {
465 assert(current_cpu_datap()->cpu_active_stack == old->kernel_stack);
466
467 #if HYPERVISOR
468 if (old->hv_thread_target) {
469 hv_callbacks.preempt(old->hv_thread_target);
470 }
471 #endif
472
473 #if CONFIG_CPU_COUNTERS
474 kpc_off_cpu(old);
475 #endif /* CONFIG_CPU_COUNTERS */
476
477 /*
478 * Save FP registers if in use.
479 */
480 fpu_switch_context(old, new);
481
482 old->machine.specFlags &= ~OnProc;
483 new->machine.specFlags |= OnProc;
484
485 /*
486 * Monitor the stack depth and report new max,
487 * not worrying about races.
488 */
489 vm_offset_t depth = current_kernel_stack_depth();
490 if (depth > kernel_stack_depth_max) {
491 kernel_stack_depth_max = depth;
492 KERNEL_DEBUG_CONSTANT(
493 MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_DEPTH),
494 (long) depth, 0, 0, 0, 0);
495 }
496
497 /*
498 * Switch address maps if need be, even if not switching tasks.
499 * (A server activation may be "borrowing" a client map.)
500 */
501 pmap_switch_context(old, new, cpu_number());
502
503 /*
504 * Load the rest of the user state for the new thread
505 */
506 act_machine_switch_pcb(old, new);
507
508 #if HYPERVISOR
509 if (new->hv_thread_target) {
510 hv_callbacks.dispatch(new->hv_thread_target);
511 }
512 #endif
513
514 return Switch_context(old, continuation, new);
515 }
516
517 boolean_t
machine_thread_on_core(thread_t thread)518 machine_thread_on_core(thread_t thread)
519 {
520 return thread->machine.specFlags & OnProc;
521 }
522
523 boolean_t
machine_thread_on_core_allow_invalid(thread_t thread)524 machine_thread_on_core_allow_invalid(thread_t thread)
525 {
526 extern int _copyin_atomic32(const char *src, uint32_t *dst);
527 uint32_t flags;
528
529 /*
530 * Utilize that the thread zone is sequestered which means
531 * that this kernel-to-kernel copyin can't read data
532 * from anything but a thread, zeroed or freed memory.
533 */
534 assert(get_preemption_level() > 0);
535 thread = pgz_decode_allow_invalid(thread, ZONE_ID_THREAD);
536 if (thread == THREAD_NULL) {
537 return false;
538 }
539 thread_require(thread);
540 if (_copyin_atomic32((void *)&thread->machine.specFlags, &flags) == 0) {
541 return flags & OnProc;
542 }
543 return false;
544 }
545
546 thread_t
machine_processor_shutdown(thread_t thread,void (* doshutdown)(processor_t),processor_t processor)547 machine_processor_shutdown(
548 thread_t thread,
549 void (*doshutdown)(processor_t),
550 processor_t processor)
551 {
552 #if CONFIG_VMX
553 vmx_suspend();
554 #endif
555 fpu_switch_context(thread, NULL);
556 pmap_switch_context(thread, processor->idle_thread, cpu_number());
557 return Shutdown_context(thread, doshutdown, processor);
558 }
559
560
561 /*
562 * This is where registers that are not normally specified by the mach-o
563 * file on an execve would be nullified, perhaps to avoid a covert channel.
564 */
565 void
machine_thread_state_initialize(thread_t thread)566 machine_thread_state_initialize(
567 thread_t thread)
568 {
569 /*
570 * If there's an fpu save area, free it.
571 * The initialized state will then be lazily faulted-in, if required.
572 * And if we're target, re-arm the no-fpu trap.
573 */
574 if (thread->machine.ifps) {
575 (void) fpu_set_fxstate(thread, NULL, x86_FLOAT_STATE64);
576
577 if (thread == current_thread()) {
578 clear_fpu();
579 }
580 }
581
582 if (thread->machine.ids) {
583 zfree(ids_zone, thread->machine.ids);
584 thread->machine.ids = NULL;
585 }
586 }
587
588 uint32_t
get_eflags_exportmask(void)589 get_eflags_exportmask(void)
590 {
591 return EFL_USER_SET;
592 }
593
594 /*
595 * x86_SAVED_STATE32 - internal save/restore general register state on 32/64 bit processors
596 * for 32bit tasks only
597 * x86_SAVED_STATE64 - internal save/restore general register state on 64 bit processors
598 * for 64bit tasks only
599 * x86_THREAD_STATE32 - external set/get general register state on 32/64 bit processors
600 * for 32bit tasks only
601 * x86_THREAD_STATE64 - external set/get general register state on 64 bit processors
602 * for 64bit tasks only
603 * x86_SAVED_STATE - external set/get general register state on 32/64 bit processors
604 * for either 32bit or 64bit tasks
605 * x86_FLOAT_STATE32 - internal/external save/restore float and xmm state on 32/64 bit processors
606 * for 32bit tasks only
607 * x86_FLOAT_STATE64 - internal/external save/restore float and xmm state on 64 bit processors
608 * for 64bit tasks only
609 * x86_FLOAT_STATE - external save/restore float and xmm state on 32/64 bit processors
610 * for either 32bit or 64bit tasks
611 * x86_EXCEPTION_STATE32 - external get exception state on 32/64 bit processors
612 * for 32bit tasks only
613 * x86_EXCEPTION_STATE64 - external get exception state on 64 bit processors
614 * for 64bit tasks only
615 * x86_EXCEPTION_STATE - external get exception state on 323/64 bit processors
616 * for either 32bit or 64bit tasks
617 */
618
619
620 static void
get_exception_state64(thread_t thread,x86_exception_state64_t * es)621 get_exception_state64(thread_t thread, x86_exception_state64_t *es)
622 {
623 x86_saved_state64_t *saved_state;
624
625 saved_state = USER_REGS64(thread);
626
627 es->trapno = saved_state->isf.trapno;
628 es->cpu = saved_state->isf.cpu;
629 es->err = (typeof(es->err))saved_state->isf.err;
630 es->faultvaddr = saved_state->cr2;
631 }
632
633 static void
get_exception_state32(thread_t thread,x86_exception_state32_t * es)634 get_exception_state32(thread_t thread, x86_exception_state32_t *es)
635 {
636 x86_saved_state32_t *saved_state;
637
638 saved_state = USER_REGS32(thread);
639
640 es->trapno = saved_state->trapno;
641 es->cpu = saved_state->cpu;
642 es->err = saved_state->err;
643 es->faultvaddr = saved_state->cr2;
644 }
645
646
647 static int
set_thread_state32(thread_t thread,x86_thread_state32_t * ts)648 set_thread_state32(thread_t thread, x86_thread_state32_t *ts)
649 {
650 x86_saved_state32_t *saved_state;
651
652 pal_register_cache_state(thread, DIRTY);
653
654 saved_state = USER_REGS32(thread);
655
656 /*
657 * Scrub segment selector values:
658 */
659 ts->cs = USER_CS;
660 /*
661 * On a 64 bit kernel, we always override the data segments,
662 * as the actual selector numbers have changed. This also
663 * means that we don't support setting the data segments
664 * manually any more.
665 */
666 ts->ss = USER_DS;
667 ts->ds = USER_DS;
668 ts->es = USER_DS;
669
670 /* Set GS to CTHREAD only if's been established */
671 ts->gs = thread->machine.cthread_self ? USER_CTHREAD : NULL_SEG;
672
673 /* Check segment selectors are safe */
674 if (!valid_user_segment_selectors(ts->cs,
675 ts->ss,
676 ts->ds,
677 ts->es,
678 ts->fs,
679 ts->gs)) {
680 return KERN_INVALID_ARGUMENT;
681 }
682
683 saved_state->eax = ts->eax;
684 saved_state->ebx = ts->ebx;
685 saved_state->ecx = ts->ecx;
686 saved_state->edx = ts->edx;
687 saved_state->edi = ts->edi;
688 saved_state->esi = ts->esi;
689 saved_state->ebp = ts->ebp;
690 saved_state->uesp = ts->esp;
691 saved_state->efl = (ts->eflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
692 saved_state->eip = ts->eip;
693 saved_state->cs = ts->cs;
694 saved_state->ss = ts->ss;
695 saved_state->ds = ts->ds;
696 saved_state->es = ts->es;
697 saved_state->fs = ts->fs;
698 saved_state->gs = ts->gs;
699
700 /*
701 * If the trace trap bit is being set,
702 * ensure that the user returns via iret
703 * - which is signaled thusly:
704 */
705 if ((saved_state->efl & EFL_TF) && saved_state->cs == SYSENTER_CS) {
706 saved_state->cs = SYSENTER_TF_CS;
707 }
708
709 return KERN_SUCCESS;
710 }
711
712 static int
set_thread_state64(thread_t thread,void * state,int full)713 set_thread_state64(thread_t thread, void *state, int full)
714 {
715 x86_thread_state64_t *ts;
716 x86_saved_state64_t *saved_state;
717
718 if (full == TRUE) {
719 ts = &((x86_thread_full_state64_t *)state)->ss64;
720 if (!valid_user_code_selector(((x86_thread_full_state64_t *)ts)->ss64.cs)) {
721 return KERN_INVALID_ARGUMENT;
722 }
723 } else {
724 ts = (x86_thread_state64_t *)state;
725 // In this case, ts->cs exists but is ignored, and
726 // CS is always set to USER_CS below instead.
727 }
728
729 pal_register_cache_state(thread, DIRTY);
730
731 saved_state = USER_REGS64(thread);
732
733 if (!IS_USERADDR64_CANONICAL(ts->rsp) ||
734 !IS_USERADDR64_CANONICAL(ts->rip)) {
735 return KERN_INVALID_ARGUMENT;
736 }
737
738 saved_state->r8 = ts->r8;
739 saved_state->r9 = ts->r9;
740 saved_state->r10 = ts->r10;
741 saved_state->r11 = ts->r11;
742 saved_state->r12 = ts->r12;
743 saved_state->r13 = ts->r13;
744 saved_state->r14 = ts->r14;
745 saved_state->r15 = ts->r15;
746 saved_state->rax = ts->rax;
747 saved_state->rbx = ts->rbx;
748 saved_state->rcx = ts->rcx;
749 saved_state->rdx = ts->rdx;
750 saved_state->rdi = ts->rdi;
751 saved_state->rsi = ts->rsi;
752 saved_state->rbp = ts->rbp;
753 saved_state->isf.rsp = ts->rsp;
754 saved_state->isf.rflags = (ts->rflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
755 saved_state->isf.rip = ts->rip;
756
757 if (full == FALSE) {
758 saved_state->isf.cs = USER64_CS;
759 } else {
760 saved_state->isf.cs = ((x86_thread_full_state64_t *)ts)->ss64.cs;
761 saved_state->isf.ss = ((x86_thread_full_state64_t *)ts)->ss;
762 saved_state->ds = (uint32_t)((x86_thread_full_state64_t *)ts)->ds;
763 saved_state->es = (uint32_t)((x86_thread_full_state64_t *)ts)->es;
764 machine_thread_set_tsd_base(thread,
765 ((x86_thread_full_state64_t *)ts)->gsbase);
766 }
767
768 saved_state->fs = (uint32_t)ts->fs;
769 saved_state->gs = (uint32_t)ts->gs;
770
771 return KERN_SUCCESS;
772 }
773
774
775
776 static void
get_thread_state32(thread_t thread,x86_thread_state32_t * ts)777 get_thread_state32(thread_t thread, x86_thread_state32_t *ts)
778 {
779 x86_saved_state32_t *saved_state;
780
781 pal_register_cache_state(thread, VALID);
782
783 saved_state = USER_REGS32(thread);
784
785 ts->eax = saved_state->eax;
786 ts->ebx = saved_state->ebx;
787 ts->ecx = saved_state->ecx;
788 ts->edx = saved_state->edx;
789 ts->edi = saved_state->edi;
790 ts->esi = saved_state->esi;
791 ts->ebp = saved_state->ebp;
792 ts->esp = saved_state->uesp;
793 ts->eflags = saved_state->efl;
794 ts->eip = saved_state->eip;
795 ts->cs = saved_state->cs;
796 ts->ss = saved_state->ss;
797 ts->ds = saved_state->ds;
798 ts->es = saved_state->es;
799 ts->fs = saved_state->fs;
800 ts->gs = saved_state->gs;
801 }
802
803
804 static void
get_thread_state64(thread_t thread,void * state,boolean_t full)805 get_thread_state64(thread_t thread, void *state, boolean_t full)
806 {
807 x86_thread_state64_t *ts;
808 x86_saved_state64_t *saved_state;
809
810 if (full == TRUE) {
811 ts = &((x86_thread_full_state64_t *)state)->ss64;
812 } else {
813 ts = (x86_thread_state64_t *)state;
814 }
815
816 pal_register_cache_state(thread, VALID);
817
818 saved_state = USER_REGS64(thread);
819
820 ts->r8 = saved_state->r8;
821 ts->r9 = saved_state->r9;
822 ts->r10 = saved_state->r10;
823 ts->r11 = saved_state->r11;
824 ts->r12 = saved_state->r12;
825 ts->r13 = saved_state->r13;
826 ts->r14 = saved_state->r14;
827 ts->r15 = saved_state->r15;
828 ts->rax = saved_state->rax;
829 ts->rbx = saved_state->rbx;
830 ts->rcx = saved_state->rcx;
831 ts->rdx = saved_state->rdx;
832 ts->rdi = saved_state->rdi;
833 ts->rsi = saved_state->rsi;
834 ts->rbp = saved_state->rbp;
835 ts->rsp = saved_state->isf.rsp;
836 ts->rflags = saved_state->isf.rflags;
837 ts->rip = saved_state->isf.rip;
838 ts->cs = saved_state->isf.cs;
839
840 if (full == TRUE) {
841 ((x86_thread_full_state64_t *)state)->ds = saved_state->ds;
842 ((x86_thread_full_state64_t *)state)->es = saved_state->es;
843 ((x86_thread_full_state64_t *)state)->ss = saved_state->isf.ss;
844 ((x86_thread_full_state64_t *)state)->gsbase =
845 thread->machine.cthread_self;
846 }
847
848 ts->fs = saved_state->fs;
849 ts->gs = saved_state->gs;
850 }
851
852 kern_return_t
machine_thread_state_convert_to_user(__unused thread_t thread,__unused thread_flavor_t flavor,__unused thread_state_t tstate,__unused mach_msg_type_number_t * count,__unused thread_set_status_flags_t tssf_flags)853 machine_thread_state_convert_to_user(
854 __unused thread_t thread,
855 __unused thread_flavor_t flavor,
856 __unused thread_state_t tstate,
857 __unused mach_msg_type_number_t *count,
858 __unused thread_set_status_flags_t tssf_flags)
859 {
860 // No conversion to userspace representation on this platform
861 return KERN_SUCCESS;
862 }
863
864 kern_return_t
machine_thread_state_convert_from_user(__unused thread_t thread,__unused thread_flavor_t flavor,__unused thread_state_t tstate,__unused mach_msg_type_number_t count,__unused thread_state_t old_tstate,__unused mach_msg_type_number_t old_count,__unused thread_set_status_flags_t tssf_flags)865 machine_thread_state_convert_from_user(
866 __unused thread_t thread,
867 __unused thread_flavor_t flavor,
868 __unused thread_state_t tstate,
869 __unused mach_msg_type_number_t count,
870 __unused thread_state_t old_tstate,
871 __unused mach_msg_type_number_t old_count,
872 __unused thread_set_status_flags_t tssf_flags)
873 {
874 // No conversion from userspace representation on this platform
875 return KERN_SUCCESS;
876 }
877
878 kern_return_t
machine_thread_siguctx_pointer_convert_to_user(__unused thread_t thread,__unused user_addr_t * uctxp)879 machine_thread_siguctx_pointer_convert_to_user(
880 __unused thread_t thread,
881 __unused user_addr_t *uctxp)
882 {
883 // No conversion to userspace representation on this platform
884 return KERN_SUCCESS;
885 }
886
887 kern_return_t
machine_thread_function_pointers_convert_from_user(__unused thread_t thread,__unused user_addr_t * fptrs,__unused uint32_t count)888 machine_thread_function_pointers_convert_from_user(
889 __unused thread_t thread,
890 __unused user_addr_t *fptrs,
891 __unused uint32_t count)
892 {
893 // No conversion from userspace representation on this platform
894 return KERN_SUCCESS;
895 }
896
897 /*
898 * act_machine_set_state:
899 *
900 * Set the status of the specified thread.
901 */
902
903 kern_return_t
machine_thread_set_state(thread_t thr_act,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t count)904 machine_thread_set_state(
905 thread_t thr_act,
906 thread_flavor_t flavor,
907 thread_state_t tstate,
908 mach_msg_type_number_t count)
909 {
910 switch (flavor) {
911 case x86_SAVED_STATE32:
912 {
913 x86_saved_state32_t *state;
914 x86_saved_state32_t *saved_state;
915
916 if (count < x86_SAVED_STATE32_COUNT) {
917 return KERN_INVALID_ARGUMENT;
918 }
919
920 state = (x86_saved_state32_t *) tstate;
921
922 /*
923 * Refuse to allow 64-bit processes to set
924 * 32-bit state.
925 */
926 if (thread_is_64bit_addr(thr_act)) {
927 return KERN_INVALID_ARGUMENT;
928 }
929
930 /* Check segment selectors are safe */
931 if (!valid_user_segment_selectors(state->cs,
932 state->ss,
933 state->ds,
934 state->es,
935 state->fs,
936 state->gs)) {
937 return KERN_INVALID_ARGUMENT;
938 }
939
940 pal_register_cache_state(thr_act, DIRTY);
941
942 saved_state = USER_REGS32(thr_act);
943
944 /*
945 * General registers
946 */
947 saved_state->edi = state->edi;
948 saved_state->esi = state->esi;
949 saved_state->ebp = state->ebp;
950 saved_state->uesp = state->uesp;
951 saved_state->ebx = state->ebx;
952 saved_state->edx = state->edx;
953 saved_state->ecx = state->ecx;
954 saved_state->eax = state->eax;
955 saved_state->eip = state->eip;
956
957 saved_state->efl = (state->efl & ~EFL_USER_CLEAR) | EFL_USER_SET;
958
959 /*
960 * If the trace trap bit is being set,
961 * ensure that the user returns via iret
962 * - which is signaled thusly:
963 */
964 if ((saved_state->efl & EFL_TF) && state->cs == SYSENTER_CS) {
965 state->cs = SYSENTER_TF_CS;
966 }
967
968 /*
969 * User setting segment registers.
970 * Code and stack selectors have already been
971 * checked. Others will be reset by 'iret'
972 * if they are not valid.
973 */
974 saved_state->cs = state->cs;
975 saved_state->ss = state->ss;
976 saved_state->ds = state->ds;
977 saved_state->es = state->es;
978 saved_state->fs = state->fs;
979 saved_state->gs = state->gs;
980
981 break;
982 }
983
984 case x86_SAVED_STATE64:
985 {
986 x86_saved_state64_t *state;
987 x86_saved_state64_t *saved_state;
988
989 if (count < x86_SAVED_STATE64_COUNT) {
990 return KERN_INVALID_ARGUMENT;
991 }
992
993 if (!thread_is_64bit_addr(thr_act)) {
994 return KERN_INVALID_ARGUMENT;
995 }
996
997 state = (x86_saved_state64_t *) tstate;
998
999 /* Verify that the supplied code segment selector is
1000 * valid. In 64-bit mode, the FS and GS segment overrides
1001 * use the FS.base and GS.base MSRs to calculate
1002 * base addresses, and the trampolines don't directly
1003 * restore the segment registers--hence they are no
1004 * longer relevant for validation.
1005 */
1006 if (!valid_user_code_selector(state->isf.cs)) {
1007 return KERN_INVALID_ARGUMENT;
1008 }
1009
1010 /* Check pc and stack are canonical addresses */
1011 if (!IS_USERADDR64_CANONICAL(state->isf.rsp) ||
1012 !IS_USERADDR64_CANONICAL(state->isf.rip)) {
1013 return KERN_INVALID_ARGUMENT;
1014 }
1015
1016 pal_register_cache_state(thr_act, DIRTY);
1017
1018 saved_state = USER_REGS64(thr_act);
1019
1020 /*
1021 * General registers
1022 */
1023 saved_state->r8 = state->r8;
1024 saved_state->r9 = state->r9;
1025 saved_state->r10 = state->r10;
1026 saved_state->r11 = state->r11;
1027 saved_state->r12 = state->r12;
1028 saved_state->r13 = state->r13;
1029 saved_state->r14 = state->r14;
1030 saved_state->r15 = state->r15;
1031 saved_state->rdi = state->rdi;
1032 saved_state->rsi = state->rsi;
1033 saved_state->rbp = state->rbp;
1034 saved_state->rbx = state->rbx;
1035 saved_state->rdx = state->rdx;
1036 saved_state->rcx = state->rcx;
1037 saved_state->rax = state->rax;
1038 saved_state->isf.rsp = state->isf.rsp;
1039 saved_state->isf.rip = state->isf.rip;
1040
1041 saved_state->isf.rflags = (state->isf.rflags & ~EFL_USER_CLEAR) | EFL_USER_SET;
1042
1043 /*
1044 * User setting segment registers.
1045 * Code and stack selectors have already been
1046 * checked. Others will be reset by 'sys'
1047 * if they are not valid.
1048 */
1049 saved_state->isf.cs = state->isf.cs;
1050 saved_state->isf.ss = state->isf.ss;
1051 saved_state->fs = state->fs;
1052 saved_state->gs = state->gs;
1053
1054 break;
1055 }
1056
1057 case x86_FLOAT_STATE32:
1058 case x86_AVX_STATE32:
1059 case x86_AVX512_STATE32:
1060 {
1061 if (count != _MachineStateCount[flavor]) {
1062 return KERN_INVALID_ARGUMENT;
1063 }
1064
1065 if (thread_is_64bit_addr(thr_act)) {
1066 return KERN_INVALID_ARGUMENT;
1067 }
1068
1069 return fpu_set_fxstate(thr_act, tstate, flavor);
1070 }
1071
1072 case x86_FLOAT_STATE64:
1073 case x86_AVX_STATE64:
1074 case x86_AVX512_STATE64:
1075 {
1076 if (count != _MachineStateCount[flavor]) {
1077 return KERN_INVALID_ARGUMENT;
1078 }
1079
1080 if (!thread_is_64bit_addr(thr_act)) {
1081 return KERN_INVALID_ARGUMENT;
1082 }
1083
1084 return fpu_set_fxstate(thr_act, tstate, flavor);
1085 }
1086
1087 case x86_FLOAT_STATE:
1088 {
1089 x86_float_state_t *state;
1090
1091 if (count != x86_FLOAT_STATE_COUNT) {
1092 return KERN_INVALID_ARGUMENT;
1093 }
1094
1095 state = (x86_float_state_t *)tstate;
1096 if (state->fsh.flavor == x86_FLOAT_STATE64 && state->fsh.count == x86_FLOAT_STATE64_COUNT &&
1097 thread_is_64bit_addr(thr_act)) {
1098 return fpu_set_fxstate(thr_act, (thread_state_t)&state->ufs.fs64, x86_FLOAT_STATE64);
1099 }
1100 if (state->fsh.flavor == x86_FLOAT_STATE32 && state->fsh.count == x86_FLOAT_STATE32_COUNT &&
1101 !thread_is_64bit_addr(thr_act)) {
1102 return fpu_set_fxstate(thr_act, (thread_state_t)&state->ufs.fs32, x86_FLOAT_STATE32);
1103 }
1104 return KERN_INVALID_ARGUMENT;
1105 }
1106
1107 case x86_AVX_STATE:
1108 case x86_AVX512_STATE:
1109 {
1110 x86_avx_state_t *state;
1111
1112 if (count != _MachineStateCount[flavor]) {
1113 return KERN_INVALID_ARGUMENT;
1114 }
1115
1116 state = (x86_avx_state_t *)tstate;
1117 /* Flavors are defined to have sequential values: 32-bit, 64-bit, non-specific */
1118 /* 64-bit flavor? */
1119 if (state->ash.flavor == (flavor - 1) &&
1120 state->ash.count == _MachineStateCount[flavor - 1] &&
1121 thread_is_64bit_addr(thr_act)) {
1122 return fpu_set_fxstate(thr_act,
1123 (thread_state_t)&state->ufs.as64,
1124 flavor - 1);
1125 }
1126 /* 32-bit flavor? */
1127 if (state->ash.flavor == (flavor - 2) &&
1128 state->ash.count == _MachineStateCount[flavor - 2] &&
1129 !thread_is_64bit_addr(thr_act)) {
1130 return fpu_set_fxstate(thr_act,
1131 (thread_state_t)&state->ufs.as32,
1132 flavor - 2);
1133 }
1134 return KERN_INVALID_ARGUMENT;
1135 }
1136
1137 case x86_THREAD_STATE32:
1138 {
1139 if (count != x86_THREAD_STATE32_COUNT) {
1140 return KERN_INVALID_ARGUMENT;
1141 }
1142
1143 if (thread_is_64bit_addr(thr_act)) {
1144 return KERN_INVALID_ARGUMENT;
1145 }
1146
1147 return set_thread_state32(thr_act, (x86_thread_state32_t *)tstate);
1148 }
1149
1150 case x86_THREAD_STATE64:
1151 {
1152 if (count != x86_THREAD_STATE64_COUNT) {
1153 return KERN_INVALID_ARGUMENT;
1154 }
1155
1156 if (!thread_is_64bit_addr(thr_act)) {
1157 return KERN_INVALID_ARGUMENT;
1158 }
1159
1160 return set_thread_state64(thr_act, tstate, FALSE);
1161 }
1162
1163 case x86_THREAD_FULL_STATE64:
1164 {
1165 if (count != x86_THREAD_FULL_STATE64_COUNT) {
1166 return KERN_INVALID_ARGUMENT;
1167 }
1168
1169 if (!thread_is_64bit_addr(thr_act)) {
1170 return KERN_INVALID_ARGUMENT;
1171 }
1172
1173 /* If this process does not have a custom LDT, return failure */
1174 if (get_threadtask(thr_act)->i386_ldt == 0) {
1175 return KERN_INVALID_ARGUMENT;
1176 }
1177
1178 return set_thread_state64(thr_act, tstate, TRUE);
1179 }
1180
1181 case x86_THREAD_STATE:
1182 {
1183 x86_thread_state_t *state;
1184
1185 if (count != x86_THREAD_STATE_COUNT) {
1186 return KERN_INVALID_ARGUMENT;
1187 }
1188
1189 state = (x86_thread_state_t *)tstate;
1190
1191 if (state->tsh.flavor == x86_THREAD_STATE64 &&
1192 state->tsh.count == x86_THREAD_STATE64_COUNT &&
1193 thread_is_64bit_addr(thr_act)) {
1194 return set_thread_state64(thr_act, &state->uts.ts64, FALSE);
1195 } else if (state->tsh.flavor == x86_THREAD_FULL_STATE64 &&
1196 state->tsh.count == x86_THREAD_FULL_STATE64_COUNT &&
1197 thread_is_64bit_addr(thr_act) && get_threadtask(thr_act)->i386_ldt != 0) {
1198 return set_thread_state64(thr_act, &state->uts.ts64, TRUE);
1199 } else if (state->tsh.flavor == x86_THREAD_STATE32 &&
1200 state->tsh.count == x86_THREAD_STATE32_COUNT &&
1201 !thread_is_64bit_addr(thr_act)) {
1202 return set_thread_state32(thr_act, &state->uts.ts32);
1203 } else {
1204 return KERN_INVALID_ARGUMENT;
1205 }
1206 }
1207 case x86_DEBUG_STATE32:
1208 {
1209 x86_debug_state32_t *state;
1210 kern_return_t ret;
1211
1212 if (thread_is_64bit_addr(thr_act)) {
1213 return KERN_INVALID_ARGUMENT;
1214 }
1215
1216 state = (x86_debug_state32_t *)tstate;
1217
1218 ret = set_debug_state32(thr_act, state);
1219
1220 return ret;
1221 }
1222 case x86_DEBUG_STATE64:
1223 {
1224 x86_debug_state64_t *state;
1225 kern_return_t ret;
1226
1227 if (!thread_is_64bit_addr(thr_act)) {
1228 return KERN_INVALID_ARGUMENT;
1229 }
1230
1231 state = (x86_debug_state64_t *)tstate;
1232
1233 ret = set_debug_state64(thr_act, state);
1234
1235 return ret;
1236 }
1237 case x86_DEBUG_STATE:
1238 {
1239 x86_debug_state_t *state;
1240 kern_return_t ret = KERN_INVALID_ARGUMENT;
1241
1242 if (count != x86_DEBUG_STATE_COUNT) {
1243 return KERN_INVALID_ARGUMENT;
1244 }
1245
1246 state = (x86_debug_state_t *)tstate;
1247 if (state->dsh.flavor == x86_DEBUG_STATE64 &&
1248 state->dsh.count == x86_DEBUG_STATE64_COUNT &&
1249 thread_is_64bit_addr(thr_act)) {
1250 ret = set_debug_state64(thr_act, &state->uds.ds64);
1251 } else if (state->dsh.flavor == x86_DEBUG_STATE32 &&
1252 state->dsh.count == x86_DEBUG_STATE32_COUNT &&
1253 !thread_is_64bit_addr(thr_act)) {
1254 ret = set_debug_state32(thr_act, &state->uds.ds32);
1255 }
1256 return ret;
1257 }
1258 default:
1259 return KERN_INVALID_ARGUMENT;
1260 }
1261
1262 return KERN_SUCCESS;
1263 }
1264
1265 mach_vm_address_t
machine_thread_pc(thread_t thr_act)1266 machine_thread_pc(thread_t thr_act)
1267 {
1268 if (thread_is_64bit_addr(thr_act)) {
1269 return (mach_vm_address_t)USER_REGS64(thr_act)->isf.rip;
1270 } else {
1271 return (mach_vm_address_t)USER_REGS32(thr_act)->eip;
1272 }
1273 }
1274
1275 void
machine_thread_reset_pc(thread_t thr_act,mach_vm_address_t pc)1276 machine_thread_reset_pc(thread_t thr_act, mach_vm_address_t pc)
1277 {
1278 pal_register_cache_state(thr_act, DIRTY);
1279
1280 if (thread_is_64bit_addr(thr_act)) {
1281 if (!IS_USERADDR64_CANONICAL(pc)) {
1282 pc = 0;
1283 }
1284 USER_REGS64(thr_act)->isf.rip = (uint64_t)pc;
1285 } else {
1286 USER_REGS32(thr_act)->eip = (uint32_t)pc;
1287 }
1288 }
1289
1290
1291 /*
1292 * thread_getstatus:
1293 *
1294 * Get the status of the specified thread.
1295 */
1296
1297 kern_return_t
machine_thread_get_state(thread_t thr_act,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t * count)1298 machine_thread_get_state(
1299 thread_t thr_act,
1300 thread_flavor_t flavor,
1301 thread_state_t tstate,
1302 mach_msg_type_number_t *count)
1303 {
1304 switch (flavor) {
1305 case THREAD_STATE_FLAVOR_LIST:
1306 {
1307 if (*count < 3) {
1308 return KERN_INVALID_ARGUMENT;
1309 }
1310
1311 tstate[0] = i386_THREAD_STATE;
1312 tstate[1] = i386_FLOAT_STATE;
1313 tstate[2] = i386_EXCEPTION_STATE;
1314
1315 *count = 3;
1316 break;
1317 }
1318
1319 case THREAD_STATE_FLAVOR_LIST_NEW:
1320 {
1321 if (*count < 4) {
1322 return KERN_INVALID_ARGUMENT;
1323 }
1324
1325 tstate[0] = x86_THREAD_STATE;
1326 tstate[1] = x86_FLOAT_STATE;
1327 tstate[2] = x86_EXCEPTION_STATE;
1328 tstate[3] = x86_DEBUG_STATE;
1329
1330 *count = 4;
1331 break;
1332 }
1333
1334 case THREAD_STATE_FLAVOR_LIST_10_9:
1335 {
1336 if (*count < 5) {
1337 return KERN_INVALID_ARGUMENT;
1338 }
1339
1340 tstate[0] = x86_THREAD_STATE;
1341 tstate[1] = x86_FLOAT_STATE;
1342 tstate[2] = x86_EXCEPTION_STATE;
1343 tstate[3] = x86_DEBUG_STATE;
1344 tstate[4] = x86_AVX_STATE;
1345
1346 *count = 5;
1347 break;
1348 }
1349
1350 case THREAD_STATE_FLAVOR_LIST_10_13:
1351 {
1352 if (*count < 6) {
1353 return KERN_INVALID_ARGUMENT;
1354 }
1355
1356 tstate[0] = x86_THREAD_STATE;
1357 tstate[1] = x86_FLOAT_STATE;
1358 tstate[2] = x86_EXCEPTION_STATE;
1359 tstate[3] = x86_DEBUG_STATE;
1360 tstate[4] = x86_AVX_STATE;
1361 tstate[5] = x86_AVX512_STATE;
1362
1363 *count = 6;
1364 break;
1365 }
1366
1367 case THREAD_STATE_FLAVOR_LIST_10_15:
1368 {
1369 if (*count < 7) {
1370 return KERN_INVALID_ARGUMENT;
1371 }
1372
1373 tstate[0] = x86_THREAD_STATE;
1374 tstate[1] = x86_FLOAT_STATE;
1375 tstate[2] = x86_EXCEPTION_STATE;
1376 tstate[3] = x86_DEBUG_STATE;
1377 tstate[4] = x86_AVX_STATE;
1378 tstate[5] = x86_AVX512_STATE;
1379 tstate[6] = x86_PAGEIN_STATE;
1380
1381 *count = 7;
1382 break;
1383 }
1384
1385 case x86_SAVED_STATE32:
1386 {
1387 x86_saved_state32_t *state;
1388 x86_saved_state32_t *saved_state;
1389
1390 if (*count < x86_SAVED_STATE32_COUNT) {
1391 return KERN_INVALID_ARGUMENT;
1392 }
1393
1394 if (thread_is_64bit_addr(thr_act)) {
1395 return KERN_INVALID_ARGUMENT;
1396 }
1397
1398 state = (x86_saved_state32_t *) tstate;
1399 saved_state = USER_REGS32(thr_act);
1400
1401 /*
1402 * First, copy everything:
1403 */
1404 *state = *saved_state;
1405 state->ds = saved_state->ds & 0xffff;
1406 state->es = saved_state->es & 0xffff;
1407 state->fs = saved_state->fs & 0xffff;
1408 state->gs = saved_state->gs & 0xffff;
1409
1410 *count = x86_SAVED_STATE32_COUNT;
1411 break;
1412 }
1413
1414 case x86_SAVED_STATE64:
1415 {
1416 x86_saved_state64_t *state;
1417 x86_saved_state64_t *saved_state;
1418
1419 if (*count < x86_SAVED_STATE64_COUNT) {
1420 return KERN_INVALID_ARGUMENT;
1421 }
1422
1423 if (!thread_is_64bit_addr(thr_act)) {
1424 return KERN_INVALID_ARGUMENT;
1425 }
1426
1427 state = (x86_saved_state64_t *)tstate;
1428 saved_state = USER_REGS64(thr_act);
1429
1430 /*
1431 * First, copy everything:
1432 */
1433 *state = *saved_state;
1434 state->ds = saved_state->ds & 0xffff;
1435 state->es = saved_state->es & 0xffff;
1436 state->fs = saved_state->fs & 0xffff;
1437 state->gs = saved_state->gs & 0xffff;
1438
1439 *count = x86_SAVED_STATE64_COUNT;
1440 break;
1441 }
1442
1443 case x86_FLOAT_STATE32:
1444 {
1445 if (*count < x86_FLOAT_STATE32_COUNT) {
1446 return KERN_INVALID_ARGUMENT;
1447 }
1448
1449 if (thread_is_64bit_addr(thr_act)) {
1450 return KERN_INVALID_ARGUMENT;
1451 }
1452
1453 *count = x86_FLOAT_STATE32_COUNT;
1454
1455 return fpu_get_fxstate(thr_act, tstate, flavor);
1456 }
1457
1458 case x86_FLOAT_STATE64:
1459 {
1460 if (*count < x86_FLOAT_STATE64_COUNT) {
1461 return KERN_INVALID_ARGUMENT;
1462 }
1463
1464 if (!thread_is_64bit_addr(thr_act)) {
1465 return KERN_INVALID_ARGUMENT;
1466 }
1467
1468 *count = x86_FLOAT_STATE64_COUNT;
1469
1470 return fpu_get_fxstate(thr_act, tstate, flavor);
1471 }
1472
1473 case x86_FLOAT_STATE:
1474 {
1475 x86_float_state_t *state;
1476 kern_return_t kret;
1477
1478 if (*count < x86_FLOAT_STATE_COUNT) {
1479 return KERN_INVALID_ARGUMENT;
1480 }
1481
1482 state = (x86_float_state_t *)tstate;
1483
1484 /*
1485 * no need to bzero... currently
1486 * x86_FLOAT_STATE64_COUNT == x86_FLOAT_STATE32_COUNT
1487 */
1488 if (thread_is_64bit_addr(thr_act)) {
1489 state->fsh.flavor = x86_FLOAT_STATE64;
1490 state->fsh.count = x86_FLOAT_STATE64_COUNT;
1491
1492 kret = fpu_get_fxstate(thr_act, (thread_state_t)&state->ufs.fs64, x86_FLOAT_STATE64);
1493 } else {
1494 state->fsh.flavor = x86_FLOAT_STATE32;
1495 state->fsh.count = x86_FLOAT_STATE32_COUNT;
1496
1497 kret = fpu_get_fxstate(thr_act, (thread_state_t)&state->ufs.fs32, x86_FLOAT_STATE32);
1498 }
1499 *count = x86_FLOAT_STATE_COUNT;
1500
1501 return kret;
1502 }
1503
1504 case x86_AVX_STATE32:
1505 case x86_AVX512_STATE32:
1506 {
1507 if (*count != _MachineStateCount[flavor]) {
1508 return KERN_INVALID_ARGUMENT;
1509 }
1510
1511 if (thread_is_64bit_addr(thr_act)) {
1512 return KERN_INVALID_ARGUMENT;
1513 }
1514
1515 *count = _MachineStateCount[flavor];
1516
1517 return fpu_get_fxstate(thr_act, tstate, flavor);
1518 }
1519
1520 case x86_AVX_STATE64:
1521 case x86_AVX512_STATE64:
1522 {
1523 if (*count != _MachineStateCount[flavor]) {
1524 return KERN_INVALID_ARGUMENT;
1525 }
1526
1527 if (!thread_is_64bit_addr(thr_act)) {
1528 return KERN_INVALID_ARGUMENT;
1529 }
1530
1531 *count = _MachineStateCount[flavor];
1532
1533 return fpu_get_fxstate(thr_act, tstate, flavor);
1534 }
1535
1536 case x86_AVX_STATE:
1537 case x86_AVX512_STATE:
1538 {
1539 x86_avx_state_t *state;
1540 thread_state_t fstate;
1541
1542 if (*count < _MachineStateCount[flavor]) {
1543 return KERN_INVALID_ARGUMENT;
1544 }
1545
1546 *count = _MachineStateCount[flavor];
1547 state = (x86_avx_state_t *)tstate;
1548
1549 bzero((char *)state, *count * sizeof(int));
1550
1551 if (thread_is_64bit_addr(thr_act)) {
1552 flavor -= 1; /* 64-bit flavor */
1553 fstate = (thread_state_t) &state->ufs.as64;
1554 } else {
1555 flavor -= 2; /* 32-bit flavor */
1556 fstate = (thread_state_t) &state->ufs.as32;
1557 }
1558 state->ash.flavor = flavor;
1559 state->ash.count = _MachineStateCount[flavor];
1560
1561 return fpu_get_fxstate(thr_act, fstate, flavor);
1562 }
1563
1564 case x86_THREAD_STATE32:
1565 {
1566 if (*count < x86_THREAD_STATE32_COUNT) {
1567 return KERN_INVALID_ARGUMENT;
1568 }
1569
1570 if (thread_is_64bit_addr(thr_act)) {
1571 return KERN_INVALID_ARGUMENT;
1572 }
1573
1574 *count = x86_THREAD_STATE32_COUNT;
1575
1576 get_thread_state32(thr_act, (x86_thread_state32_t *)tstate);
1577 break;
1578 }
1579
1580 case x86_THREAD_STATE64:
1581 {
1582 if (*count < x86_THREAD_STATE64_COUNT) {
1583 return KERN_INVALID_ARGUMENT;
1584 }
1585
1586 if (!thread_is_64bit_addr(thr_act)) {
1587 return KERN_INVALID_ARGUMENT;
1588 }
1589
1590 *count = x86_THREAD_STATE64_COUNT;
1591
1592 get_thread_state64(thr_act, tstate, FALSE);
1593 break;
1594 }
1595
1596 case x86_THREAD_FULL_STATE64:
1597 {
1598 if (*count < x86_THREAD_FULL_STATE64_COUNT) {
1599 return KERN_INVALID_ARGUMENT;
1600 }
1601
1602 if (!thread_is_64bit_addr(thr_act)) {
1603 return KERN_INVALID_ARGUMENT;
1604 }
1605
1606 /* If this process does not have a custom LDT, return failure */
1607 if (get_threadtask(thr_act)->i386_ldt == 0) {
1608 return KERN_INVALID_ARGUMENT;
1609 }
1610
1611 *count = x86_THREAD_FULL_STATE64_COUNT;
1612
1613 get_thread_state64(thr_act, tstate, TRUE);
1614 break;
1615 }
1616
1617 case x86_THREAD_STATE:
1618 {
1619 x86_thread_state_t *state;
1620
1621 if (*count < x86_THREAD_STATE_COUNT) {
1622 return KERN_INVALID_ARGUMENT;
1623 }
1624
1625 state = (x86_thread_state_t *)tstate;
1626
1627 bzero((char *)state, sizeof(x86_thread_state_t));
1628
1629 if (thread_is_64bit_addr(thr_act)) {
1630 state->tsh.flavor = x86_THREAD_STATE64;
1631 state->tsh.count = x86_THREAD_STATE64_COUNT;
1632
1633 get_thread_state64(thr_act, &state->uts.ts64, FALSE);
1634 } else {
1635 state->tsh.flavor = x86_THREAD_STATE32;
1636 state->tsh.count = x86_THREAD_STATE32_COUNT;
1637
1638 get_thread_state32(thr_act, &state->uts.ts32);
1639 }
1640 *count = x86_THREAD_STATE_COUNT;
1641
1642 break;
1643 }
1644
1645
1646 case x86_EXCEPTION_STATE32:
1647 {
1648 if (*count < x86_EXCEPTION_STATE32_COUNT) {
1649 return KERN_INVALID_ARGUMENT;
1650 }
1651
1652 if (thread_is_64bit_addr(thr_act)) {
1653 return KERN_INVALID_ARGUMENT;
1654 }
1655
1656 *count = x86_EXCEPTION_STATE32_COUNT;
1657
1658 get_exception_state32(thr_act, (x86_exception_state32_t *)tstate);
1659 /*
1660 * Suppress the cpu number for binary compatibility
1661 * of this deprecated state.
1662 */
1663 ((x86_exception_state32_t *)tstate)->cpu = 0;
1664 break;
1665 }
1666
1667 case x86_EXCEPTION_STATE64:
1668 {
1669 if (*count < x86_EXCEPTION_STATE64_COUNT) {
1670 return KERN_INVALID_ARGUMENT;
1671 }
1672
1673 if (!thread_is_64bit_addr(thr_act)) {
1674 return KERN_INVALID_ARGUMENT;
1675 }
1676
1677 *count = x86_EXCEPTION_STATE64_COUNT;
1678
1679 get_exception_state64(thr_act, (x86_exception_state64_t *)tstate);
1680 /*
1681 * Suppress the cpu number for binary compatibility
1682 * of this deprecated state.
1683 */
1684 ((x86_exception_state64_t *)tstate)->cpu = 0;
1685 break;
1686 }
1687
1688 case x86_EXCEPTION_STATE:
1689 {
1690 x86_exception_state_t *state;
1691
1692 if (*count < x86_EXCEPTION_STATE_COUNT) {
1693 return KERN_INVALID_ARGUMENT;
1694 }
1695
1696 state = (x86_exception_state_t *)tstate;
1697
1698 bzero((char *)state, sizeof(x86_exception_state_t));
1699
1700 if (thread_is_64bit_addr(thr_act)) {
1701 state->esh.flavor = x86_EXCEPTION_STATE64;
1702 state->esh.count = x86_EXCEPTION_STATE64_COUNT;
1703
1704 get_exception_state64(thr_act, &state->ues.es64);
1705 } else {
1706 state->esh.flavor = x86_EXCEPTION_STATE32;
1707 state->esh.count = x86_EXCEPTION_STATE32_COUNT;
1708
1709 get_exception_state32(thr_act, &state->ues.es32);
1710 }
1711 *count = x86_EXCEPTION_STATE_COUNT;
1712
1713 break;
1714 }
1715 case x86_DEBUG_STATE32:
1716 {
1717 if (*count < x86_DEBUG_STATE32_COUNT) {
1718 return KERN_INVALID_ARGUMENT;
1719 }
1720
1721 if (thread_is_64bit_addr(thr_act)) {
1722 return KERN_INVALID_ARGUMENT;
1723 }
1724
1725 get_debug_state32(thr_act, (x86_debug_state32_t *)tstate);
1726
1727 *count = x86_DEBUG_STATE32_COUNT;
1728
1729 break;
1730 }
1731 case x86_DEBUG_STATE64:
1732 {
1733 if (*count < x86_DEBUG_STATE64_COUNT) {
1734 return KERN_INVALID_ARGUMENT;
1735 }
1736
1737 if (!thread_is_64bit_addr(thr_act)) {
1738 return KERN_INVALID_ARGUMENT;
1739 }
1740
1741 get_debug_state64(thr_act, (x86_debug_state64_t *)tstate);
1742
1743 *count = x86_DEBUG_STATE64_COUNT;
1744
1745 break;
1746 }
1747 case x86_DEBUG_STATE:
1748 {
1749 x86_debug_state_t *state;
1750
1751 if (*count < x86_DEBUG_STATE_COUNT) {
1752 return KERN_INVALID_ARGUMENT;
1753 }
1754
1755 state = (x86_debug_state_t *)tstate;
1756
1757 bzero(state, sizeof *state);
1758
1759 if (thread_is_64bit_addr(thr_act)) {
1760 state->dsh.flavor = x86_DEBUG_STATE64;
1761 state->dsh.count = x86_DEBUG_STATE64_COUNT;
1762
1763 get_debug_state64(thr_act, &state->uds.ds64);
1764 } else {
1765 state->dsh.flavor = x86_DEBUG_STATE32;
1766 state->dsh.count = x86_DEBUG_STATE32_COUNT;
1767
1768 get_debug_state32(thr_act, &state->uds.ds32);
1769 }
1770 *count = x86_DEBUG_STATE_COUNT;
1771 break;
1772 }
1773
1774 case x86_PAGEIN_STATE:
1775 {
1776 if (*count < x86_PAGEIN_STATE_COUNT) {
1777 return KERN_INVALID_ARGUMENT;
1778 }
1779
1780 x86_pagein_state_t *state = (void *)tstate;
1781
1782 state->__pagein_error = thr_act->t_pagein_error;
1783
1784 *count = x86_PAGEIN_STATE_COUNT;
1785 break;
1786 }
1787
1788 case x86_INSTRUCTION_STATE:
1789 {
1790 if (*count < x86_INSTRUCTION_STATE_COUNT) {
1791 return KERN_INVALID_ARGUMENT;
1792 }
1793
1794 x86_instruction_state_t *state = (void *)tstate;
1795 x86_instruction_state_t *src_state = THREAD_TO_PCB(thr_act)->insn_state;
1796
1797 if (src_state != 0 && (src_state->insn_stream_valid_bytes > 0 || src_state->out_of_synch)) {
1798 #if DEVELOPMENT || DEBUG
1799 extern int insnstream_force_cacheline_mismatch;
1800 #endif
1801 size_t byte_count = (src_state->insn_stream_valid_bytes > x86_INSTRUCTION_STATE_MAX_INSN_BYTES)
1802 ? x86_INSTRUCTION_STATE_MAX_INSN_BYTES : src_state->insn_stream_valid_bytes;
1803 if (byte_count > 0) {
1804 bcopy(src_state->insn_bytes, state->insn_bytes, byte_count);
1805 }
1806 state->insn_offset = src_state->insn_offset;
1807 state->insn_stream_valid_bytes = byte_count;
1808 #if DEVELOPMENT || DEBUG
1809 state->out_of_synch = src_state->out_of_synch || insnstream_force_cacheline_mismatch;
1810 insnstream_force_cacheline_mismatch = 0; /* One-shot, reset after use */
1811
1812 if (state->out_of_synch) {
1813 bcopy(&src_state->insn_cacheline[0], &state->insn_cacheline[0],
1814 x86_INSTRUCTION_STATE_CACHELINE_SIZE);
1815 } else {
1816 bzero(&state->insn_cacheline[0], x86_INSTRUCTION_STATE_CACHELINE_SIZE);
1817 }
1818 #else
1819 state->out_of_synch = src_state->out_of_synch;
1820 #endif
1821 *count = x86_INSTRUCTION_STATE_COUNT;
1822 } else {
1823 *count = 0;
1824 }
1825 break;
1826 }
1827
1828 case x86_LAST_BRANCH_STATE:
1829 {
1830 if (last_branch_enabled_modes != LBR_ENABLED_USERMODE || *count < x86_LAST_BRANCH_STATE_COUNT) {
1831 return KERN_INVALID_ARGUMENT;
1832 }
1833
1834 /* Callers to this function are assumed to be from user space and the LBR values will be filtered accordingly */
1835 if (i386_filtered_lbr_state_to_mach_thread_state(thr_act, (last_branch_state_t *)tstate, true) < 0) {
1836 *count = 0;
1837 return KERN_INVALID_ARGUMENT;
1838 }
1839
1840 *count = x86_LAST_BRANCH_STATE_COUNT;
1841 break;
1842 }
1843
1844 default:
1845 return KERN_INVALID_ARGUMENT;
1846 }
1847
1848 return KERN_SUCCESS;
1849 }
1850
1851 kern_return_t
machine_thread_get_kern_state(thread_t thread,thread_flavor_t flavor,thread_state_t tstate,mach_msg_type_number_t * count)1852 machine_thread_get_kern_state(
1853 thread_t thread,
1854 thread_flavor_t flavor,
1855 thread_state_t tstate,
1856 mach_msg_type_number_t *count)
1857 {
1858 x86_saved_state_t *int_state = current_cpu_datap()->cpu_int_state;
1859
1860 /*
1861 * This works only for an interrupted kernel thread
1862 */
1863 if (thread != current_thread() || int_state == NULL) {
1864 return KERN_FAILURE;
1865 }
1866
1867 switch (flavor) {
1868 case x86_THREAD_STATE32: {
1869 x86_thread_state32_t *state;
1870 x86_saved_state32_t *saved_state;
1871
1872 if (!is_saved_state32(int_state) ||
1873 *count < x86_THREAD_STATE32_COUNT) {
1874 return KERN_INVALID_ARGUMENT;
1875 }
1876
1877 state = (x86_thread_state32_t *) tstate;
1878
1879 saved_state = saved_state32(int_state);
1880 /*
1881 * General registers.
1882 */
1883 state->eax = saved_state->eax;
1884 state->ebx = saved_state->ebx;
1885 state->ecx = saved_state->ecx;
1886 state->edx = saved_state->edx;
1887 state->edi = saved_state->edi;
1888 state->esi = saved_state->esi;
1889 state->ebp = saved_state->ebp;
1890 state->esp = saved_state->uesp;
1891 state->eflags = saved_state->efl;
1892 state->eip = saved_state->eip;
1893 state->cs = saved_state->cs;
1894 state->ss = saved_state->ss;
1895 state->ds = saved_state->ds & 0xffff;
1896 state->es = saved_state->es & 0xffff;
1897 state->fs = saved_state->fs & 0xffff;
1898 state->gs = saved_state->gs & 0xffff;
1899
1900 *count = x86_THREAD_STATE32_COUNT;
1901
1902 return KERN_SUCCESS;
1903 }
1904
1905 case x86_THREAD_STATE64: {
1906 x86_thread_state64_t *state;
1907 x86_saved_state64_t *saved_state;
1908
1909 if (!is_saved_state64(int_state) ||
1910 *count < x86_THREAD_STATE64_COUNT) {
1911 return KERN_INVALID_ARGUMENT;
1912 }
1913
1914 state = (x86_thread_state64_t *) tstate;
1915
1916 saved_state = saved_state64(int_state);
1917 /*
1918 * General registers.
1919 */
1920 state->rax = saved_state->rax;
1921 state->rbx = saved_state->rbx;
1922 state->rcx = saved_state->rcx;
1923 state->rdx = saved_state->rdx;
1924 state->rdi = saved_state->rdi;
1925 state->rsi = saved_state->rsi;
1926 state->rbp = saved_state->rbp;
1927 state->rsp = saved_state->isf.rsp;
1928 state->r8 = saved_state->r8;
1929 state->r9 = saved_state->r9;
1930 state->r10 = saved_state->r10;
1931 state->r11 = saved_state->r11;
1932 state->r12 = saved_state->r12;
1933 state->r13 = saved_state->r13;
1934 state->r14 = saved_state->r14;
1935 state->r15 = saved_state->r15;
1936
1937 state->rip = saved_state->isf.rip;
1938 state->rflags = saved_state->isf.rflags;
1939 state->cs = saved_state->isf.cs;
1940 state->fs = saved_state->fs & 0xffff;
1941 state->gs = saved_state->gs & 0xffff;
1942 *count = x86_THREAD_STATE64_COUNT;
1943
1944 return KERN_SUCCESS;
1945 }
1946
1947 case x86_THREAD_STATE: {
1948 x86_thread_state_t *state = NULL;
1949
1950 if (*count < x86_THREAD_STATE_COUNT) {
1951 return KERN_INVALID_ARGUMENT;
1952 }
1953
1954 state = (x86_thread_state_t *) tstate;
1955
1956 if (is_saved_state32(int_state)) {
1957 x86_saved_state32_t *saved_state = saved_state32(int_state);
1958
1959 state->tsh.flavor = x86_THREAD_STATE32;
1960 state->tsh.count = x86_THREAD_STATE32_COUNT;
1961
1962 /*
1963 * General registers.
1964 */
1965 state->uts.ts32.eax = saved_state->eax;
1966 state->uts.ts32.ebx = saved_state->ebx;
1967 state->uts.ts32.ecx = saved_state->ecx;
1968 state->uts.ts32.edx = saved_state->edx;
1969 state->uts.ts32.edi = saved_state->edi;
1970 state->uts.ts32.esi = saved_state->esi;
1971 state->uts.ts32.ebp = saved_state->ebp;
1972 state->uts.ts32.esp = saved_state->uesp;
1973 state->uts.ts32.eflags = saved_state->efl;
1974 state->uts.ts32.eip = saved_state->eip;
1975 state->uts.ts32.cs = saved_state->cs;
1976 state->uts.ts32.ss = saved_state->ss;
1977 state->uts.ts32.ds = saved_state->ds & 0xffff;
1978 state->uts.ts32.es = saved_state->es & 0xffff;
1979 state->uts.ts32.fs = saved_state->fs & 0xffff;
1980 state->uts.ts32.gs = saved_state->gs & 0xffff;
1981 } else if (is_saved_state64(int_state)) {
1982 x86_saved_state64_t *saved_state = saved_state64(int_state);
1983
1984 state->tsh.flavor = x86_THREAD_STATE64;
1985 state->tsh.count = x86_THREAD_STATE64_COUNT;
1986
1987 /*
1988 * General registers.
1989 */
1990 state->uts.ts64.rax = saved_state->rax;
1991 state->uts.ts64.rbx = saved_state->rbx;
1992 state->uts.ts64.rcx = saved_state->rcx;
1993 state->uts.ts64.rdx = saved_state->rdx;
1994 state->uts.ts64.rdi = saved_state->rdi;
1995 state->uts.ts64.rsi = saved_state->rsi;
1996 state->uts.ts64.rbp = saved_state->rbp;
1997 state->uts.ts64.rsp = saved_state->isf.rsp;
1998 state->uts.ts64.r8 = saved_state->r8;
1999 state->uts.ts64.r9 = saved_state->r9;
2000 state->uts.ts64.r10 = saved_state->r10;
2001 state->uts.ts64.r11 = saved_state->r11;
2002 state->uts.ts64.r12 = saved_state->r12;
2003 state->uts.ts64.r13 = saved_state->r13;
2004 state->uts.ts64.r14 = saved_state->r14;
2005 state->uts.ts64.r15 = saved_state->r15;
2006
2007 state->uts.ts64.rip = saved_state->isf.rip;
2008 state->uts.ts64.rflags = saved_state->isf.rflags;
2009 state->uts.ts64.cs = saved_state->isf.cs;
2010 state->uts.ts64.fs = saved_state->fs & 0xffff;
2011 state->uts.ts64.gs = saved_state->gs & 0xffff;
2012 } else {
2013 panic("unknown thread state");
2014 }
2015
2016 *count = x86_THREAD_STATE_COUNT;
2017 return KERN_SUCCESS;
2018 }
2019 }
2020 return KERN_FAILURE;
2021 }
2022
2023
2024 void
machine_thread_switch_addrmode(thread_t thread)2025 machine_thread_switch_addrmode(thread_t thread)
2026 {
2027 task_t task = get_threadtask(thread);
2028
2029 /*
2030 * We don't want to be preempted until we're done
2031 * - particularly if we're switching the current thread
2032 */
2033 disable_preemption();
2034
2035 /*
2036 * Reset the state saveareas. As we're resetting, we anticipate no
2037 * memory allocations in this path.
2038 */
2039 machine_thread_create(thread, task, false);
2040
2041 /* Adjust FPU state */
2042 fpu_switch_addrmode(thread, task_has_64Bit_addr(task));
2043
2044 /* If we're switching ourselves, reset the pcb addresses etc. */
2045 if (thread == current_thread()) {
2046 boolean_t istate = ml_set_interrupts_enabled(FALSE);
2047 act_machine_switch_pcb(NULL, thread);
2048 ml_set_interrupts_enabled(istate);
2049 }
2050 enable_preemption();
2051 }
2052
2053
2054
2055 /*
2056 * This is used to set the current thr_act/thread
2057 * when starting up a new processor
2058 */
2059 void
machine_set_current_thread(thread_t thread)2060 machine_set_current_thread(thread_t thread)
2061 {
2062 current_cpu_datap()->cpu_active_thread = thread;
2063 }
2064
2065
2066 /*
2067 * Perform machine-dependent per-thread initializations
2068 */
2069 void
machine_thread_init(void)2070 machine_thread_init(void)
2071 {
2072 fpu_module_init();
2073 }
2074
2075 /*
2076 * machine_thread_template_init: Initialize machine-specific portion of
2077 * the thread template.
2078 */
2079 void
machine_thread_template_init(thread_t thr_template)2080 machine_thread_template_init(thread_t thr_template)
2081 {
2082 assert(fpu_default != UNDEFINED);
2083
2084 THREAD_TO_PCB(thr_template)->xstate = fpu_default;
2085 }
2086
2087 user_addr_t
get_useraddr(void)2088 get_useraddr(void)
2089 {
2090 thread_t thr_act = current_thread();
2091
2092 if (thread_is_64bit_addr(thr_act)) {
2093 x86_saved_state64_t *iss64;
2094
2095 iss64 = USER_REGS64(thr_act);
2096
2097 return iss64->isf.rip;
2098 } else {
2099 x86_saved_state32_t *iss32;
2100
2101 iss32 = USER_REGS32(thr_act);
2102
2103 return iss32->eip;
2104 }
2105 }
2106
2107 /*
2108 * detach and return a kernel stack from a thread
2109 */
2110
2111 vm_offset_t
machine_stack_detach(thread_t thread)2112 machine_stack_detach(thread_t thread)
2113 {
2114 vm_offset_t stack;
2115
2116 KERNEL_DEBUG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_DETACH),
2117 (uintptr_t)thread_tid(thread), thread->priority,
2118 thread->sched_pri, 0,
2119 0);
2120
2121 stack = thread->kernel_stack;
2122 #if CONFIG_STKSZ
2123 kcov_stksz_set_thread_stack(thread, stack);
2124 #endif
2125 thread->kernel_stack = 0;
2126
2127 return stack;
2128 }
2129
2130 /*
2131 * attach a kernel stack to a thread and initialize it
2132 */
2133
2134 void
machine_stack_attach(thread_t thread,vm_offset_t stack)2135 machine_stack_attach(
2136 thread_t thread,
2137 vm_offset_t stack)
2138 {
2139 struct x86_kernel_state *statep;
2140
2141 KERNEL_DEBUG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_ATTACH),
2142 (uintptr_t)thread_tid(thread), thread->priority,
2143 thread->sched_pri, 0, 0);
2144
2145 assert(stack);
2146 thread->kernel_stack = stack;
2147 #if CONFIG_STKSZ
2148 kcov_stksz_set_thread_stack(thread, 0);
2149 #endif
2150 thread_initialize_kernel_state(thread);
2151
2152 statep = STACK_IKS(stack);
2153
2154 /*
2155 * Reset the state of the thread to resume from a continuation,
2156 * including resetting the stack and frame pointer to avoid backtracers
2157 * seeing this temporary state and attempting to walk the defunct stack.
2158 */
2159 statep->k_rbp = (uint64_t) 0;
2160 statep->k_rip = (uint64_t) Thread_continue;
2161 statep->k_rbx = (uint64_t) thread_continue;
2162 statep->k_rsp = (uint64_t) STACK_IKS(stack);
2163
2164 return;
2165 }
2166
2167 /*
2168 * move a stack from old to new thread
2169 */
2170
2171 void
machine_stack_handoff(thread_t old,thread_t new)2172 machine_stack_handoff(thread_t old,
2173 thread_t new)
2174 {
2175 vm_offset_t stack;
2176
2177 assert(new);
2178 assert(old);
2179
2180 #if HYPERVISOR
2181 if (old->hv_thread_target) {
2182 hv_callbacks.preempt(old->hv_thread_target);
2183 }
2184 #endif
2185
2186 kpc_off_cpu(old);
2187
2188 stack = old->kernel_stack;
2189 if (stack == old->reserved_stack) {
2190 assert(new->reserved_stack);
2191 old->reserved_stack = new->reserved_stack;
2192 new->reserved_stack = stack;
2193 }
2194 #if CONFIG_STKSZ
2195 kcov_stksz_set_thread_stack(old, old->kernel_stack);
2196 #endif
2197 old->kernel_stack = 0;
2198 /*
2199 * A full call to machine_stack_attach() is unnecessry
2200 * because old stack is already initialized.
2201 */
2202 new->kernel_stack = stack;
2203 #if CONFIG_STKSZ
2204 kcov_stksz_set_thread_stack(new, 0);
2205 #endif
2206
2207 fpu_switch_context(old, new);
2208
2209 old->machine.specFlags &= ~OnProc;
2210 new->machine.specFlags |= OnProc;
2211
2212 pmap_switch_context(old, new, cpu_number());
2213 act_machine_switch_pcb(old, new);
2214
2215 #if HYPERVISOR
2216 if (new->hv_thread_target) {
2217 hv_callbacks.dispatch(new->hv_thread_target);
2218 }
2219 #endif
2220
2221 machine_set_current_thread(new);
2222 thread_initialize_kernel_state(new);
2223
2224 return;
2225 }
2226
2227
2228
2229
2230 struct x86_act_context32 {
2231 x86_saved_state32_t ss;
2232 x86_float_state32_t fs;
2233 x86_debug_state32_t ds;
2234 };
2235
2236 struct x86_act_context64 {
2237 x86_saved_state64_t ss;
2238 x86_float_state64_t fs;
2239 x86_debug_state64_t ds;
2240 };
2241
2242
2243
2244 void *
act_thread_csave(void)2245 act_thread_csave(void)
2246 {
2247 kern_return_t kret;
2248 mach_msg_type_number_t val;
2249 thread_t thr_act = current_thread();
2250
2251 if (thread_is_64bit_addr(thr_act)) {
2252 struct x86_act_context64 *ic64;
2253
2254 ic64 = kalloc_data(sizeof(struct x86_act_context64), Z_WAITOK);
2255
2256 if (ic64 == (struct x86_act_context64 *)NULL) {
2257 return (void *)0;
2258 }
2259
2260 val = x86_SAVED_STATE64_COUNT;
2261 kret = machine_thread_get_state(thr_act, x86_SAVED_STATE64,
2262 (thread_state_t) &ic64->ss, &val);
2263 if (kret != KERN_SUCCESS) {
2264 kfree_data(ic64, sizeof(struct x86_act_context64));
2265 return (void *)0;
2266 }
2267 val = x86_FLOAT_STATE64_COUNT;
2268 kret = machine_thread_get_state(thr_act, x86_FLOAT_STATE64,
2269 (thread_state_t) &ic64->fs, &val);
2270 if (kret != KERN_SUCCESS) {
2271 kfree_data(ic64, sizeof(struct x86_act_context64));
2272 return (void *)0;
2273 }
2274
2275 val = x86_DEBUG_STATE64_COUNT;
2276 kret = machine_thread_get_state(thr_act,
2277 x86_DEBUG_STATE64,
2278 (thread_state_t)&ic64->ds,
2279 &val);
2280 if (kret != KERN_SUCCESS) {
2281 kfree_data(ic64, sizeof(struct x86_act_context64));
2282 return (void *)0;
2283 }
2284 return ic64;
2285 } else {
2286 struct x86_act_context32 *ic32;
2287
2288 ic32 = kalloc_data(sizeof(struct x86_act_context32), Z_WAITOK);
2289
2290 if (ic32 == (struct x86_act_context32 *)NULL) {
2291 return (void *)0;
2292 }
2293
2294 val = x86_SAVED_STATE32_COUNT;
2295 kret = machine_thread_get_state(thr_act, x86_SAVED_STATE32,
2296 (thread_state_t) &ic32->ss, &val);
2297 if (kret != KERN_SUCCESS) {
2298 kfree_data(ic32, sizeof(struct x86_act_context32));
2299 return (void *)0;
2300 }
2301 val = x86_FLOAT_STATE32_COUNT;
2302 kret = machine_thread_get_state(thr_act, x86_FLOAT_STATE32,
2303 (thread_state_t) &ic32->fs, &val);
2304 if (kret != KERN_SUCCESS) {
2305 kfree_data(ic32, sizeof(struct x86_act_context32));
2306 return (void *)0;
2307 }
2308
2309 val = x86_DEBUG_STATE32_COUNT;
2310 kret = machine_thread_get_state(thr_act,
2311 x86_DEBUG_STATE32,
2312 (thread_state_t)&ic32->ds,
2313 &val);
2314 if (kret != KERN_SUCCESS) {
2315 kfree_data(ic32, sizeof(struct x86_act_context32));
2316 return (void *)0;
2317 }
2318 return ic32;
2319 }
2320 }
2321
2322
2323 void
act_thread_catt(void * ctx)2324 act_thread_catt(void *ctx)
2325 {
2326 thread_t thr_act = current_thread();
2327 kern_return_t kret;
2328
2329 if (ctx == (void *)NULL) {
2330 return;
2331 }
2332
2333 if (thread_is_64bit_addr(thr_act)) {
2334 struct x86_act_context64 *ic64;
2335
2336 ic64 = (struct x86_act_context64 *)ctx;
2337
2338 kret = machine_thread_set_state(thr_act, x86_SAVED_STATE64,
2339 (thread_state_t) &ic64->ss, x86_SAVED_STATE64_COUNT);
2340 if (kret == KERN_SUCCESS) {
2341 machine_thread_set_state(thr_act, x86_FLOAT_STATE64,
2342 (thread_state_t) &ic64->fs, x86_FLOAT_STATE64_COUNT);
2343 }
2344 kfree_data(ic64, sizeof(struct x86_act_context64));
2345 } else {
2346 struct x86_act_context32 *ic32;
2347
2348 ic32 = (struct x86_act_context32 *)ctx;
2349
2350 kret = machine_thread_set_state(thr_act, x86_SAVED_STATE32,
2351 (thread_state_t) &ic32->ss, x86_SAVED_STATE32_COUNT);
2352 if (kret == KERN_SUCCESS) {
2353 (void) machine_thread_set_state(thr_act, x86_FLOAT_STATE32,
2354 (thread_state_t) &ic32->fs, x86_FLOAT_STATE32_COUNT);
2355 }
2356 kfree_data(ic32, sizeof(struct x86_act_context32));
2357 }
2358 }
2359
2360
2361 void
act_thread_cfree(__unused void * ctx)2362 act_thread_cfree(__unused void *ctx)
2363 {
2364 /* XXX - Unused */
2365 }
2366
2367 /*
2368 * Duplicate one x86_debug_state32_t to another. "all" parameter
2369 * chooses whether dr4 and dr5 are copied (they are never meant
2370 * to be installed when we do machine_task_set_state() or
2371 * machine_thread_set_state()).
2372 */
2373 void
copy_debug_state32(x86_debug_state32_t * src,x86_debug_state32_t * target,boolean_t all)2374 copy_debug_state32(
2375 x86_debug_state32_t *src,
2376 x86_debug_state32_t *target,
2377 boolean_t all)
2378 {
2379 if (all) {
2380 target->dr4 = src->dr4;
2381 target->dr5 = src->dr5;
2382 }
2383
2384 target->dr0 = src->dr0;
2385 target->dr1 = src->dr1;
2386 target->dr2 = src->dr2;
2387 target->dr3 = src->dr3;
2388 target->dr6 = src->dr6;
2389 target->dr7 = src->dr7;
2390 }
2391
2392 /*
2393 * Duplicate one x86_debug_state64_t to another. "all" parameter
2394 * chooses whether dr4 and dr5 are copied (they are never meant
2395 * to be installed when we do machine_task_set_state() or
2396 * machine_thread_set_state()).
2397 */
2398 void
copy_debug_state64(x86_debug_state64_t * src,x86_debug_state64_t * target,boolean_t all)2399 copy_debug_state64(
2400 x86_debug_state64_t *src,
2401 x86_debug_state64_t *target,
2402 boolean_t all)
2403 {
2404 if (all) {
2405 target->dr4 = src->dr4;
2406 target->dr5 = src->dr5;
2407 }
2408
2409 target->dr0 = src->dr0;
2410 target->dr1 = src->dr1;
2411 target->dr2 = src->dr2;
2412 target->dr3 = src->dr3;
2413 target->dr6 = src->dr6;
2414 target->dr7 = src->dr7;
2415 }
2416