1 // Copyright (c) 2023 Apple Inc. All rights reserved.
2 //
3 // @APPLE_OSREFERENCE_LICENSE_HEADER_START@
4 //
5 // This file contains Original Code and/or Modifications of Original Code
6 // as defined in and that are subject to the Apple Public Source License
7 // Version 2.0 (the 'License'). You may not use this file except in
8 // compliance with the License. The rights granted to you under the License
9 // may not be used to create, or enable the creation or redistribution of,
10 // unlawful or unlicensed copies of an Apple operating system, or to
11 // circumvent, violate, or enable the circumvention or violation of, any
12 // terms of an Apple operating system software license agreement.
13 //
14 // Please obtain a copy of the License at
15 // http://www.opensource.apple.com/apsl/ and read it before using this file.
16 //
17 // The Original Code and all software distributed under the License are
18 // distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
19 // EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
20 // INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
21 // FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
22 // Please see the License for the specific language governing rights and
23 // limitations under the License.
24 //
25 // @APPLE_OSREFERENCE_LICENSE_HEADER_END@
26
27 #include <arm/cpuid.h>
28 #include <arm64/cpc_arm64.h>
29 #include <kern/assert.h>
30 #include <kern/cpc.h>
31 #include <kern/startup.h>
32 #include <stdint.h>
33 #include <stdbool.h>
34 #include <stddef.h>
35
36 struct cpc_event {
37 const char *cev_name;
38 uint16_t cev_selector;
39 };
40
41 struct cpc_event_list {
42 unsigned int cel_event_count;
43 struct cpc_event cel_events[];
44 };
45 static const struct cpc_event_list _known_cpmu_events;
46
47 static const struct cpc_event_list _no_events = {
48 .cel_event_count = 0,
49 .cel_events = {},
50 };
51
52 const struct cpc_event_list * const _cpc_known_events[CPC_HW_COUNT] = {
53 [CPC_HW_CPMU] = &_known_cpmu_events,
54 [CPC_HW_UPMU] = &_no_events,
55 };
56
57 static const struct cpc_event *
_cpc_select_event(cpc_hw_t hw,uint16_t selector)58 _cpc_select_event(cpc_hw_t hw, uint16_t selector)
59 {
60 assert(hw < CPC_HW_COUNT);
61 const struct cpc_event_list *list = _cpc_known_events[hw];
62 for (unsigned int i = 0; i < list->cel_event_count; i++) {
63 if (list->cel_events[i].cev_selector == selector) {
64 return &list->cel_events[i];
65 }
66 }
67 return NULL;
68 }
69
70 static
71 #if !CPC_INSECURE
72 const
73 #endif // !CPC_INSECURE
74 cpc_event_policy_t _cpc_event_policy = CPC_EVPOL_DEFAULT;
75
76 cpc_event_policy_t
cpc_get_event_policy(void)77 cpc_get_event_policy(void)
78 {
79 return _cpc_event_policy;
80 }
81
82 #if CPC_INSECURE
83
84 void
cpc_set_event_policy(cpc_event_policy_t new_policy)85 cpc_set_event_policy(cpc_event_policy_t new_policy)
86 {
87 _cpc_event_policy = new_policy;
88 }
89
90 #endif // CPC_INSECURE
91
92 bool
cpc_event_allowed(cpc_hw_t hw,uint16_t event_selector)93 cpc_event_allowed(
94 cpc_hw_t hw,
95 uint16_t event_selector)
96 {
97 if (event_selector == 0) {
98 return true;
99 }
100 switch (_cpc_event_policy) {
101 #if CPC_INSECURE
102 case CPC_EVPOL_ALLOW_ALL:
103 return true;
104 #endif // CPC_INSECURE
105 case CPC_EVPOL_DENY_ALL:
106 return false;
107 case CPC_EVPOL_RESTRICT_TO_KNOWN:
108 return _cpc_select_event(hw, event_selector) != NULL;
109 }
110 return false;
111 }
112
113
114 static const struct cpc_event_list _known_cpmu_events = {
115 #if defined(ARM64_BOARD_CONFIG_T6000)
116 .cel_event_count = 59,
117 .cel_events = {
118 { .cev_selector = 0x0000, .cev_name = "NONE" },
119 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
120 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
121 { .cev_selector = 0x0004, .cev_name = "L1I_TLB_FILL" },
122 { .cev_selector = 0x0005, .cev_name = "L1D_TLB_FILL" },
123 { .cev_selector = 0x0007, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
124 { .cev_selector = 0x0008, .cev_name = "MMU_TABLE_WALK_DATA" },
125 { .cev_selector = 0x000a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
126 { .cev_selector = 0x000b, .cev_name = "L2_TLB_MISS_DATA" },
127 { .cev_selector = 0x0051, .cev_name = "SCHEDULE_EMPTY" },
128 { .cev_selector = 0x0052, .cev_name = "SCHEDULE_UOP" },
129 { .cev_selector = 0x006c, .cev_name = "INTERRUPT_PENDING" },
130 { .cev_selector = 0x0070, .cev_name = "MAP_STALL_DISPATCH" },
131 { .cev_selector = 0x0075, .cev_name = "MAP_REWIND" },
132 { .cev_selector = 0x0076, .cev_name = "MAP_STALL" },
133 { .cev_selector = 0x007c, .cev_name = "MAP_INT_UOP" },
134 { .cev_selector = 0x007d, .cev_name = "MAP_LDST_UOP" },
135 { .cev_selector = 0x007e, .cev_name = "MAP_SIMD_UOP" },
136 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
137 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
138 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
139 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
140 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
141 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
142 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
143 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
144 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
145 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
146 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
147 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
148 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
149 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
150 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
151 { .cev_selector = 0x00a0, .cev_name = "L1D_TLB_ACCESS" },
152 { .cev_selector = 0x00a1, .cev_name = "L1D_TLB_MISS" },
153 { .cev_selector = 0x00a2, .cev_name = "L1D_CACHE_MISS_ST" },
154 { .cev_selector = 0x00a3, .cev_name = "L1D_CACHE_MISS_LD" },
155 { .cev_selector = 0x00a6, .cev_name = "LD_UNIT_UOP" },
156 { .cev_selector = 0x00a7, .cev_name = "ST_UNIT_UOP" },
157 { .cev_selector = 0x00a8, .cev_name = "L1D_CACHE_WRITEBACK" },
158 { .cev_selector = 0x00b1, .cev_name = "LDST_X64_UOP" },
159 { .cev_selector = 0x00b2, .cev_name = "LDST_XPG_UOP" },
160 { .cev_selector = 0x00b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
161 { .cev_selector = 0x00b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
162 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
163 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
164 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
165 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
166 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
167 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
168 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
169 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
170 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
171 { .cev_selector = 0x00d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
172 { .cev_selector = 0x00d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
173 { .cev_selector = 0x00db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
174 { .cev_selector = 0x00de, .cev_name = "FETCH_RESTART" },
175 { .cev_selector = 0x00e5, .cev_name = "ST_NT_UOP" },
176 { .cev_selector = 0x00e6, .cev_name = "LD_NT_UOP" },
177 },
178 #elif defined(ARM64_BOARD_CONFIG_T6020)
179 .cel_event_count = 59,
180 .cel_events = {
181 { .cev_selector = 0x0000, .cev_name = "NONE" },
182 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
183 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
184 { .cev_selector = 0x0004, .cev_name = "L1I_TLB_FILL" },
185 { .cev_selector = 0x0005, .cev_name = "L1D_TLB_FILL" },
186 { .cev_selector = 0x0007, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
187 { .cev_selector = 0x0008, .cev_name = "MMU_TABLE_WALK_DATA" },
188 { .cev_selector = 0x000a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
189 { .cev_selector = 0x000b, .cev_name = "L2_TLB_MISS_DATA" },
190 { .cev_selector = 0x0051, .cev_name = "SCHEDULE_EMPTY" },
191 { .cev_selector = 0x006c, .cev_name = "INTERRUPT_PENDING" },
192 { .cev_selector = 0x0070, .cev_name = "MAP_STALL_DISPATCH" },
193 { .cev_selector = 0x0075, .cev_name = "MAP_REWIND" },
194 { .cev_selector = 0x0076, .cev_name = "MAP_STALL" },
195 { .cev_selector = 0x007c, .cev_name = "MAP_INT_UOP" },
196 { .cev_selector = 0x007d, .cev_name = "MAP_LDST_UOP" },
197 { .cev_selector = 0x007e, .cev_name = "MAP_SIMD_UOP" },
198 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
199 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
200 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
201 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
202 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
203 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
204 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
205 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
206 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
207 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
208 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
209 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
210 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
211 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
212 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
213 { .cev_selector = 0x009f, .cev_name = "INST_SIMD_ALU_VEC" },
214 { .cev_selector = 0x00a0, .cev_name = "L1D_TLB_ACCESS" },
215 { .cev_selector = 0x00a1, .cev_name = "L1D_TLB_MISS" },
216 { .cev_selector = 0x00a2, .cev_name = "L1D_CACHE_MISS_ST" },
217 { .cev_selector = 0x00a3, .cev_name = "L1D_CACHE_MISS_LD" },
218 { .cev_selector = 0x00a6, .cev_name = "LD_UNIT_UOP" },
219 { .cev_selector = 0x00a7, .cev_name = "ST_UNIT_UOP" },
220 { .cev_selector = 0x00a8, .cev_name = "L1D_CACHE_WRITEBACK" },
221 { .cev_selector = 0x00b1, .cev_name = "LDST_X64_UOP" },
222 { .cev_selector = 0x00b2, .cev_name = "LDST_XPG_UOP" },
223 { .cev_selector = 0x00b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
224 { .cev_selector = 0x00b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
225 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
226 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
227 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
228 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
229 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
230 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
231 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
232 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
233 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
234 { .cev_selector = 0x00d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
235 { .cev_selector = 0x00d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
236 { .cev_selector = 0x00db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
237 { .cev_selector = 0x00de, .cev_name = "FETCH_RESTART" },
238 { .cev_selector = 0x00e5, .cev_name = "ST_NT_UOP" },
239 { .cev_selector = 0x00e6, .cev_name = "LD_NT_UOP" },
240 },
241 #elif defined(ARM64_BOARD_CONFIG_T6030)
242 .cel_event_count = 65,
243 .cel_events = {
244 { .cev_selector = 0x0000, .cev_name = "NONE" },
245 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
246 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
247 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
248 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
249 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
250 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
251 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
252 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
253 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
254 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
255 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
256 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
257 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
258 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
259 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
260 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
261 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
262 { .cev_selector = 0x009f, .cev_name = "INST_SIMD_ALU_VEC" },
263 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
264 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
265 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
266 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
267 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
268 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
269 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
270 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
271 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
272 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
273 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
274 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
275 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
276 { .cev_selector = 0x01db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
277 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
278 { .cev_selector = 0x0269, .cev_name = "MAP_UOP" },
279 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
280 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
281 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
282 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
283 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
284 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
285 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
286 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
287 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
288 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
289 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
290 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
291 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
292 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
293 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
294 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
295 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
296 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
297 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
298 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
299 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
300 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
301 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
302 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
303 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
304 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
305 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
306 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
307 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
308 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
309 },
310 #elif defined(ARM64_BOARD_CONFIG_T6031)
311 .cel_event_count = 65,
312 .cel_events = {
313 { .cev_selector = 0x0000, .cev_name = "NONE" },
314 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
315 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
316 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
317 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
318 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
319 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
320 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
321 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
322 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
323 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
324 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
325 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
326 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
327 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
328 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
329 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
330 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
331 { .cev_selector = 0x009f, .cev_name = "INST_SIMD_ALU_VEC" },
332 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
333 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
334 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
335 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
336 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
337 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
338 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
339 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
340 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
341 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
342 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
343 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
344 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
345 { .cev_selector = 0x01db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
346 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
347 { .cev_selector = 0x0269, .cev_name = "MAP_UOP" },
348 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
349 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
350 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
351 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
352 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
353 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
354 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
355 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
356 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
357 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
358 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
359 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
360 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
361 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
362 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
363 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
364 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
365 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
366 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
367 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
368 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
369 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
370 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
371 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
372 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
373 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
374 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
375 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
376 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
377 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
378 },
379 #elif defined(ARM64_BOARD_CONFIG_T6041)
380 .cel_event_count = 102,
381 .cel_events = {
382 { .cev_selector = 0x0000, .cev_name = "NONE" },
383 { .cev_selector = 0x0003, .cev_name = "ARM_L1D_CACHE_REFILL" },
384 { .cev_selector = 0x0004, .cev_name = "ARM_L1D_CACHE" },
385 { .cev_selector = 0x0008, .cev_name = "INST_ALL" },
386 { .cev_selector = 0x0010, .cev_name = "ARM_BR_MIS_PRED" },
387 { .cev_selector = 0x0011, .cev_name = "CORE_ACTIVE_CYCLE" },
388 { .cev_selector = 0x0012, .cev_name = "ARM_BR_PRED" },
389 { .cev_selector = 0x0021, .cev_name = "INST_BRANCH" },
390 { .cev_selector = 0x0022, .cev_name = "BRANCH_MISPRED_NONSPEC" },
391 { .cev_selector = 0x0023, .cev_name = "ARM_STALL_FRONTEND" },
392 { .cev_selector = 0x0024, .cev_name = "ARM_STALL_BACKEND" },
393 { .cev_selector = 0x0039, .cev_name = "ARM_L1D_CACHE_LMISS_RD" },
394 { .cev_selector = 0x003a, .cev_name = "RETIRE_UOP" },
395 { .cev_selector = 0x003b, .cev_name = "MAP_UOP" },
396 { .cev_selector = 0x003c, .cev_name = "ARM_STALL" },
397 { .cev_selector = 0x003d, .cev_name = "ARM_STALL_SLOT_BACKEND" },
398 { .cev_selector = 0x003e, .cev_name = "ARM_STALL_SLOT_FRONTEND" },
399 { .cev_selector = 0x003f, .cev_name = "ARM_STALL_SLOT" },
400 { .cev_selector = 0x0040, .cev_name = "ARM_L1D_CACHE_RD" },
401 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
402 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
403 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
404 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
405 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
406 { .cev_selector = 0x01e1, .cev_name = "MAP_DISPATCH_BUBBLE_SLOT" },
407 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
408 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
409 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
410 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
411 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
412 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
413 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
414 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
415 { .cev_selector = 0x0285, .cev_name = "MAP_INT_SME_UOP" },
416 { .cev_selector = 0x0286, .cev_name = "SME_ENGINE_SM_ENABLE" },
417 { .cev_selector = 0x0287, .cev_name = "SME_ENGINE_SM_ZA_ENABLE" },
418 { .cev_selector = 0x0288, .cev_name = "SME_ENGINE_ZA_ENABLED_SM_DISABLED" },
419 { .cev_selector = 0x028c, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_INST_QUEUE_FULL" },
420 { .cev_selector = 0x028e, .cev_name = "SCHEDULE_WAITING_SME_ENGINE_REG_DATA" },
421 { .cev_selector = 0x028f, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_MEM_DATA" },
422 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
423 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
424 { .cev_selector = 0x0294, .cev_name = "LD_UNIT_WAITING_YOUNG_L1D_CACHE_MISS" },
425 { .cev_selector = 0x02ad, .cev_name = "MAP_RECOVERY" },
426 { .cev_selector = 0x02ae, .cev_name = "MAP_STALL_NONRECOVERY" },
427 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
428 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
429 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
430 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
431 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
432 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
433 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
434 { .cev_selector = 0x0508, .cev_name = "LDST_SME_XPG_UOP" },
435 { .cev_selector = 0x0529, .cev_name = "INST_SME_ENGINE_PACKING_FUSED" },
436 { .cev_selector = 0x052c, .cev_name = "LD_BLOCKED_BY_SME_LDST" },
437 { .cev_selector = 0x052e, .cev_name = "ST_BARRIER_BLOCKED_BY_SME_LDST" },
438 { .cev_selector = 0x0573, .cev_name = "LD_SME_NT_UOP" },
439 { .cev_selector = 0x0574, .cev_name = "ST_SME_NT_UOP" },
440 { .cev_selector = 0x0575, .cev_name = "LD_SME_NORMAL_UOP" },
441 { .cev_selector = 0x0576, .cev_name = "ST_SME_NORMAL_UOP" },
442 { .cev_selector = 0x0577, .cev_name = "LDST_SME_PRED_INACTIVE" },
443 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
444 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
445 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
446 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
447 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
448 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
449 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
450 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
451 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
452 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
453 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
454 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
455 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
456 { .cev_selector = 0x0884, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
457 { .cev_selector = 0x088e, .cev_name = "INST_BRANCH_CALL" },
458 { .cev_selector = 0x088f, .cev_name = "INST_BRANCH_RET" },
459 { .cev_selector = 0x0890, .cev_name = "INST_BRANCH_TAKEN" },
460 { .cev_selector = 0x0893, .cev_name = "INST_BRANCH_INDIR" },
461 { .cev_selector = 0x0894, .cev_name = "INST_BRANCH_COND" },
462 { .cev_selector = 0x0895, .cev_name = "INST_INT_LD" },
463 { .cev_selector = 0x0896, .cev_name = "INST_INT_ST" },
464 { .cev_selector = 0x0897, .cev_name = "INST_INT_ALU" },
465 { .cev_selector = 0x0898, .cev_name = "INST_SIMD_LD" },
466 { .cev_selector = 0x0899, .cev_name = "INST_SIMD_ST" },
467 { .cev_selector = 0x089a, .cev_name = "INST_SIMD_ALU" },
468 { .cev_selector = 0x089b, .cev_name = "INST_LDST" },
469 { .cev_selector = 0x089c, .cev_name = "INST_BARRIER" },
470 { .cev_selector = 0x089f, .cev_name = "INST_SIMD_ALU_VEC" },
471 { .cev_selector = 0x08a0, .cev_name = "INST_SME_ENGINE_SCALARFP" },
472 { .cev_selector = 0x08a1, .cev_name = "INST_SME_ENGINE_LD" },
473 { .cev_selector = 0x08a2, .cev_name = "INST_SME_ENGINE_ST" },
474 { .cev_selector = 0x08a3, .cev_name = "INST_SME_ENGINE_ALU" },
475 { .cev_selector = 0x08bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
476 { .cev_selector = 0x08c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
477 { .cev_selector = 0x08c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
478 { .cev_selector = 0x08c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
479 { .cev_selector = 0x08c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
480 { .cev_selector = 0x08c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
481 { .cev_selector = 0x08c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
482 { .cev_selector = 0x08ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
483 { .cev_selector = 0x4006, .cev_name = "L1I_CACHE_MISS_DEMAND" },
484 },
485 #elif defined(ARM64_BOARD_CONFIG_T8101)
486 .cel_event_count = 59,
487 .cel_events = {
488 { .cev_selector = 0x0000, .cev_name = "NONE" },
489 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
490 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
491 { .cev_selector = 0x0004, .cev_name = "L1I_TLB_FILL" },
492 { .cev_selector = 0x0005, .cev_name = "L1D_TLB_FILL" },
493 { .cev_selector = 0x0007, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
494 { .cev_selector = 0x0008, .cev_name = "MMU_TABLE_WALK_DATA" },
495 { .cev_selector = 0x000a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
496 { .cev_selector = 0x000b, .cev_name = "L2_TLB_MISS_DATA" },
497 { .cev_selector = 0x0051, .cev_name = "SCHEDULE_EMPTY" },
498 { .cev_selector = 0x0052, .cev_name = "SCHEDULE_UOP" },
499 { .cev_selector = 0x006c, .cev_name = "INTERRUPT_PENDING" },
500 { .cev_selector = 0x0070, .cev_name = "MAP_STALL_DISPATCH" },
501 { .cev_selector = 0x0075, .cev_name = "MAP_REWIND" },
502 { .cev_selector = 0x0076, .cev_name = "MAP_STALL" },
503 { .cev_selector = 0x007c, .cev_name = "MAP_INT_UOP" },
504 { .cev_selector = 0x007d, .cev_name = "MAP_LDST_UOP" },
505 { .cev_selector = 0x007e, .cev_name = "MAP_SIMD_UOP" },
506 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
507 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
508 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
509 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
510 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
511 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
512 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
513 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
514 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
515 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
516 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
517 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
518 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
519 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
520 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
521 { .cev_selector = 0x00a0, .cev_name = "L1D_TLB_ACCESS" },
522 { .cev_selector = 0x00a1, .cev_name = "L1D_TLB_MISS" },
523 { .cev_selector = 0x00a2, .cev_name = "L1D_CACHE_MISS_ST" },
524 { .cev_selector = 0x00a3, .cev_name = "L1D_CACHE_MISS_LD" },
525 { .cev_selector = 0x00a6, .cev_name = "LD_UNIT_UOP" },
526 { .cev_selector = 0x00a7, .cev_name = "ST_UNIT_UOP" },
527 { .cev_selector = 0x00a8, .cev_name = "L1D_CACHE_WRITEBACK" },
528 { .cev_selector = 0x00b1, .cev_name = "LDST_X64_UOP" },
529 { .cev_selector = 0x00b2, .cev_name = "LDST_XPG_UOP" },
530 { .cev_selector = 0x00b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
531 { .cev_selector = 0x00b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
532 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
533 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
534 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
535 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
536 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
537 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
538 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
539 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
540 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
541 { .cev_selector = 0x00d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
542 { .cev_selector = 0x00d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
543 { .cev_selector = 0x00db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
544 { .cev_selector = 0x00de, .cev_name = "FETCH_RESTART" },
545 { .cev_selector = 0x00e5, .cev_name = "ST_NT_UOP" },
546 { .cev_selector = 0x00e6, .cev_name = "LD_NT_UOP" },
547 },
548 #elif defined(ARM64_BOARD_CONFIG_T8103)
549 .cel_event_count = 59,
550 .cel_events = {
551 { .cev_selector = 0x0000, .cev_name = "NONE" },
552 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
553 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
554 { .cev_selector = 0x0004, .cev_name = "L1I_TLB_FILL" },
555 { .cev_selector = 0x0005, .cev_name = "L1D_TLB_FILL" },
556 { .cev_selector = 0x0007, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
557 { .cev_selector = 0x0008, .cev_name = "MMU_TABLE_WALK_DATA" },
558 { .cev_selector = 0x000a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
559 { .cev_selector = 0x000b, .cev_name = "L2_TLB_MISS_DATA" },
560 { .cev_selector = 0x0051, .cev_name = "SCHEDULE_EMPTY" },
561 { .cev_selector = 0x0052, .cev_name = "SCHEDULE_UOP" },
562 { .cev_selector = 0x006c, .cev_name = "INTERRUPT_PENDING" },
563 { .cev_selector = 0x0070, .cev_name = "MAP_STALL_DISPATCH" },
564 { .cev_selector = 0x0075, .cev_name = "MAP_REWIND" },
565 { .cev_selector = 0x0076, .cev_name = "MAP_STALL" },
566 { .cev_selector = 0x007c, .cev_name = "MAP_INT_UOP" },
567 { .cev_selector = 0x007d, .cev_name = "MAP_LDST_UOP" },
568 { .cev_selector = 0x007e, .cev_name = "MAP_SIMD_UOP" },
569 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
570 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
571 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
572 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
573 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
574 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
575 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
576 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
577 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
578 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
579 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
580 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
581 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
582 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
583 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
584 { .cev_selector = 0x00a0, .cev_name = "L1D_TLB_ACCESS" },
585 { .cev_selector = 0x00a1, .cev_name = "L1D_TLB_MISS" },
586 { .cev_selector = 0x00a2, .cev_name = "L1D_CACHE_MISS_ST" },
587 { .cev_selector = 0x00a3, .cev_name = "L1D_CACHE_MISS_LD" },
588 { .cev_selector = 0x00a6, .cev_name = "LD_UNIT_UOP" },
589 { .cev_selector = 0x00a7, .cev_name = "ST_UNIT_UOP" },
590 { .cev_selector = 0x00a8, .cev_name = "L1D_CACHE_WRITEBACK" },
591 { .cev_selector = 0x00b1, .cev_name = "LDST_X64_UOP" },
592 { .cev_selector = 0x00b2, .cev_name = "LDST_XPG_UOP" },
593 { .cev_selector = 0x00b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
594 { .cev_selector = 0x00b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
595 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
596 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
597 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
598 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
599 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
600 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
601 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
602 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
603 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
604 { .cev_selector = 0x00d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
605 { .cev_selector = 0x00d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
606 { .cev_selector = 0x00db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
607 { .cev_selector = 0x00de, .cev_name = "FETCH_RESTART" },
608 { .cev_selector = 0x00e5, .cev_name = "ST_NT_UOP" },
609 { .cev_selector = 0x00e6, .cev_name = "LD_NT_UOP" },
610 },
611 #elif defined(ARM64_BOARD_CONFIG_T8112)
612 .cel_event_count = 59,
613 .cel_events = {
614 { .cev_selector = 0x0000, .cev_name = "NONE" },
615 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
616 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
617 { .cev_selector = 0x0004, .cev_name = "L1I_TLB_FILL" },
618 { .cev_selector = 0x0005, .cev_name = "L1D_TLB_FILL" },
619 { .cev_selector = 0x0007, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
620 { .cev_selector = 0x0008, .cev_name = "MMU_TABLE_WALK_DATA" },
621 { .cev_selector = 0x000a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
622 { .cev_selector = 0x000b, .cev_name = "L2_TLB_MISS_DATA" },
623 { .cev_selector = 0x0051, .cev_name = "SCHEDULE_EMPTY" },
624 { .cev_selector = 0x006c, .cev_name = "INTERRUPT_PENDING" },
625 { .cev_selector = 0x0070, .cev_name = "MAP_STALL_DISPATCH" },
626 { .cev_selector = 0x0075, .cev_name = "MAP_REWIND" },
627 { .cev_selector = 0x0076, .cev_name = "MAP_STALL" },
628 { .cev_selector = 0x007c, .cev_name = "MAP_INT_UOP" },
629 { .cev_selector = 0x007d, .cev_name = "MAP_LDST_UOP" },
630 { .cev_selector = 0x007e, .cev_name = "MAP_SIMD_UOP" },
631 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
632 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
633 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
634 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
635 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
636 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
637 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
638 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
639 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
640 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
641 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
642 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
643 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
644 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
645 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
646 { .cev_selector = 0x009f, .cev_name = "INST_SIMD_ALU_VEC" },
647 { .cev_selector = 0x00a0, .cev_name = "L1D_TLB_ACCESS" },
648 { .cev_selector = 0x00a1, .cev_name = "L1D_TLB_MISS" },
649 { .cev_selector = 0x00a2, .cev_name = "L1D_CACHE_MISS_ST" },
650 { .cev_selector = 0x00a3, .cev_name = "L1D_CACHE_MISS_LD" },
651 { .cev_selector = 0x00a6, .cev_name = "LD_UNIT_UOP" },
652 { .cev_selector = 0x00a7, .cev_name = "ST_UNIT_UOP" },
653 { .cev_selector = 0x00a8, .cev_name = "L1D_CACHE_WRITEBACK" },
654 { .cev_selector = 0x00b1, .cev_name = "LDST_X64_UOP" },
655 { .cev_selector = 0x00b2, .cev_name = "LDST_XPG_UOP" },
656 { .cev_selector = 0x00b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
657 { .cev_selector = 0x00b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
658 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
659 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
660 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
661 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
662 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
663 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
664 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
665 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
666 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
667 { .cev_selector = 0x00d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
668 { .cev_selector = 0x00d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
669 { .cev_selector = 0x00db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
670 { .cev_selector = 0x00de, .cev_name = "FETCH_RESTART" },
671 { .cev_selector = 0x00e5, .cev_name = "ST_NT_UOP" },
672 { .cev_selector = 0x00e6, .cev_name = "LD_NT_UOP" },
673 },
674 #elif defined(ARM64_BOARD_CONFIG_T8122_T8130)
675 .cel_event_count = 65,
676 .cel_events = {
677 { .cev_selector = 0x0000, .cev_name = "NONE" },
678 { .cev_selector = 0x0001, .cev_name = "RETIRE_UOP" },
679 { .cev_selector = 0x0002, .cev_name = "CORE_ACTIVE_CYCLE" },
680 { .cev_selector = 0x0084, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
681 { .cev_selector = 0x008c, .cev_name = "INST_ALL" },
682 { .cev_selector = 0x008d, .cev_name = "INST_BRANCH" },
683 { .cev_selector = 0x008e, .cev_name = "INST_BRANCH_CALL" },
684 { .cev_selector = 0x008f, .cev_name = "INST_BRANCH_RET" },
685 { .cev_selector = 0x0090, .cev_name = "INST_BRANCH_TAKEN" },
686 { .cev_selector = 0x0093, .cev_name = "INST_BRANCH_INDIR" },
687 { .cev_selector = 0x0095, .cev_name = "INST_INT_LD" },
688 { .cev_selector = 0x0096, .cev_name = "INST_INT_ST" },
689 { .cev_selector = 0x0097, .cev_name = "INST_INT_ALU" },
690 { .cev_selector = 0x0098, .cev_name = "INST_SIMD_LD" },
691 { .cev_selector = 0x0099, .cev_name = "INST_SIMD_ST" },
692 { .cev_selector = 0x009a, .cev_name = "INST_SIMD_ALU" },
693 { .cev_selector = 0x009b, .cev_name = "INST_LDST" },
694 { .cev_selector = 0x009c, .cev_name = "INST_BARRIER" },
695 { .cev_selector = 0x009f, .cev_name = "INST_SIMD_ALU_VEC" },
696 { .cev_selector = 0x00bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
697 { .cev_selector = 0x00c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
698 { .cev_selector = 0x00c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
699 { .cev_selector = 0x00c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
700 { .cev_selector = 0x00c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
701 { .cev_selector = 0x00c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
702 { .cev_selector = 0x00c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
703 { .cev_selector = 0x00ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
704 { .cev_selector = 0x00cb, .cev_name = "BRANCH_MISPRED_NONSPEC" },
705 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
706 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
707 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
708 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
709 { .cev_selector = 0x01db, .cev_name = "L1I_CACHE_MISS_DEMAND" },
710 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
711 { .cev_selector = 0x0269, .cev_name = "MAP_UOP" },
712 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
713 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
714 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
715 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
716 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
717 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
718 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
719 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
720 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
721 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
722 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
723 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
724 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
725 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
726 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
727 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
728 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
729 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
730 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
731 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
732 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
733 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
734 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
735 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
736 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
737 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
738 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
739 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
740 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
741 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
742 },
743 #elif defined(ARM64_BOARD_CONFIG_T8132)
744 .cel_event_count = 102,
745 .cel_events = {
746 { .cev_selector = 0x0000, .cev_name = "NONE" },
747 { .cev_selector = 0x0003, .cev_name = "ARM_L1D_CACHE_REFILL" },
748 { .cev_selector = 0x0004, .cev_name = "ARM_L1D_CACHE" },
749 { .cev_selector = 0x0008, .cev_name = "INST_ALL" },
750 { .cev_selector = 0x0010, .cev_name = "ARM_BR_MIS_PRED" },
751 { .cev_selector = 0x0011, .cev_name = "CORE_ACTIVE_CYCLE" },
752 { .cev_selector = 0x0012, .cev_name = "ARM_BR_PRED" },
753 { .cev_selector = 0x0021, .cev_name = "INST_BRANCH" },
754 { .cev_selector = 0x0022, .cev_name = "BRANCH_MISPRED_NONSPEC" },
755 { .cev_selector = 0x0023, .cev_name = "ARM_STALL_FRONTEND" },
756 { .cev_selector = 0x0024, .cev_name = "ARM_STALL_BACKEND" },
757 { .cev_selector = 0x0039, .cev_name = "ARM_L1D_CACHE_LMISS_RD" },
758 { .cev_selector = 0x003a, .cev_name = "RETIRE_UOP" },
759 { .cev_selector = 0x003b, .cev_name = "MAP_UOP" },
760 { .cev_selector = 0x003c, .cev_name = "ARM_STALL" },
761 { .cev_selector = 0x003d, .cev_name = "ARM_STALL_SLOT_BACKEND" },
762 { .cev_selector = 0x003e, .cev_name = "ARM_STALL_SLOT_FRONTEND" },
763 { .cev_selector = 0x003f, .cev_name = "ARM_STALL_SLOT" },
764 { .cev_selector = 0x0040, .cev_name = "ARM_L1D_CACHE_RD" },
765 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
766 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
767 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
768 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
769 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
770 { .cev_selector = 0x01e1, .cev_name = "MAP_DISPATCH_BUBBLE_SLOT" },
771 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
772 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
773 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
774 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
775 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
776 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
777 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
778 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
779 { .cev_selector = 0x0285, .cev_name = "MAP_INT_SME_UOP" },
780 { .cev_selector = 0x0286, .cev_name = "SME_ENGINE_SM_ENABLE" },
781 { .cev_selector = 0x0287, .cev_name = "SME_ENGINE_SM_ZA_ENABLE" },
782 { .cev_selector = 0x0288, .cev_name = "SME_ENGINE_ZA_ENABLED_SM_DISABLED" },
783 { .cev_selector = 0x028c, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_INST_QUEUE_FULL" },
784 { .cev_selector = 0x028e, .cev_name = "SCHEDULE_WAITING_SME_ENGINE_REG_DATA" },
785 { .cev_selector = 0x028f, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_MEM_DATA" },
786 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
787 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
788 { .cev_selector = 0x0294, .cev_name = "LD_UNIT_WAITING_YOUNG_L1D_CACHE_MISS" },
789 { .cev_selector = 0x02ad, .cev_name = "MAP_RECOVERY" },
790 { .cev_selector = 0x02ae, .cev_name = "MAP_STALL_NONRECOVERY" },
791 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
792 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
793 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
794 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
795 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
796 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
797 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
798 { .cev_selector = 0x0508, .cev_name = "LDST_SME_XPG_UOP" },
799 { .cev_selector = 0x0529, .cev_name = "INST_SME_ENGINE_PACKING_FUSED" },
800 { .cev_selector = 0x052c, .cev_name = "LD_BLOCKED_BY_SME_LDST" },
801 { .cev_selector = 0x052e, .cev_name = "ST_BARRIER_BLOCKED_BY_SME_LDST" },
802 { .cev_selector = 0x0573, .cev_name = "LD_SME_NT_UOP" },
803 { .cev_selector = 0x0574, .cev_name = "ST_SME_NT_UOP" },
804 { .cev_selector = 0x0575, .cev_name = "LD_SME_NORMAL_UOP" },
805 { .cev_selector = 0x0576, .cev_name = "ST_SME_NORMAL_UOP" },
806 { .cev_selector = 0x0577, .cev_name = "LDST_SME_PRED_INACTIVE" },
807 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
808 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
809 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
810 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
811 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
812 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
813 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
814 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
815 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
816 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
817 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
818 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
819 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
820 { .cev_selector = 0x0884, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
821 { .cev_selector = 0x088e, .cev_name = "INST_BRANCH_CALL" },
822 { .cev_selector = 0x088f, .cev_name = "INST_BRANCH_RET" },
823 { .cev_selector = 0x0890, .cev_name = "INST_BRANCH_TAKEN" },
824 { .cev_selector = 0x0893, .cev_name = "INST_BRANCH_INDIR" },
825 { .cev_selector = 0x0894, .cev_name = "INST_BRANCH_COND" },
826 { .cev_selector = 0x0895, .cev_name = "INST_INT_LD" },
827 { .cev_selector = 0x0896, .cev_name = "INST_INT_ST" },
828 { .cev_selector = 0x0897, .cev_name = "INST_INT_ALU" },
829 { .cev_selector = 0x0898, .cev_name = "INST_SIMD_LD" },
830 { .cev_selector = 0x0899, .cev_name = "INST_SIMD_ST" },
831 { .cev_selector = 0x089a, .cev_name = "INST_SIMD_ALU" },
832 { .cev_selector = 0x089b, .cev_name = "INST_LDST" },
833 { .cev_selector = 0x089c, .cev_name = "INST_BARRIER" },
834 { .cev_selector = 0x089f, .cev_name = "INST_SIMD_ALU_VEC" },
835 { .cev_selector = 0x08a0, .cev_name = "INST_SME_ENGINE_SCALARFP" },
836 { .cev_selector = 0x08a1, .cev_name = "INST_SME_ENGINE_LD" },
837 { .cev_selector = 0x08a2, .cev_name = "INST_SME_ENGINE_ST" },
838 { .cev_selector = 0x08a3, .cev_name = "INST_SME_ENGINE_ALU" },
839 { .cev_selector = 0x08bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
840 { .cev_selector = 0x08c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
841 { .cev_selector = 0x08c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
842 { .cev_selector = 0x08c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
843 { .cev_selector = 0x08c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
844 { .cev_selector = 0x08c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
845 { .cev_selector = 0x08c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
846 { .cev_selector = 0x08ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
847 { .cev_selector = 0x4006, .cev_name = "L1I_CACHE_MISS_DEMAND" },
848 },
849 #elif defined(ARM64_BOARD_CONFIG_T8142)
850 .cel_event_count = 102,
851 .cel_events = {
852 { .cev_selector = 0x0000, .cev_name = "NONE" },
853 { .cev_selector = 0x0003, .cev_name = "ARM_L1D_CACHE_REFILL" },
854 { .cev_selector = 0x0004, .cev_name = "ARM_L1D_CACHE" },
855 { .cev_selector = 0x0008, .cev_name = "INST_ALL" },
856 { .cev_selector = 0x0010, .cev_name = "ARM_BR_MIS_PRED" },
857 { .cev_selector = 0x0011, .cev_name = "CORE_ACTIVE_CYCLE" },
858 { .cev_selector = 0x0012, .cev_name = "ARM_BR_PRED" },
859 { .cev_selector = 0x0021, .cev_name = "INST_BRANCH" },
860 { .cev_selector = 0x0022, .cev_name = "BRANCH_MISPRED_NONSPEC" },
861 { .cev_selector = 0x0023, .cev_name = "ARM_STALL_FRONTEND" },
862 { .cev_selector = 0x0024, .cev_name = "ARM_STALL_BACKEND" },
863 { .cev_selector = 0x0039, .cev_name = "ARM_L1D_CACHE_LMISS_RD" },
864 { .cev_selector = 0x003a, .cev_name = "RETIRE_UOP" },
865 { .cev_selector = 0x003b, .cev_name = "MAP_UOP" },
866 { .cev_selector = 0x003c, .cev_name = "ARM_STALL" },
867 { .cev_selector = 0x003d, .cev_name = "ARM_STALL_SLOT_BACKEND" },
868 { .cev_selector = 0x003e, .cev_name = "ARM_STALL_SLOT_FRONTEND" },
869 { .cev_selector = 0x003f, .cev_name = "ARM_STALL_SLOT" },
870 { .cev_selector = 0x0040, .cev_name = "ARM_L1D_CACHE_RD" },
871 { .cev_selector = 0x0182, .cev_name = "MAP_DISPATCH_BUBBLE_IC" },
872 { .cev_selector = 0x0183, .cev_name = "MAP_DISPATCH_BUBBLE_ITLB" },
873 { .cev_selector = 0x01d4, .cev_name = "L1I_TLB_MISS_DEMAND" },
874 { .cev_selector = 0x01d6, .cev_name = "MAP_DISPATCH_BUBBLE" },
875 { .cev_selector = 0x01de, .cev_name = "FETCH_RESTART" },
876 { .cev_selector = 0x01e1, .cev_name = "MAP_DISPATCH_BUBBLE_SLOT" },
877 { .cev_selector = 0x026c, .cev_name = "INTERRUPT_PENDING" },
878 { .cev_selector = 0x0270, .cev_name = "MAP_STALL_DISPATCH" },
879 { .cev_selector = 0x0275, .cev_name = "MAP_REWIND" },
880 { .cev_selector = 0x0276, .cev_name = "MAP_STALL" },
881 { .cev_selector = 0x027c, .cev_name = "MAP_INT_UOP" },
882 { .cev_selector = 0x027d, .cev_name = "MAP_LDST_UOP" },
883 { .cev_selector = 0x027e, .cev_name = "MAP_SIMD_UOP" },
884 { .cev_selector = 0x0283, .cev_name = "SCHEDULE_UOP_ANY" },
885 { .cev_selector = 0x0285, .cev_name = "MAP_INT_SME_UOP" },
886 { .cev_selector = 0x0286, .cev_name = "SME_ENGINE_SM_ENABLE" },
887 { .cev_selector = 0x0287, .cev_name = "SME_ENGINE_SM_ZA_ENABLE" },
888 { .cev_selector = 0x0288, .cev_name = "SME_ENGINE_ZA_ENABLED_SM_DISABLED" },
889 { .cev_selector = 0x028c, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_INST_QUEUE_FULL" },
890 { .cev_selector = 0x028e, .cev_name = "SCHEDULE_WAITING_SME_ENGINE_REG_DATA" },
891 { .cev_selector = 0x028f, .cev_name = "LDST_UNIT_WAITING_SME_ENGINE_MEM_DATA" },
892 { .cev_selector = 0x0290, .cev_name = "LDST_UNIT_OLD_L1D_CACHE_MISS" },
893 { .cev_selector = 0x0291, .cev_name = "LDST_UNIT_WAITING_OLD_L1D_CACHE_MISS" },
894 { .cev_selector = 0x0294, .cev_name = "LD_UNIT_WAITING_YOUNG_L1D_CACHE_MISS" },
895 { .cev_selector = 0x02ad, .cev_name = "MAP_RECOVERY" },
896 { .cev_selector = 0x02ae, .cev_name = "MAP_STALL_NONRECOVERY" },
897 { .cev_selector = 0x0351, .cev_name = "SCHEDULE_EMPTY" },
898 { .cev_selector = 0x0404, .cev_name = "L1I_TLB_FILL" },
899 { .cev_selector = 0x0405, .cev_name = "L1D_TLB_FILL" },
900 { .cev_selector = 0x0407, .cev_name = "MMU_TABLE_WALK_INSTRUCTION" },
901 { .cev_selector = 0x0408, .cev_name = "MMU_TABLE_WALK_DATA" },
902 { .cev_selector = 0x040a, .cev_name = "L2_TLB_MISS_INSTRUCTION" },
903 { .cev_selector = 0x040b, .cev_name = "L2_TLB_MISS_DATA" },
904 { .cev_selector = 0x0508, .cev_name = "LDST_SME_XPG_UOP" },
905 { .cev_selector = 0x0529, .cev_name = "INST_SME_ENGINE_PACKING_FUSED" },
906 { .cev_selector = 0x052c, .cev_name = "LD_BLOCKED_BY_SME_LDST" },
907 { .cev_selector = 0x052e, .cev_name = "ST_BARRIER_BLOCKED_BY_SME_LDST" },
908 { .cev_selector = 0x0573, .cev_name = "LD_SME_NT_UOP" },
909 { .cev_selector = 0x0574, .cev_name = "ST_SME_NT_UOP" },
910 { .cev_selector = 0x0575, .cev_name = "LD_SME_NORMAL_UOP" },
911 { .cev_selector = 0x0576, .cev_name = "ST_SME_NORMAL_UOP" },
912 { .cev_selector = 0x0577, .cev_name = "LDST_SME_PRED_INACTIVE" },
913 { .cev_selector = 0x05a0, .cev_name = "L1D_TLB_ACCESS" },
914 { .cev_selector = 0x05a1, .cev_name = "L1D_TLB_MISS" },
915 { .cev_selector = 0x05a2, .cev_name = "L1D_CACHE_MISS_ST" },
916 { .cev_selector = 0x05a3, .cev_name = "L1D_CACHE_MISS_LD" },
917 { .cev_selector = 0x05a6, .cev_name = "LD_UNIT_UOP" },
918 { .cev_selector = 0x05a7, .cev_name = "ST_UNIT_UOP" },
919 { .cev_selector = 0x05a8, .cev_name = "L1D_CACHE_WRITEBACK" },
920 { .cev_selector = 0x05b1, .cev_name = "LDST_X64_UOP" },
921 { .cev_selector = 0x05b2, .cev_name = "LDST_XPG_UOP" },
922 { .cev_selector = 0x05b3, .cev_name = "ATOMIC_OR_EXCLUSIVE_SUCC" },
923 { .cev_selector = 0x05b4, .cev_name = "ATOMIC_OR_EXCLUSIVE_FAIL" },
924 { .cev_selector = 0x05e5, .cev_name = "ST_NT_UOP" },
925 { .cev_selector = 0x05e6, .cev_name = "LD_NT_UOP" },
926 { .cev_selector = 0x0884, .cev_name = "FLUSH_RESTART_OTHER_NONSPEC" },
927 { .cev_selector = 0x088e, .cev_name = "INST_BRANCH_CALL" },
928 { .cev_selector = 0x088f, .cev_name = "INST_BRANCH_RET" },
929 { .cev_selector = 0x0890, .cev_name = "INST_BRANCH_TAKEN" },
930 { .cev_selector = 0x0893, .cev_name = "INST_BRANCH_INDIR" },
931 { .cev_selector = 0x0894, .cev_name = "INST_BRANCH_COND" },
932 { .cev_selector = 0x0895, .cev_name = "INST_INT_LD" },
933 { .cev_selector = 0x0896, .cev_name = "INST_INT_ST" },
934 { .cev_selector = 0x0897, .cev_name = "INST_INT_ALU" },
935 { .cev_selector = 0x0898, .cev_name = "INST_SIMD_LD" },
936 { .cev_selector = 0x0899, .cev_name = "INST_SIMD_ST" },
937 { .cev_selector = 0x089a, .cev_name = "INST_SIMD_ALU" },
938 { .cev_selector = 0x089b, .cev_name = "INST_LDST" },
939 { .cev_selector = 0x089c, .cev_name = "INST_BARRIER" },
940 { .cev_selector = 0x089f, .cev_name = "INST_SIMD_ALU_VEC" },
941 { .cev_selector = 0x08a0, .cev_name = "INST_SME_ENGINE_SCALARFP" },
942 { .cev_selector = 0x08a1, .cev_name = "INST_SME_ENGINE_LD" },
943 { .cev_selector = 0x08a2, .cev_name = "INST_SME_ENGINE_ST" },
944 { .cev_selector = 0x08a3, .cev_name = "INST_SME_ENGINE_ALU" },
945 { .cev_selector = 0x08bf, .cev_name = "L1D_CACHE_MISS_LD_NONSPEC" },
946 { .cev_selector = 0x08c0, .cev_name = "L1D_CACHE_MISS_ST_NONSPEC" },
947 { .cev_selector = 0x08c1, .cev_name = "L1D_TLB_MISS_NONSPEC" },
948 { .cev_selector = 0x08c4, .cev_name = "ST_MEM_ORDER_VIOL_LD_NONSPEC" },
949 { .cev_selector = 0x08c5, .cev_name = "BRANCH_COND_MISPRED_NONSPEC" },
950 { .cev_selector = 0x08c6, .cev_name = "BRANCH_INDIR_MISPRED_NONSPEC" },
951 { .cev_selector = 0x08c8, .cev_name = "BRANCH_RET_INDIR_MISPRED_NONSPEC" },
952 { .cev_selector = 0x08ca, .cev_name = "BRANCH_CALL_INDIR_MISPRED_NONSPEC" },
953 { .cev_selector = 0x4006, .cev_name = "L1I_CACHE_MISS_DEMAND" },
954 },
955 #else
956 .cel_event_count = 0,
957 .cel_events = {
958 },
959 #endif
960 };
961