1 /*
2 * Copyright (c) 2020 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 #include <pexpert/pexpert.h>
30 #if __arm64__
31 #include <pexpert/arm64/board_config.h>
32 #include <arm64/hv_hvc.h>
33 #endif /* __arm64__ */
34
35 #include <arm/cpuid_internal.h>
36 #include <arm/pmap.h>
37 #include <arm64/proc_reg.h>
38 #include <machine/machine_cpuid.h>
39 #include <machine/machine_routines.h>
40
41
42 #if __arm64__
43
44 void configure_misc_apple_boot_args(void);
45 void configure_misc_apple_regs(bool is_boot_cpu);
46 void configure_timer_apple_regs(void);
47 void configure_late_apple_regs(bool cold_boot);
48
49 void
configure_misc_apple_boot_args(void)50 configure_misc_apple_boot_args(void)
51 {
52 }
53
54
55 void
configure_misc_apple_regs(bool is_boot_cpu)56 configure_misc_apple_regs(bool is_boot_cpu)
57 {
58 #pragma unused(is_boot_cpu)
59
60 }
61
62 // machine_routines_apple.c gets built on non-Apple platforms but it won't
63 // #include apple_arm64_regs.h so some of the constants referenced below
64 // won't exist in those builds
65 #if APPLE_ARM64_ARCH_FAMILY
66
67 static bool
cpu_needs_throttle_tunable(uint32_t midr_pnum)68 cpu_needs_throttle_tunable(uint32_t midr_pnum)
69 {
70 switch (midr_pnum) {
71
72 default:
73 return false;
74 }
75 }
76
77 /*
78 * configure_late_apple_regs()
79 *
80 * Normal tunables (HID bits) are applied early on, in the APPLY_TUNABLES
81 * asm macro. This C function is intended to handle special cases where that
82 * isn't possible, e.g.
83 * - Tunables that require PIO mappings
84 * - Tunables that need access to the parsed CPU topology info
85 *
86 * Unlike configure_misc_apple_regs(), it is guaranteed to execute after
87 * ml_parse_cpu_topology() / ml_map_cpu_pio() are done,
88 * and after cpu_number() is valid.
89 */
90 void
configure_late_apple_regs(bool cold_boot)91 configure_late_apple_regs(bool cold_boot)
92 {
93 const ml_topology_info_t *tinfo = ml_get_topology_info();
94 uint32_t midr_pnum = machine_read_midr() & MIDR_EL1_PNUM_MASK;
95 uint64_t reg_val;
96
97 bool apply_late_pio_regs = cold_boot;
98 if (apply_late_pio_regs) {
99 if (cpu_needs_throttle_tunable(midr_pnum)) {
100 vm_offset_t cpu_impl = tinfo->cpus[cpu_number()].cpu_IMPL_regs;
101 const uint64_t c1pptThrtlRate = 0xb2;
102 reg_val = ml_io_read64(cpu_impl + CORE_THRTL_CFG2_OFFSET);
103 reg_val &= ~CORE_THRTL_CFG2_c1pptThrtlRate_mask;
104 reg_val |= c1pptThrtlRate << CORE_THRTL_CFG2_c1pptThrtlRate_shift;
105 ml_io_write64(cpu_impl + CORE_THRTL_CFG2_OFFSET, reg_val);
106 }
107 }
108
109
110 }
111 #endif /* APPLE_ARM64_ARCH_FAMILY */
112
113 void
configure_timer_apple_regs(void)114 configure_timer_apple_regs(void)
115 {
116 }
117
118 #endif /* __arm64__ */
119
120 #if HAS_APPLE_PAC
121
122 #if HAS_PARAVIRTUALIZED_PAC
123 static uint64_t vmapple_default_rop_pid;
124 static uint64_t vmapple_default_jop_pid;
125
126 static inline void
vmapple_pac_get_default_keys()127 vmapple_pac_get_default_keys()
128 {
129 static bool initialized = false;
130 if (os_atomic_xchg(&initialized, true, relaxed)) {
131 return;
132 }
133
134 const uint64_t fn = VMAPPLE_PAC_GET_DEFAULT_KEYS;
135 asm volatile (
136 "mov x0, %[fn]" "\n"
137 "hvc #0" "\n"
138 "cbnz x0, ." "\n"
139 "str x2, %[b_key]" "\n"
140 "str x3, %[el0_key]" "\n"
141 : [b_key] "=m"(vmapple_default_rop_pid),
142 [el0_key] "=m"(vmapple_default_jop_pid)
143 : [fn] "r"(fn)
144 : "x0", "x1", "x2", "x3", "x4"
145 );
146 }
147
148 #endif /* HAS_PARAVIRTUALIZED_PAC */
149
150 /**
151 * Returns the default ROP key.
152 */
153 uint64_t
ml_default_rop_pid(void)154 ml_default_rop_pid(void)
155 {
156 #if HAS_PARAVIRTUALIZED_PAC
157 vmapple_pac_get_default_keys();
158 return vmapple_default_rop_pid;
159 #else
160 return 0;
161 #endif /* HAS_PARAVIRTUALIZED_PAC */
162 }
163
164 /**
165 * Returns the default JOP key.
166 */
167 uint64_t
ml_default_jop_pid(void)168 ml_default_jop_pid(void)
169 {
170 #if HAS_PARAVIRTUALIZED_PAC
171 vmapple_pac_get_default_keys();
172 return vmapple_default_jop_pid;
173 #else
174 return 0;
175 #endif /* HAS_PARAVIRTUALIZED_PAC */
176 }
177 #endif /* HAS_APPLE_PAC */
178