1 /* 2 * Copyright (c) 2007-2023 Apple Inc. All rights reserved. 3 * Copyright (c) 2005-2006 Apple Computer, Inc. All rights reserved. 4 */ 5 #ifndef _PEXPERT_ARM_BOARD_CONFIG_H 6 #define _PEXPERT_ARM_BOARD_CONFIG_H 7 8 #include <mach/machine.h> 9 10 /* 11 * Per-SoC configuration. General order is: 12 * 13 * CPU type 14 * CPU configuration 15 * CPU feature disables / workarounds 16 * CPU topology 17 * Other platform configuration (e.g. DARTs, PPL) 18 * 19 * This should answer the question: "what's unique about this SoC?" 20 * 21 * arm64/H*.h should answer the question: "what's unique about this CPU core?" 22 * 23 * For __ARM_AMP__ systems that have different cache line sizes on different 24 * clusters, MAX_L2_CLINE must reflect the largest L2 cache line size 25 * across all clusters. 26 */ 27 28 #ifdef ARM64_BOARD_CONFIG_T6000 29 #include <pexpert/arm64/H13.h> 30 31 32 #define MAX_L2_CLINE 7 33 #define MAX_CPUS 10 34 #define MAX_CPU_CLUSTERS 3 35 #define MAX_CPU_CLUSTER_PHY_ID 10 36 #define HAS_IOA 1 37 38 #define PMAP_CS 1 39 #define PMAP_CS_ENABLE 1 40 #define XNU_MONITOR 1 /* Secure pmap runtime */ 41 #define __ARM_42BIT_PA_SPACE__ 1 42 #define USE_APPLEARMSMP 1 43 #if DEVELOPMENT || DEBUG 44 #define XNU_ENABLE_PROCESSOR_EXIT 1 /* Enable xnu processor_exit() by default */ 45 #endif 46 #define XNU_HANDLE_MCC 1 /* This platform may support MCC error recovery */ 47 #endif /* ARM64_BOARD_CONFIG_T6000 */ 48 49 50 51 52 53 54 55 56 57 #ifdef ARM64_BOARD_CONFIG_T8101 58 #include <pexpert/arm64/H13.h> 59 60 #define MAX_L2_CLINE 7 61 #define MAX_CPUS 8 62 #define MAX_CPU_CLUSTERS 2 63 64 #define PMAP_CS 1 65 #define PMAP_CS_ENABLE 1 66 #define XNU_MONITOR 1 /* Secure pmap runtime */ 67 #endif /* ARM64_BOARD_CONFIG_T8101 */ 68 69 #ifdef ARM64_BOARD_CONFIG_T8103 70 #include <pexpert/arm64/H13.h> 71 72 #define MAX_L2_CLINE 7 73 #define MAX_CPUS 8 74 #define MAX_CPU_CLUSTERS 2 75 76 #define PMAP_CS 1 77 #define PMAP_CS_ENABLE 1 78 #define XNU_MONITOR 1 /* Secure pmap runtime */ 79 #endif /* ARM64_BOARD_CONFIG_T8103 */ 80 81 82 83 84 85 86 87 88 89 90 91 92 93 #ifdef ARM64_BOARD_CONFIG_BCM2837 94 #include <pexpert/arm64/BCM2837.h> 95 96 #define MAX_L2_CLINE 6 97 #define MAX_CPUS 4 98 #define MAX_CPU_CLUSTERS 1 99 100 #define CORE_NCTRS 8 /* Placeholder; KPC is not enabled for this target */ 101 #endif /* ARM64_BOARD_CONFIG_BCM2837 */ 102 103 #ifdef ARM64_BOARD_CONFIG_VMAPPLE 104 #include <pexpert/arm64/VMAPPLE.h> 105 106 #define MAX_L2_CLINE 7 107 #define MAX_CPUS 32 /* limited by CPU copy window size and cpu checkin mask */ 108 #define MAX_CPU_CLUSTERS 1 109 110 #define CORE_NCTRS 2 111 112 #define USE_APPLEARMSMP 1 113 114 #if XNU_TARGET_OS_WATCH 115 #define PREFER_ARM64_32_BINARIES 1 116 #endif 117 118 #endif /* ARM64_BOARD_CONFIG_VMAPPLE */ 119 120 121 #ifndef HAS_UNCORE_CTRS 122 #undef UNCORE_VERSION 123 #undef UNCORE_PER_CLUSTER 124 #undef UNCORE_NCTRS 125 #endif 126 127 #if MAX_CPU_CLUSTERS == 1 128 #undef __ARM_AMP__ 129 #endif 130 131 #ifndef MAX_CPU_CLUSTER_PHY_ID 132 #define MAX_CPU_CLUSTER_PHY_ID (MAX_CPU_CLUSTERS - 1) 133 #endif 134 135 #ifdef PREFER_ARM64_32_BINARIES 136 #define PREFERRED_USER_CPU_TYPE CPU_TYPE_ARM64_32 137 #define PREFERRED_USER_CPU_SUBTYPE CPU_SUBTYPE_ARM64_32_V8 138 #endif 139 140 141 /* 142 * Some platforms have very expensive timebase routines. An optimization 143 * is to avoid switching timers on kernel exit/entry, which results in all 144 * time billed to the system timer. However, when exposed to userspace, it's 145 * reported as user time to indicate that work was done on behalf of 146 * userspace. 147 */ 148 149 #if CONFIG_SKIP_PRECISE_USER_KERNEL_TIME 150 #define PRECISE_USER_KERNEL_TIME HAS_FAST_CNTVCT 151 #else /* CONFIG_SKIP_PRECISE_USER_KERNEL_TIME */ 152 #define PRECISE_USER_KERNEL_TIME 1 153 #endif /* !CONFIG_SKIP_PRECISE_USER_KERNEL_TIME */ 154 155 /** 156 * On supported hardware, debuggable builds make the HID bits read-only 157 * without locking them. This lets people manually modify HID bits while 158 * debugging, since they can use a debugging tool to first reset the HID 159 * bits back to read/write. However it will still catch xnu changes that 160 * accidentally write to HID bits after they've been made read-only. 161 */ 162 163 #endif /* ! _PEXPERT_ARM_BOARD_CONFIG_H */ 164