xref: /xnu-10002.41.9/pexpert/pexpert/arm64/BCM2837.h (revision 699cd48037512bf4380799317ca44ca453c82f57) !
1 /*
2  * Copyright (c) 2016 Apple Inc. All rights reserved.
3  */
4 
5 #ifndef _PEXPERT_ARM_BCM2837_H
6 #define _PEXPERT_ARM_BCM2837_H
7 
8 #define NO_MONITOR 1
9 #define NO_ECORE 1
10 
11 #define BCM2837
12 #define BCM2837_BRINGUP
13 #define ARM_ARCH_TIMER
14 
15 #define __ARM_ARCH__              8
16 #define __ARM_VMSA__              8
17 #define __ARM_VFP__               4
18 #define __ARM_COHERENT_CACHE__    1
19 #define __ARM_DEBUG__             7
20 #define __ARM64_PMAP_SUBPAGE_L1__ 1
21 
22 #ifndef ASSEMBLER
23 
24 #define PI3_UART
25 
26 #define PI3_BREAK                               asm volatile("brk #0");
27 
28 #define BCM2837_GPFSEL0_V               (pi3_gpio_base_vaddr + 0x0)
29 #define BCM2837_GPSET0_V                (pi3_gpio_base_vaddr + 0x1C)
30 #define BCM2837_GPCLR0_V                (pi3_gpio_base_vaddr + 0x28)
31 #define BCM2837_GPPUD_V                 (pi3_gpio_base_vaddr + 0x94)
32 #define BCM2837_GPPUDCLK0_V             (pi3_gpio_base_vaddr + 0x98)
33 
34 #define BCM2837_FSEL_INPUT              0x0
35 #define BCM2837_FSEL_OUTPUT             0x1
36 #define BCM2837_FSEL_ALT0               0x4
37 #define BCM2837_FSEL_ALT1               0x5
38 #define BCM2837_FSEL_ALT2               0x6
39 #define BCM2837_FSEL_ALT3               0x7
40 #define BCM2837_FSEL_ALT4               0x3
41 #define BCM2837_FSEL_ALT5               0x2
42 
43 #define BCM2837_FSEL_NFUNCS             54
44 #define BCM2837_FSEL_REG(func)          (BCM2837_GPFSEL0_V + (4 * ((func) / 10)))
45 #define BCM2837_FSEL_OFFS(func)         (((func) % 10) * 3)
46 #define BCM2837_FSEL_MASK(func)         (0x7 << BCM2837_FSEL_OFFS(func))
47 
48 #define BCM2837_AUX_ENABLES_V           (pi3_aux_base_vaddr + 0x4)
49 #define BCM2837_AUX_MU_IO_REG_V         (pi3_aux_base_vaddr + 0x40)
50 #define BCM2837_AUX_MU_IER_REG_V        (pi3_aux_base_vaddr + 0x44)
51 #define BCM2837_AUX_MU_IIR_REG_V        (pi3_aux_base_vaddr + 0x48)
52 #define BCM2837_AUX_MU_LCR_REG_V        (pi3_aux_base_vaddr + 0x4C)
53 #define BCM2837_AUX_MU_MCR_REG_V        (pi3_aux_base_vaddr + 0x50)
54 #define BCM2837_AUX_MU_LSR_REG_V        (pi3_aux_base_vaddr + 0x54)
55 #define BCM2837_AUX_MU_MSR_REG_V        (pi3_aux_base_vaddr + 0x58)
56 #define BCM2837_AUX_MU_SCRATCH_V        (pi3_aux_base_vaddr + 0x5C)
57 #define BCM2837_AUX_MU_CNTL_REG_V       (pi3_aux_base_vaddr + 0x60)
58 #define BCM2837_AUX_MU_STAT_REG_V       (pi3_aux_base_vaddr + 0x64)
59 #define BCM2837_AUX_MU_BAUD_REG_V       (pi3_aux_base_vaddr + 0x68)
60 #define BCM2837_PUT32(addr, value) do { *((volatile uint32_t *) addr) = value; } while(0)
61 #define BCM2837_GET32(addr) *((volatile uint32_t *) addr)
62 
63 #define PLATFORM_PANIC_LOG_PADDR        0x3c0fc000
64 #define PLATFORM_PANIC_LOG_SIZE         16384        // 16kb
65 #endif /* ! ASSEMBLER */
66 
67 #endif /* ! _PEXPERT_ARM_BCM2837_H */
68