46 	if (ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in vfp_64transfer()
58 	if (ARM_RD(instr) != REG_PC) {  in vfp_transfer()
197 		if (ARM_RD(instr) == REG_PC) {  in arm_signed_multiplies()
222 	if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC) {  in arm_pack_unpack_sat_reversal()
233 	if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_parallel_addsub_unsigned()
244 	if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_parallel_addsub_signed()
292 		if (ARM_RD(instr) != REG_PC) {  in arm_media()
301 		if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC) {  in arm_media()
320 		if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_loadstore_wordbyte()
325 		if (L == 1 && ARM_RN(instr) == REG_PC && ARM_RD(instr) != REG_PC) {  in arm_loadstore_wordbyte()
329 		if (ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_loadstore_wordbyte()
341 	if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_saturating()
401 		if (ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_extra_loadstore_unpriv()
405 		if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_extra_loadstore_unpriv()
423 		if (ARM_RM(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_extra_loadstore()
428 		if (ARM_RD(instr) != REG_PC && ARM_RN(instr) != REG_PC) {  in arm_extra_loadstore()
444 …if (ARM_RN(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RS(instr) != REG_PC && ARM_RM(instr)…  in arm_halfword_multiply()
459 …if (ARM_RN(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RS(instr) != REG_PC && ARM_RM(instr)…  in arm_multiply()
471 	if (ARM_RN(instr) != REG_PC && ARM_RD(instr) != REG_PC) {  in arm_dataproc_immed()
483 …if (ARM_RN(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RS(instr) != REG_PC && ARM_RM(instr)…  in arm_dataproc_regshift()
509 	if (op1 == 0x1A && op2 == 0 && op3 == 0 && ARM_RD(instr) == REG_PC) {  in arm_dataproc_reg()
514 	if (ARM_RN(instr) != REG_PC && ARM_RD(instr) != REG_PC && ARM_RM(instr) != REG_PC) {  in arm_dataproc_reg()
566 			if (ARM_RD(instr) != REG_PC) {  in arm_dataproc_misc()
575 			if (ARM_RD(instr) != REG_PC) {  in arm_dataproc_misc()